MLECO-2976: Configurable Ethos-U cache size for Dedicated_Sram

MLECO-2949: Platform drivers should own NPU and TA init

Change-Id: I13606a0197f137816bae803eb9d7d46c358b5fb8
Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com>

3 files changed, 173 insertions, 3 deletions

diff --git a/source/hal/platform/mps3/CMakeLists.txt b/source/hal/platform/mps3/CMakeLists.txt
index cd95d6c..75e70a2 100644
--- a/source/hal/platform/mps3/CMakeLists.txt
+++ b/source/hal/platform/mps3/CMakeLists.txt
@@ -82,7 +82,7 @@ target_sources(${PLATFORM_DRIVERS_TARGET}
     source/timer_mps3.c
     source/platform_drivers.c)
 
-## Directory for additional compnents required by MPS3:
+## Directory for additional components required by MPS3:
 if (NOT DEFINED COMPONENTS_DIR)
     set(COMPONENTS_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../components)
 endif()
@@ -115,7 +115,87 @@ target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
 target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC
     log cmsis_device)
 
-# Display status:
+# If Ethos-U is enabled, we need the driver library too
+if (ETHOS_U_NPU_ENABLED)
+
+
+    ## Platform component: Ethos-U initialization
+    target_sources(${PLATFORM_DRIVERS_TARGET}
+            PRIVATE
+            ${COMPONENTS_DIR}/ethosu_npu_init/ethosu_npu_init.c)
+    target_include_directories(${PLATFORM_DRIVERS_TARGET}
+            PUBLIC
+            ${COMPONENTS_DIR}/ethosu_npu_init/include)
+
+    ## Platform component: Ethos-U timing apadpter initialization
+    target_sources(${PLATFORM_DRIVERS_TARGET}
+            PRIVATE
+            ${COMPONENTS_DIR}/ethosu_ta_init/ethosu_ta_init.c)
+    target_include_directories(${PLATFORM_DRIVERS_TARGET}
+            PUBLIC
+            ${COMPONENTS_DIR}/ethosu_ta_init/include)
+
+    if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH)
+        message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should"
+                " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+    endif()
+
+    # Timing adapter
+    if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH)
+        message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should"
+                " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+    endif()
+
+    target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
+        PUBLIC
+        ARM_NPU)
+
+    # For the driver, we need to provide the CMSIS_PATH variable
+    set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
+    add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver)
+    add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing-adapter)
+
+    target_link_libraries(${PLATFORM_DRIVERS_TARGET}
+        PUBLIC
+        ethosu_core_driver
+        timing_adapter)
+
+    if (NOT DEFINED ETHOS_U_NPU_ID)
+        set(ETHOS_U_NPU_ID U55)
+    endif()
+
+    if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE)
+        set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram)
+    endif()
+
+    if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only)
+        if (ETHOS_U_NPU_ID STREQUAL U55)
+            set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY")
+        else ()
+            message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.")
+        endif ()
+
+    elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram)
+        # Shared Sram can be used for Ethos-U55 and Ethos-U65
+        set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM")
+
+    elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram)
+        # Dedicated Sram is used only for Ethos-U65
+        if (ETHOS_U_NPU_ID STREQUAL U65)
+            list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}")
+        else ()
+            message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.")
+        endif ()
+    else ()
+        message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}")
+    endif ()
+
+    target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
+        PUBLIC
+        ${ETHOS_U_NPU_MEMORY_MODE_FLAG})
+endif()
+
+# 5. Display status:
 message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
 message(STATUS "*******************************************************")
 message(STATUS "Library                                : " ${PLATFORM_DRIVERS_TARGET})
diff --git a/source/hal/platform/mps3/include/ethosu_mem_config.h b/source/hal/platform/mps3/include/ethosu_mem_config.h
new file mode 100644
index 0000000..aa0cfda
--- /dev/null
+++ b/source/hal/platform/mps3/include/ethosu_mem_config.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ETHOS_U_NPU_MEM_CONFIG_H
+#define ETHOS_U_NPU_MEM_CONFIG_H
+
+#define ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY           0
+#define ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM         1
+#define ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM      2
+
+#define ETHOS_U_MEM_BYTE_ALIGNMENT                  16
+
+#ifndef ETHOS_U_NPU_MEMORY_MODE
+    #define ETHOS_U_NPU_MEMORY_MODE                 ETHOS_U_MEMORY_MODE_SHARED_SRAM
+#endif /* ETHOS_U_NPU_MEMORY_MODE */
+
+#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM)
+    #ifndef ETHOS_U_NPU_CACHE_SIZE
+        #define ETHOS_U_CACHE_BUF_SZ                (393216U)  /* See vela doc for reference */
+    #else
+        #define ETHOS_U_CACHE_BUF_SZ                ETHOS_U_NPU_CACHE_SIZE
+    #endif /* ETHOS_U_NPU_CACHE_SIZE */
+#else
+    #define ETHOS_U_CACHE_BUF_SZ    (0U)
+#endif /* CACHE_BUF_SZ */
+
+/**
+ * Activation buffer aka tensor arena section name
+ * We have to place the tensor arena in different region based on the memory config.
+ **/
+#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM)
+    #define ACTIVATION_BUF_SECTION      section(".bss.NoInit.activation_buf_sram")
+    #define ACTIVATION_BUF_SECTION_NAME ("SRAM")
+#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY)
+    #define ACTIVATION_BUF_SECTION      section(".bss.NoInit.activation_buf_sram")
+    #define ACTIVATION_BUF_SECTION_NAME ("SRAM")
+#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM)
+    #define ACTIVATION_BUF_SECTION      section("activation_buf_dram")
+    #define CACHE_BUF_SECTION           section(".bss.NoInit.ethos_u_cache")
+    #define ACTIVATION_BUF_SECTION_NAME ("DDR/DRAM")
+    #define CACHE_BUF_ATTRIBUTE         __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION))
+#endif
+
+#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
diff --git a/source/hal/platform/mps3/source/platform_drivers.c b/source/hal/platform/mps3/source/platform_drivers.c
index da2b39c..3046c12 100644
--- a/source/hal/platform/mps3/source/platform_drivers.c
+++ b/source/hal/platform/mps3/source/platform_drivers.c
@@ -23,6 +23,15 @@
 
 #include <string.h>         /* For strncpy */
 
+#if defined(ARM_NPU)
+#include "ethosu_npu_init.h"
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+#include "ethosu_ta_init.h"
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+#endif /* ARM_NPU */
+
 /**
  * @brief   Checks if the platform is valid by checking
  *          the CPU ID for the FPGA implementation against
@@ -45,7 +54,30 @@ int platform_init(void)
         return err;
     }
 
-    /** TODO: Add ARM NPU and TA init here */
+#if defined(ARM_NPU)
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+    /* If the platform has timing adapter blocks along with Ethos-U core
+     * block, initialise them here. */
+    if (0 != (err = arm_ethosu_timing_adapter_init()))
+    {
+        return err;
+    }
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+    int state;
+
+    /* If Arm Ethos-U NPU is to be used, we initialise it here */
+    if (0 != (state = arm_ethosu_npu_init()))
+    {
+        return state;
+    }
+
+#endif /* ARM_NPU */
+
+    /* Print target design info */
+    info("Target system design: %s\n", DESIGN_NAME);
+
     return 0;
 }