diff options
| author | alexander <alexander.efremov@arm.com> | 2022-02-10 16:15:54 +0000 |
|---|---|---|
| committer | alexander <alexander.efremov@arm.com> | 2022-02-10 18:04:42 +0000 |
| commit | 31ae9f09bb3535975595e999fbc7baca889e46e8 (patch) | |
| tree | 71f0cadc2620b9d18e474e5d40eda7b3d30a8ce4 /source/application/hal | |
| parent | 3107aa2152de9be8317e62da1d0327bcad6552e2 (diff) | |
| download | ml-embedded-evaluation-kit-31ae9f09bb3535975595e999fbc7baca889e46e8.tar.gz | |
MLECO-2682: CMake and source refactoring.
MLECO-2930: logging macros were extracted from hal.h and used separately around the code.
MLECO-2931: arm_math lib introduced, cmsis-dsp removed from top level linkage.
MLECO-2915: platform related post-build steps.
Change-Id: Id718884e22f262a5c070ded3f3f5d4b048820147
Signed-off-by: alexander <alexander.efremov@arm.com>
Diffstat (limited to 'source/application/hal')
50 files changed, 0 insertions, 6303 deletions
diff --git a/source/application/hal/hal.c b/source/application/hal/hal.c deleted file mode 100644 index c067ba2..0000000 --- a/source/application/hal/hal.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "hal.h" /* API */ - -#include "hal_config.h" /* HAL configuration */ -#include "system_init.h" - -#include <stdio.h> -#include <assert.h> - -#if defined(ARM_NPU) - -#include "ethosu_mem_config.h" /* Arm Ethos-U memory config */ -#include "ethosu_driver.h" /* Arm Ethos-U driver header */ -#include "timing_adapter.h" /* Arm Ethos-U timing adapter driver header */ -#include "timing_adapter_settings.h" /* Arm Ethos-U timing adapter settings */ - -struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */ - -#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) - static uint8_t cache_arena[ETHOS_U_CACHE_BUF_SZ] CACHE_BUF_ATTRIBUTE; -#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */ - static uint8_t* cache_arena = NULL; -#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */ - -/** - * @brief Initialises the Arm Ethos-U NPU - * @return 0 if successful, error code otherwise - **/ -static int arm_npu_init(void); - -static uint8_t * get_cache_arena() -{ - return cache_arena; -} - -static size_t get_cache_arena_size() -{ -#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) - return sizeof(cache_arena); -#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */ - return 0; -#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */ -} - -#endif /* ARM_NPU */ - -int hal_init(hal_platform* platform, data_acq_module* data_acq, - data_psn_module* data_psn, platform_timer* timer) -{ - assert(platform && data_acq && data_psn); - - platform->data_acq = data_acq; - platform->data_psn = data_psn; - platform->timer = timer; - platform->platform_init = system_init; - platform->platform_release = system_release; - system_name(platform->plat_name, sizeof(platform->plat_name)); - - return 0; -} - -/** - * @brief Local helper function to clean the slate for current platform. - **/ -static void hal_platform_clear(hal_platform* platform) -{ - assert(platform); - platform->inited = 0; -} - -int hal_platform_init(hal_platform* platform) -{ - int state; - assert(platform && platform->platform_init); - hal_platform_clear(platform); - - /* Initialise platform */ - if (0 != (state = platform->platform_init())) { - printf_err("failed to initialise platform %s\n", platform->plat_name); - return state; - } - - /* Initialise the data acquisition module */ - if (0 != (state = data_acq_channel_init(platform->data_acq))) { - if (!platform->data_acq->inited) { - printf_err("failed to initialise data acq module: %s\n", - platform->data_acq->system_name); - } - hal_platform_release(platform); - return state; - } - - /* Initialise the presentation module */ - if (0 != (state = data_psn_system_init(platform->data_psn))) { - printf_err("failed to initialise data psn module: %s\n", - platform->data_psn->system_name); - data_acq_channel_release(platform->data_acq); - hal_platform_release(platform); - return state; - } - -#if defined(ARM_NPU) - - /* If Arm Ethos-U NPU is to be used, we initialise it here */ - if (0 != (state = arm_npu_init())) { - return state; - } - -#endif /* ARM_NPU */ - - /* followed by the timer module */ - init_timer(platform->timer); - - info("%s platform initialised\n", platform->plat_name); - debug("using %s module for data acquisition\n", - platform->data_acq->system_name); - debug("using %s module for data presentation\n", - platform->data_psn->system_name); - - platform->inited = !state; - - return state; -} - -void hal_platform_release(hal_platform *platform) -{ - assert(platform && platform->platform_release); - data_acq_channel_release(platform->data_acq); - data_psn_system_release(platform->data_psn); - - hal_platform_clear(platform); - info("releasing platform %s\n", platform->plat_name); - platform->platform_release(); -} - -#if defined(ARM_NPU) -/** - * @brief Defines the Ethos-U interrupt handler: just a wrapper around the default - * implementation. - **/ -static void arm_npu_irq_handler(void) -{ - /* Call the default interrupt handler from the NPU driver */ - ethosu_irq_handler(ðosu_drv); -} - -/** - * @brief Initialises the NPU IRQ - **/ -static void arm_npu_irq_init(void) -{ - const IRQn_Type ethosu_irqnum = (IRQn_Type)EthosU_IRQn; - - /* Register the EthosU IRQ handler in our vector table. - * Note, this handler comes from the EthosU driver */ - NVIC_SetVector(ethosu_irqnum, (uint32_t)arm_npu_irq_handler); - - /* Enable the IRQ */ - NVIC_EnableIRQ(ethosu_irqnum); - - debug("EthosU IRQ#: %u, Handler: 0x%p\n", - ethosu_irqnum, arm_npu_irq_handler); -} - -static int _arm_npu_timing_adapter_init(void) -{ -#if defined (TA0_BASE) - struct timing_adapter ta_0; - struct timing_adapter_settings ta_0_settings = { - .maxr = TA0_MAXR, - .maxw = TA0_MAXW, - .maxrw = TA0_MAXRW, - .rlatency = TA0_RLATENCY, - .wlatency = TA0_WLATENCY, - .pulse_on = TA0_PULSE_ON, - .pulse_off = TA0_PULSE_OFF, - .bwcap = TA0_BWCAP, - .perfctrl = TA0_PERFCTRL, - .perfcnt = TA0_PERFCNT, - .mode = TA0_MODE, - .maxpending = 0, /* This is a read-only parameter */ - .histbin = TA0_HISTBIN, - .histcnt = TA0_HISTCNT - }; - - if (0 != ta_init(&ta_0, TA0_BASE)) { - printf_err("TA0 initialisation failed\n"); - return 1; - } - - ta_set_all(&ta_0, &ta_0_settings); -#endif /* defined (TA0_BASE) */ - -#if defined (TA1_BASE) - struct timing_adapter ta_1; - struct timing_adapter_settings ta_1_settings = { - .maxr = TA1_MAXR, - .maxw = TA1_MAXW, - .maxrw = TA1_MAXRW, - .rlatency = TA1_RLATENCY, - .wlatency = TA1_WLATENCY, - .pulse_on = TA1_PULSE_ON, - .pulse_off = TA1_PULSE_OFF, - .bwcap = TA1_BWCAP, - .perfctrl = TA1_PERFCTRL, - .perfcnt = TA1_PERFCNT, - .mode = TA1_MODE, - .maxpending = 0, /* This is a read-only parameter */ - .histbin = TA1_HISTBIN, - .histcnt = TA1_HISTCNT - }; - - if (0 != ta_init(&ta_1, TA1_BASE)) { - printf_err("TA1 initialisation failed\n"); - return 1; - } - - ta_set_all(&ta_1, &ta_1_settings); -#endif /* defined (TA1_BASE) */ - - return 0; -} - -static int arm_npu_init(void) -{ - int err = 0; - - /* If the platform has timing adapter blocks along with Ethos-U core - * block, initialise them here. */ - if (0 != (err = _arm_npu_timing_adapter_init())) { - return err; - } - - /* Initialise the IRQ */ - arm_npu_irq_init(); - - /* Initialise Ethos-U device */ - const void * ethosu_base_address = (void *)(SEC_ETHOS_U_NPU_BASE); - - if (0 != (err = ethosu_init( - ðosu_drv, /* Ethos-U driver device pointer */ - ethosu_base_address, /* Ethos-U NPU's base address. */ - get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */ - get_cache_arena_size(), /* Fast mem region size. */ - 1, /* Security enable. */ - 1))) { /* Privilege enable. */ - printf_err("failed to initalise Ethos-U device\n"); - return err; - } - - info("Ethos-U device initialised\n"); - - /* Get Ethos-U version */ - struct ethosu_driver_version driver_version; - struct ethosu_hw_info hw_info; - - ethosu_get_driver_version(&driver_version); - ethosu_get_hw_info(ðosu_drv, &hw_info); - - info("Ethos-U version info:\n"); - info("\tArch: v%"PRIu32".%"PRIu32".%"PRIu32"\n", - hw_info.version.arch_major_rev, - hw_info.version.arch_minor_rev, - hw_info.version.arch_patch_rev); - info("\tDriver: v%"PRIu8".%"PRIu8".%"PRIu8"\n", - driver_version.major, - driver_version.minor, - driver_version.patch); - info("\tMACs/cc: %"PRIu32"\n", (uint32_t)(1 << hw_info.cfg.macs_per_cc)); - info("\tCmd stream: v%"PRIu32"\n", hw_info.cfg.cmd_stream_version); - - return 0; -} - -#endif /* ARM_NPU */ diff --git a/source/application/hal/include/data_acq.h b/source/application/hal/include/data_acq.h deleted file mode 100644 index 965fbe5..0000000 --- a/source/application/hal/include/data_acq.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef DATA_ACQ_H -#define DATA_ACQ_H - -/** - * This file is the top level abstraction for the data acquisition module. - **/ -#include <stdint.h> - -/* Structure to encompass the data acquisition module and it's methods. */ -typedef struct data_acquisition_module { - int inited; /**< initialised or not. */ - char system_name[8]; /**< name(s) of the channel in use. */ - int (* system_init)(void); /**< channel initialisation function. */ - - /* Function to go and check if there are any events that require handling. */ - int (* get_input)(char *user_input, int size); -} data_acq_module; - -/** - * @brief Initialise the data acquisition channel: goes and - * sets the required channel up for usage. - * @param[in,out] module Pointer to a pre-allocated data - * acquisition structure object. - * @return 0 if successful, error code otherwise. - **/ -int data_acq_channel_init(data_acq_module *module); - -/** - * @brief Releases the data acquisition channel. - * @param[in,out] module Pointer to a pre-allocated data - * acquisition structure object. - * @return 0 if successful, error code otherwise. - **/ -int data_acq_channel_release(data_acq_module *module); - -#endif /* DATA_ACQ_H */ diff --git a/source/application/hal/include/data_psn.h b/source/application/hal/include/data_psn.h deleted file mode 100644 index 8c14c77..0000000 --- a/source/application/hal/include/data_psn.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef DATA_PSN_H -#define DATA_PSN_H - -/** - * This file is the top level abstraction for the data presentation module - **/ -#include <stdint.h> -#include <stddef.h> -#include <stdbool.h> - -/* Structure to encompass the data presentation module and it's methods */ -typedef struct data_presentation_module { - int inited; /**< initialised or not */ - char system_name[8]; /**< name of the system in use */ - int (* system_init)(void); /**< pointer to init function */ - - /** Pointer to the image presentation function */ - int (* present_data_image)(uint8_t *data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor); - - /* Pointer to text presentation function */ - int (* present_data_text)(const char *str, const size_t str_sz, - const uint32_t pos_x, const uint32_t pos_y, - const bool allow_multiple_lines); - - /* Pointer to box presentation function */ - int (* present_box)(const uint32_t pos_x, const uint32_t pos_y, - const uint32_t width, const uint32_t height, const uint16_t color); - - /* Pointer to clear presentation function */ - int (* clear)(const uint16_t color); - - /* Pointer to set text color presentation function */ - int (* set_text_color)(const uint16_t color); -} data_psn_module; - - -/** - * @brief Initialises the data presentation system. - * @param[in,out] module Pointer to a pre-allocated data - * presentation structure object. - * @return 0 if successful, error code otherwise. - **/ -int data_psn_system_init(data_psn_module *module); - -/** - * @brief Releases the data presentation system. - * @param[in,out] module Pointer to a pre-allocated data - * presentation structure object. - * @return 0 if successful, error code otherwise. - **/ -int data_psn_system_release(data_psn_module *module); - -#endif /* DATA_PSN_H */ diff --git a/source/application/hal/include/hal.h b/source/application/hal/include/hal.h deleted file mode 100644 index a192ea7..0000000 --- a/source/application/hal/include/hal.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef PLATFORM_HAL_H -#define PLATFORM_HAL_H - -/** - * This file should present a C API for the main application logic to use - * and be indifferent to the lower level platform. In addition to this it - * will also need to be aware of the API exposed by data acquisition and - * data presentation modules. - */ -#include "hal_config.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#include "data_acq.h" /* Data acquisition abstraction */ -#include "data_psn.h" /* Data presentation abstraction */ -#include "timer.h" /* Timer/profiler API */ - -#include <inttypes.h> - -/* Structure to define a platform context to be used by the application */ -typedef struct hal_platform_context { - int inited; /**< initialised */ - char plat_name[64]; /**< name of this platform */ - data_acq_module * data_acq; /**< data acquisition module pointer */ - data_psn_module * data_psn; /**< data presentation module pointer */ - platform_timer * timer; /**< timer */ - int (* platform_init)(); /**< pointer to platform initialisation function */ - void (* platform_release)(); /**< pointer to platform release function */ -} hal_platform; - -/** - * @brief Initialise the HAL structure based on compile time config. This - * should be called before any other function in this API. - * @param[in,out] platform Pointer to a pre-allocated platform struct. - * @param[in,out] data_acq Pointer to a pre-allocated data acquisition module. - * @param[in,out] data_psn Pointer to a pre-allocated data presentation module. - * @param[in,out] timer Pointer to a pre-allocated timer module. - * @return 0 if successful, error code otherwise. - **/ -int hal_init(hal_platform *platform, data_acq_module *data_acq, - data_psn_module *data_psn, platform_timer *timer); - - -/** - * @brief Initialise the HAL platform. This will go and initialise all the - * modules on the platform the application requires to run. - * @param[in] platform Pointer to a pre-allocated and initialised - * platform structure. - * @return 0 if successful, error code otherwise. - **/ -int hal_platform_init(hal_platform *platform); - - -/** - * @brief Release the HAL platform. This should release resources acquired. - * @param[in] platform pointer to a pre-allocated and initialised - * platform structure. - **/ -void hal_platform_release(hal_platform *platform); - -#ifdef __cplusplus -} -#endif - -#endif /* PLATFORM_HAL_H */ diff --git a/source/application/hal/include/hal_config.h b/source/application/hal/include/hal_config.h deleted file mode 100644 index 55db973..0000000 --- a/source/application/hal/include/hal_config.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef HAL_CONFIG_H -#define HAL_CONFIG_H - -/* This header provides some basic configuration for HAL */ - -/* Platform definitions for the systems we expect to support */ -#define PLATFORM_CORTEX_M_BAREMETAL 1U -#define PLATFORM_UNKNOWN_LINUX_OS 3U - -/* This should come from compile time definition */ -#ifndef PLATFORM_HAL - #define PLATFORM_HAL PLATFORM_UNKNOWN_LINUX_OS /* Default platform */ -#endif /* PLATFORM_HAL */ - -#if ((PLATFORM_HAL) == PLATFORM_CORTEX_M_BAREMETAL) - #include "bsp.h" -#elif ((PLATFORM_HAL) == PLATFORM_UNKNOWN_LINUX_OS) - #include "dummy_log.h" -#else - #error "Invalid platform!" -#endif /* PLATFORM_HAL==PLATFORM_CORTEX_M_BAREMETAL */ - -#if !defined (DESIGN_NAME) - #define DESIGN_NAME ("N/A") -#endif /* !defined (DESIGN_NAME) */ - -#endif /* HAL_CONFIG_H */ diff --git a/source/application/hal/include/timer.h b/source/application/hal/include/timer.h deleted file mode 100644 index 426a42f..0000000 --- a/source/application/hal/include/timer.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef HAL_TIMER_H -#define HAL_TIMER_H - -#include "hal_config.h" - -#if ((PLATFORM_HAL) == PLATFORM_CORTEX_M_BAREMETAL) -#include "baremetal_timer.h" -#elif ((PLATFORM_HAL) == PLATFORM_UNKNOWN_LINUX_OS) -#include "native_timer.h" -#else -#error "Platform does not support a timer API" -#endif /* PLATFORM_HAL */ - -/** Struct for describing the capabilities available for - * the timer provided by HAL */ -typedef struct _platform_timer_capability { - uint32_t npu_cycles: 1; - uint32_t cpu_cycles: 1; - uint32_t duration_ms: 1; - uint32_t duration_us: 1; -} timer_capability; - -/* Structure to hold a platform specific timer implementation */ -typedef struct _platform_timer { - int inited; /**< initialised or not */ - timer_capability cap; /**< capability of this timer */ - - /* reset the timer */ - void (* reset)(void); - - /* Gets the current time counter. */ - time_counter (* get_time_counter)(void); - - /* Gets the duration in milliseconds. */ - time_t (* get_duration_ms)(time_counter *start, time_counter *end); - - /* Gets duration in microseconds. */ - time_t (* get_duration_us)(time_counter *start, time_counter *end); - - /* Gets difference in CPU cycle counts. */ - uint64_t (* get_cpu_cycle_diff)(time_counter *start, time_counter *end); - - /* Gets the difference in terms of cycle counts for collected pmu counters. */ - int (* get_npu_cycles_diff)(time_counter *start, time_counter *end, - uint64_t* pmu_counters_values, size_t size); - - /* Wraps get_time_counter function with additional profiling - * initialisation, if required. */ - time_counter (* start_profiling)(void); - - /* Wraps get_time_counter function along with additional instructions when - * profiling ends, if required. */ - time_counter (* stop_profiling)(void); - -} platform_timer; - -/** - * @brief Initialise the timer available for the platform. - **/ -void init_timer(platform_timer *timer); - -#endif /* HAL_TIMER_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-core/include/bsp_core_log.h b/source/application/hal/platforms/bare-metal/bsp/bsp-core/include/bsp_core_log.h deleted file mode 100644 index ffb55e7..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-core/include/bsp_core_log.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef BSP_CORE_LOG_H -#define BSP_CORE_LOG_H - -#include "uart_stdout.h" /* UART for logging */ - -#include <stdio.h> - -#define LOG_LEVEL_TRACE 0 -#define LOG_LEVEL_DEBUG 1 -#define LOG_LEVEL_INFO 2 -#define LOG_LEVEL_WARN 3 -#define LOG_LEVEL_ERROR 4 - -#ifndef LOG_LEVEL -#define LOG_LEVEL LOG_LEVEL_INFO -#endif /*LOG_LEVEL*/ - -#if (LOG_LEVEL == LOG_LEVEL_TRACE) - #define trace(...) printf("TRACE - "); printf(__VA_ARGS__) -#else - #define trace(...) -#endif /* LOG_LEVEL == LOG_LEVEL_TRACE */ - -#if (LOG_LEVEL <= LOG_LEVEL_DEBUG) - #define debug(...) printf("DEBUG - "); printf(__VA_ARGS__) -#else - #define debug(...) -#endif /* LOG_LEVEL > LOG_LEVEL_TRACE */ - -#if (LOG_LEVEL <= LOG_LEVEL_INFO) - #define info(...) printf("INFO - "); printf(__VA_ARGS__) -#else - #define info(...) -#endif /* LOG_LEVEL > LOG_LEVEL_DEBUG */ - -#if (LOG_LEVEL <= LOG_LEVEL_WARN) - #define warn(...) printf("WARN - "); printf(__VA_ARGS__) -#else - #define warn(...) -#endif /* LOG_LEVEL > LOG_LEVEL_INFO */ - -#if (LOG_LEVEL <= LOG_LEVEL_ERROR) - #define printf_err(...) printf("ERROR - "); printf(__VA_ARGS__) -#else - #define printf_err(...) -#endif /* LOG_LEVEL > LOG_LEVEL_INFO */ - -#define UNUSED(x) ((void)(x)) - -#endif /* BSP_CORE_LOG_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-core/include/uart_stdout.h b/source/application/hal/platforms/bare-metal/bsp/bsp-core/include/uart_stdout.h deleted file mode 100644 index 9c5fbcf..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-core/include/uart_stdout.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef UART_STDOUT_H -#define UART_STDOUT_H - -#include <stdbool.h> - -/** - * @brief Initialised the UART block. - **/ -extern void UartStdOutInit(void); - -/** - * @brief Transmits a character over UART (blocking call). - * @param[in] my_ch Character to be transmitted. - * @return Character transmitted. - **/ -extern unsigned char UartPutc(unsigned char my_ch); - -/** - * @brief Receives a character from the UART block (blocking call). - * @return Character received. - **/ -extern unsigned char UartGetc(void); - -/** - * @brief Reads characters from the UART block until a line feed or - * carriage return terminates the function. NULL character - * also terminates the function, error is returned. - * @param[out] lp Characters read from the UART block. - * @param[in] len Character to be transmitted. - * @return true if successful, false otherwise. - **/ -extern bool GetLine(char *lp, unsigned int len); - -/** - * @brief Terminates UART simulation. This is useful when a Fixed - * Virtual Platform's session needs to be gracefully terminated. - * @param[in] code Terminating code displayed on the UART before the end of the simulation. - **/ -extern void UartEndSimulation(int code); - -#endif /* UART_STDOUT_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-core/retarget.c b/source/application/hal/platforms/bare-metal/bsp/bsp-core/retarget.c deleted file mode 100644 index 29c2023..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-core/retarget.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "uart_stdout.h" -#include "bsp_core_log.h" - -#include <stdio.h> -#include <string.h> -#include <time.h> - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) -/* Arm compiler re-targeting */ - -#include <rt_misc.h> -#include <rt_sys.h> - - -/* Standard IO device handles. */ -#define STDIN 0x8001 -#define STDOUT 0x8002 -#define STDERR 0x8003 - -#define RETARGET(fun) _sys##fun - -#else -/* GNU compiler re-targeting */ - -/* - * This type is used by the _ I/O functions to denote an open - * file. - */ -typedef int FILEHANDLE; - -/* - * Open a file. May return -1 if the file failed to open. - */ -extern FILEHANDLE _open(const char * /*name*/, int /*openmode*/); - -/* Standard IO device handles. */ -#define STDIN 0x00 -#define STDOUT 0x01 -#define STDERR 0x02 - -#define RETARGET(fun) fun - -#endif - -/* Standard IO device name defines. */ -const char __stdin_name[] __attribute__((aligned(4))) = "STDIN"; -const char __stdout_name[] __attribute__((aligned(4))) = "STDOUT"; -const char __stderr_name[] __attribute__((aligned(4))) = "STDERR"; - -void _ttywrch(int ch) { - (void)fputc(ch, stdout); -} - -FILEHANDLE RETARGET(_open)(const char *name, int openmode) -{ - UNUSED(openmode); - - if (strcmp(name, __stdin_name) == 0) { - return (STDIN); - } - - if (strcmp(name, __stdout_name) == 0) { - return (STDOUT); - } - - if (strcmp(name, __stderr_name) == 0) { - return (STDERR); - } - - return -1; -} - -int RETARGET(_write)(FILEHANDLE fh, const unsigned char *buf, unsigned int len, int mode) -{ - UNUSED(mode); - - switch (fh) { - case STDOUT: - case STDERR: { - int c; - - while (len-- > 0) { - c = fputc(*buf++, stdout); - if (c == EOF) { - return EOF; - } - } - - return 0; - } - default: - return EOF; - } -} - -int RETARGET(_read)(FILEHANDLE fh, unsigned char *buf, unsigned int len, int mode) -{ - UNUSED(mode); - - switch (fh) { - case STDIN: { - int c; - - while (len-- > 0) { - c = fgetc(stdin); - if (c == EOF) { - return EOF; - } - - *buf++ = (unsigned char)c; - } - - return 0; - } - default: - return EOF; - } -} - -int RETARGET(_istty)(FILEHANDLE fh) -{ - switch (fh) { - case STDIN: - case STDOUT: - case STDERR: - return 1; - default: - return 0; - } -} - -int RETARGET(_close)(FILEHANDLE fh) -{ - if (RETARGET(_istty(fh))) { - return 0; - } - - return -1; -} - -int RETARGET(_seek)(FILEHANDLE fh, long pos) -{ - UNUSED(fh); - UNUSED(pos); - - return -1; -} - -int RETARGET(_ensure)(FILEHANDLE fh) -{ - UNUSED(fh); - - return -1; -} - -long RETARGET(_flen)(FILEHANDLE fh) -{ - if (RETARGET(_istty)(fh)) { - return 0; - } - - return -1; -} - -int RETARGET(_tmpnam)(char *name, int sig, unsigned int maxlen) -{ - UNUSED(name); - UNUSED(sig); - UNUSED(maxlen); - - return 1; -} - -char *RETARGET(_command_string)(char *cmd, int len) -{ - UNUSED(len); - - return cmd; -} - -void RETARGET(_exit)(int return_code) -{ - UartEndSimulation(return_code); -} - -int system(const char *cmd) -{ - UNUSED(cmd); - - return 0; -} - -time_t time(time_t *timer) -{ - time_t current; - - current = 0; // To Do !! No RTC implemented - - if (timer != NULL) { - *timer = current; - } - - return current; -} - -void _clock_init(void) {} - -clock_t clock(void) -{ - return (clock_t)-1; -} - -int remove(const char *arg) { - UNUSED(arg); - - return 0; -} - -int rename(const char *oldn, const char *newn) -{ - UNUSED(oldn); - UNUSED(newn); - - return 0; -} - -int fputc(int ch, FILE *f) -{ - UNUSED(f); - - return UartPutc(ch); -} - -int fgetc(FILE *f) -{ - UNUSED(f); - - return UartPutc(UartGetc()); -} - -#ifndef ferror - -/* arm-none-eabi-gcc with newlib uses a define for ferror */ -int ferror(FILE *f) -{ - UNUSED(f); - - return EOF; -} - -#endif /* #ifndef ferror */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/device_mps3.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/device_mps3.c deleted file mode 100644 index 9a923c7..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/device_mps3.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "device_mps3.h" - -#include "bsp_core_log.h" -#include "smm_mps3.h" - -#include <inttypes.h> - -extern uint32_t GetSystemCoreClock(void); - -uint32_t GetMPS3CoreClock(void) -{ - const uint32_t default_clock = GetSystemCoreClock(); - static int warned_once = 0; - if (0 != MPS3_SCC->CFG_ACLK) { - if (default_clock != MPS3_SCC->CFG_ACLK) { - warn("System clock is different to the MPS3 config set clock.\n"); - } - return MPS3_SCC->CFG_ACLK; - } - - if (!warned_once) { - warn("MPS3_SCC->CFG_ACLK reads 0. Assuming default clock of %" PRIu32 "\n", - default_clock); - warned_once = 1; - } - return default_clock; -} diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/glcd_mps3.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/glcd_mps3.c deleted file mode 100644 index 530be4f..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/glcd_mps3.c +++ /dev/null @@ -1,460 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "glcd_mps3.h" - -#include "bsp_core_log.h" -#include "font_9x15_h.h" -#include "smm_mps3.h" - -/*-------------- CLCD Controller Internal Register addresses ----------------*/ -#define CHAR_COM ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x000)) -#define CHAR_DAT ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x004)) -#define CHAR_RD ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x008)) -#define CHAR_RAW ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x00C)) -#define CHAR_MASK ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x010)) -#define CHAR_STAT ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x014)) -#define CHAR_MISC ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x04C)) - -/*--------------- Graphic LCD interface hardware definitions -----------------*/ -/* Pin CS setting to 0 or 1 */ -#define LCD_CS(x) ((x) ? (*CHAR_MISC |= CLCD_CS_Msk) : (*CHAR_MISC &= ~CLCD_CS_Msk)) -#define LCD_RST(x) ((x) ? (*CHAR_MISC |= CLCD_RESET_Msk) : (*CHAR_MISC &= ~CLCD_RESET_Msk)) -#define LCD_BL(x) ((x) ? (*CHAR_MISC |= CLCD_BL_Msk) : (*CHAR_MISC &= ~CLCD_BL_Msk)) - -#define BG_COLOR 0 /* Background colour */ -#define TXT_COLOR 1 /* Text colour */ - -/** -* Text and background colour -*/ -static volatile unsigned short Color[2] = {Black, White}; - -/** - * @brief Delay in while loop cycles. - * @param[in] cnt Number of while cycles to delay. - **/ -static void delay (int cnt) -{ - cnt <<= DELAY_2N; - while (cnt != 0) { - --cnt; - } -} - -/** - * @brief Write a command the LCD controller. - * @param[in] cmd Command to be written. - */ -static __inline void wr_cmd(unsigned char cmd) -{ - LCD_CS(0); - *CHAR_COM = cmd; - LCD_CS(1); -} - -/** - * @brief Start of data writing to the LCD controller. - */ -static __inline void wr_dat_start (void) -{ - LCD_CS(0); -} - -/** - * @brief Stop of data writing to the LCD controller. - */ -static __inline void wr_dat_stop (void) -{ - LCD_CS(1); -} - -/** - * @brief Data writing to the LCD controller. - * @param[in] dat Data to be written. - */ -static __inline void wr_dat_only(unsigned short dat) -{ - *CHAR_DAT = (dat >> 8); /* Write D8..D15 */ - *CHAR_DAT = (dat & 0xFF); /* Write D0..D7 */ -} - -/** - * @brief Write a value to the to LCD register. - * @param[in] reg Register to be written. - * @param[in] val Value to write to the register. - */ -static __inline void wr_reg(unsigned char reg, unsigned short val) -{ - LCD_CS(0); - *CHAR_COM = reg; - wr_dat_only(val); - LCD_CS(1); -} - -/** - * @brief Converts a gray value to RGB565 representation. - * @param[in] src_uchar Pointer to the source pixel. - * @return 16 bit RGB565 value. - */ -static inline uint16_t _GLCD_Gray8_to_RGB565(uint8_t *src_uchar) -{ - uint16_t val_r = (*src_uchar >> 3); - uint16_t val_g = (*src_uchar >> 2); - return ((val_r << 11) | (val_g << 5) | val_r); -} - -/** - * @brief Converts an RGB888 value to RGB565 representation. - * @param[in] src_uchar Pointer to the source pixel for R (assumed to - * be RGB format). - * @return 16 bit RGB565 value. - */ -static inline uint16_t _GLCD_RGB888_to_RGB565(uint8_t *src_uchar) -{ - uint16_t val_r = (*src_uchar >> 3) & 0x1F; - uint16_t val_g = (*(src_uchar+1) >> 2) & 0x3F; - uint16_t val_b = (*(src_uchar+2) >> 3) & 0x1F; - return ((val_r << 11) | (val_g << 5) | val_b); -} - -/* Helper typedef to encapsulate the colour conversion function - * signatures */ -typedef uint16_t (* std_clr_2_lcd_clr_fn)(uint8_t *src_uchar); - -void GLCD_SetWindow(unsigned int x, unsigned int y, unsigned int w, unsigned int h) { - unsigned int xe, ye; - - xe = x+w-1; - ye = y+h-1; - - wr_reg(0x02, x >> 8); /* Column address start MSB */ - wr_reg(0x03, x & 0xFF); /* Column address start LSB */ - wr_reg(0x04, xe >> 8); /* Column address end MSB */ - wr_reg(0x05, xe & 0xFF); /* Column address end LSB */ - - wr_reg(0x06, y >> 8); /* Row address start MSB */ - wr_reg(0x07, y & 0xFF); /* Row address start LSB */ - wr_reg(0x08, ye >> 8); /* Row address end MSB */ - wr_reg(0x09, ye & 0xFF); /* Row address end LSB */ -} - -void GLCD_WindowMax(void) -{ - GLCD_SetWindow (0, 0, GLCD_WIDTH, GLCD_HEIGHT); -} - -void GLCD_SetTextColor(unsigned short color) -{ - Color[TXT_COLOR] = color; -} - -void GLCD_SetBackColor(unsigned short color) -{ - Color[BG_COLOR] = color; -} - -void GLCD_Clear(unsigned short color) -{ - unsigned int i; - - GLCD_WindowMax(); - wr_cmd(0x22); - wr_dat_start(); - - for(i = 0; i < (GLCD_WIDTH*GLCD_HEIGHT); ++i) { - wr_dat_only(color); - } - wr_dat_stop(); -} - - -void GLCD_DrawChar( - unsigned int x, unsigned int y, - unsigned int cw, unsigned int ch, - unsigned char *c) -{ - unsigned int i, j, k, pixs; - - /* Sanity check: out of bounds? */ - if ((x + cw) > GLCD_WIDTH || (y + ch) > GLCD_HEIGHT) { - return; - } - - GLCD_SetWindow(x, y, cw, ch); - - wr_cmd(0x22); - wr_dat_start(); - - k = (cw + 7)/8; - - if (k == 1) { - for (j = 0; j < ch; ++j) { - pixs = *(unsigned char *)c; - c += 1; - - for (i = 0; i < cw; ++i) { - wr_dat_only (Color[(pixs >> i) & 1]); - } - } - } - else if (k == 2) { - for (j = 0; j < ch; ++j) { - pixs = *(unsigned short *)c; - c += 2; - - for (i = 0; i < cw; ++i) { - wr_dat_only (Color[(pixs >> i) & 1]); - } - } - } - wr_dat_stop(); -} - -void GLCD_DisplayChar( - unsigned int ln, unsigned int col, - unsigned char fi, unsigned char c) -{ - c -= 32; - switch (fi) { - case 0: /* Font 9 x 15. */ - GLCD_DrawChar(col * 9, ln * 15, 9, 15, - (unsigned char *)&Font_9x15_h[c * 15]); - break; - } -} - -void GLCD_DisplayString( - unsigned int ln, unsigned int col, - unsigned char fi, char *s) -{ - while (*s) { - GLCD_DisplayChar(ln, col++, fi, *s++); - } -} - - - -void GLCD_ClearLn(unsigned int ln, unsigned char fi) -{ - unsigned char i; - char buf[60]; - - GLCD_WindowMax(); - switch (fi) { - case 0: /* Font 9x15*/ - for (i = 0; i < (GLCD_WIDTH+8)/9; ++i) { - buf[i] = ' '; - } - buf[i+1] = 0; - break; - } - GLCD_DisplayString (ln, 0, fi, buf); -} - -void GLCD_Bitmap(unsigned int x, unsigned int y, - unsigned int w, unsigned int h, - unsigned short *bitmap) -{ - unsigned int i; - unsigned short *bitmap_ptr = bitmap; - - GLCD_SetWindow (x, y, w, h); - - wr_cmd(0x22); - wr_dat_start(); - - for (i = 0; i < (w*h); ++i) { - wr_dat_only (bitmap_ptr[i]); - } - wr_dat_stop(); -} - -void GLCD_Image(void *data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor) -{ - uint32_t i, j = 0; /* for loops */ - const uint32_t x_incr = channels * downsample_factor; /* stride. */ - const uint32_t y_incr = channels * width * (downsample_factor - 1); /* skip rows. */ - uint8_t* src_unsigned = (uint8_t *)data; /* temporary pointer. */ - std_clr_2_lcd_clr_fn cvt_clr_fn = 0; /* colour conversion function. */ - - /* Based on number of channels, we decide which of the above functions to use. */ - switch (channels) { - case 1: - cvt_clr_fn = _GLCD_Gray8_to_RGB565; - break; - - case 3: - cvt_clr_fn = _GLCD_RGB888_to_RGB565; - break; - - default: - printf_err("number of channels not supported by display\n"); - return; - } - - /* Set the window position expected. Note: this is integer div. */ - GLCD_SetWindow(pos_x, pos_y, - width/downsample_factor, height/downsample_factor); - wr_cmd(0x22); - wr_dat_start(); - - /* Loop over the image. */ - for (j = height; j != 0; j -= downsample_factor) { - for (i = width; i != 0; i -= downsample_factor) { - wr_dat_only(cvt_clr_fn(src_unsigned)); - src_unsigned += x_incr; - } - - /* Skip rows if needed. */ - src_unsigned += y_incr; - } - - wr_dat_stop(); -} - -void GLCD_Box( - unsigned int x, unsigned int y, - unsigned int w, unsigned int h, - unsigned short color) -{ - unsigned int i; - - GLCD_SetWindow (x, y, w, h); - - wr_cmd(0x22); - wr_dat_start(); - for(i = 0; i < (w*h); ++i){ - wr_dat_only (color); - } - wr_dat_stop(); -} - - -void GLCD_Initialize (void) -{ - /* CLCD screen setup (Default CLCD screen interface state) ------------- */ - LCD_CS(1); /* deassert nCS0. */ - LCD_RST(1); /* deassert Reset. */ - LCD_BL(0); /* switch off backlight. */ - - /* Reset CLCD screen --------------------------------------------------- */ - LCD_RST(0); /* assert Reset. */ - delay(1); - LCD_RST(1); /* deassert Reset. */ - delay(10); - - /* Driving ability settings ----------------------------------------------*/ - wr_reg(0xEA, 0x00); /* Power control internal used (1). */ - wr_reg(0xEB, 0x20); /* Power control internal used (2). */ - wr_reg(0xEC, 0x0C); /* Source control internal used (1). */ - wr_reg(0xED, 0xC7); /* Source control internal used (2). */ - wr_reg(0xE8, 0x38); /* Source output period Normal mode. */ - wr_reg(0xE9, 0x10); /* Source output period Idle mode. */ - wr_reg(0xF1, 0x01); /* RGB 18-bit interface ;0x0110. */ - wr_reg(0xF2, 0x10); - - /* Adjust the Gamma Curve ------------------------------------------------*/ - wr_reg(0x40, 0x01); - wr_reg(0x41, 0x00); - wr_reg(0x42, 0x00); - wr_reg(0x43, 0x10); - wr_reg(0x44, 0x0E); - wr_reg(0x45, 0x24); - wr_reg(0x46, 0x04); - wr_reg(0x47, 0x50); - wr_reg(0x48, 0x02); - wr_reg(0x49, 0x13); - wr_reg(0x4A, 0x19); - wr_reg(0x4B, 0x19); - wr_reg(0x4C, 0x16); - - wr_reg(0x50, 0x1B); - wr_reg(0x51, 0x31); - wr_reg(0x52, 0x2F); - wr_reg(0x53, 0x3F); - wr_reg(0x54, 0x3F); - wr_reg(0x55, 0x3E); - wr_reg(0x56, 0x2F); - wr_reg(0x57, 0x7B); - wr_reg(0x58, 0x09); - wr_reg(0x59, 0x06); - wr_reg(0x5A, 0x06); - wr_reg(0x5B, 0x0C); - wr_reg(0x5C, 0x1D); - wr_reg(0x5D, 0xCC); - - /* Power voltage setting -------------------------------------------------*/ - wr_reg(0x1B, 0x1B); - wr_reg(0x1A, 0x01); - wr_reg(0x24, 0x2F); - wr_reg(0x25, 0x57); - wr_reg(0x23, 0x88); - - /* Power on setting ------------------------------------------------------*/ - wr_reg(0x18, 0x36); /* Internal oscillator frequency adj. */ - wr_reg(0x19, 0x01); /* Enable internal oscillator. */ - wr_reg(0x01, 0x00); /* Normal mode, no scroll. */ - wr_reg(0x1F, 0x88); /* Power control 6 - DDVDH Off. */ - delay(20); - wr_reg(0x1F, 0x82); /* Power control 6 - Step-up: 3 x VCI. */ - delay(5); - wr_reg(0x1F, 0x92); /* Power control 6 - Step-up: On. */ - delay(5); - wr_reg(0x1F, 0xD2); /* Power control 6 - VCOML active. */ - delay(5); - - /* Color selection -------------------------------------------------------*/ - wr_reg(0x17, 0x55); /* RGB, System interface: 16 Bit/Pixel. */ - wr_reg(0x00, 0x00); /* Scrolling off, no standby. */ - - /* Interface config ------------------------------------------------------*/ - wr_reg(0x2F, 0x11); /* LCD Drive: 1-line inversion. */ - wr_reg(0x31, 0x00); - wr_reg(0x32, 0x00); /* DPL=0, HSPL=0, VSPL=0, EPL=0. */ - - /* Display on setting ----------------------------------------------------*/ - wr_reg(0x28, 0x38); /* PT(0,0) active, VGL/VGL. */ - delay(20); - wr_reg(0x28, 0x3C); /* Display active, VGL/VGL. */ - -#if (LANDSCAPE == 1) -#if (ROTATE180 == 0) - wr_reg (0x16, 0xA8); -#else /* (ROTATE180 == 0) */ - wr_reg (0x16, 0x68); -#endif /* (ROTATE180 == 0) */ -#else /* (LANDSCAPE == 1) */ -#if (ROTATE180 == 0) - wr_reg (0x16, 0x08); -#else /* (ROTATE180 == 0) */ - wr_reg (0x16, 0xC8); -#endif /* (ROTATE180 == 0) */ -#endif /* (LANDSCAPE == 1) */ - - /* Display scrolling settings --------------------------------------------*/ - wr_reg(0x0E, 0x00); /* TFA MSB */ - wr_reg(0x0F, 0x00); /* TFA LSB */ - wr_reg(0x10, 320 >> 8); /* VSA MSB */ - wr_reg(0x11, 320 & 0xFF); /* VSA LSB */ - wr_reg(0x12, 0x00); /* BFA MSB */ - wr_reg(0x13, 0x00); /* BFA LSB */ - - LCD_BL(1); /* turn on backlight */ -} diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/device_mps3.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/device_mps3.h deleted file mode 100644 index e0dea1b..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/device_mps3.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef DEVICE_MPS3_H -#define DEVICE_MPS3_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "cmsis.h" /* CMSIS device header. */ -#include "smm_mps3.h" /* Memory map for MPS3. */ - -#include <stdio.h> - -#define PERIF_CLK (25000000) /* Clock source for APB peripherals */ - -typedef struct _CMSDK_UART_TypeDef_ -{ - __IO uint32_t DATA; /* Offset: 0x000 (R/W) Data Register. */ - __IO uint32_t STATE; /* Offset: 0x004 (R/W) Status Register. */ - __IO uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register. */ - - union { - __I uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register. */ - __O uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register. */ - }; - __IO uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register. */ - -} CMSDK_UART_TypeDef; - -#define CMSDK_UART0 ((CMSDK_UART_TypeDef *)CMSDK_UART0_BASE) - -/* CMSDK_UART DATA Register Definitions. */ -#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position. */ -#define CMSDK_UART_DATA_Msk (0xFFul << CMSDK_UART_DATA_Pos) /* CMSDK_UART DATA: DATA Mask. */ - -/* CMSDK_UART STATE Register Definitions. */ -#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position. */ -#define CMSDK_UART_STATE_RXOR_Msk (0x1ul << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask. */ - -#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position. */ -#define CMSDK_UART_STATE_TXOR_Msk (0x1ul << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask. */ - -#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position. */ -#define CMSDK_UART_STATE_RXBF_Msk (0x1ul << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask. */ - -#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position. */ -#define CMSDK_UART_STATE_TXBF_Msk (0x1ul << CMSDK_UART_STATE_TXBF_Pos ) /* CMSDK_UART STATE: TXBF Mask. */ - -/* CMSDK_UART CTRL Register Definitions. */ -#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position. */ -#define CMSDK_UART_CTRL_HSTM_Msk (0x01ul << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask. */ - -#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position. */ -#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask. */ - -#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position. */ -#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask. */ - -#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position. */ -#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask. */ - -#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position. */ -#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask. */ - -#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position. */ -#define CMSDK_UART_CTRL_RXEN_Msk (0x01ul << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask. */ - -#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position. */ -#define CMSDK_UART_CTRL_TXEN_Msk (0x01ul << CMSDK_UART_CTRL_TXEN_Pos) /* CMSDK_UART CTRL: TXEN Mask. */ - -/* CMSDK_UART INTSTATUS\INTCLEAR Register Definitions. */ -#define CMSDK_UART_INT_RXORIRQ_Pos 3 /* CMSDK_UART INT: RXORIRQ Position. */ -#define CMSDK_UART_INT_RXORIRQ_Msk (0x01ul << CMSDK_UART_INT_RXORIRQ_Pos) /* CMSDK_UART INT: RXORIRQ Mask. */ - -#define CMSDK_UART_INT_TXORIRQ_Pos 2 /* CMSDK_UART INT: TXORIRQ Position. */ -#define CMSDK_UART_INT_TXORIRQ_Msk (0x01ul << CMSDK_UART_INT_TXORIRQ_Pos) /* CMSDK_UART INT: TXORIRQ Mask. */ - -#define CMSDK_UART_INT_RXIRQ_Pos 1 /* CMSDK_UART INT: RXIRQ Position. */ -#define CMSDK_UART_INT_RXIRQ_Msk (0x01ul << CMSDK_UART_INT_RXIRQ_Pos) /* CMSDK_UART INT: RXIRQ Mask. */ - -#define CMSDK_UART_INT_TXIRQ_Pos 0 /* CMSDK_UART INT: TXIRQ Position. */ -#define CMSDK_UART_INT_TXIRQ_Msk (0x01ul << CMSDK_UART_INT_TXIRQ_Pos) /* CMSDK_UART INT: TXIRQ Mask. */ - -/* CMSDK_UART BAUDDIV Register Definitions. */ -#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position. */ -#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFul << CMSDK_UART_BAUDDIV_Pos) - -/** - * @brief Gets the core clock set for MPS3. - * @return Clock value in Hz. - **/ -uint32_t GetMPS3CoreClock(void); - -#ifdef __cplusplus -} -#endif - -#endif /* DEVICE_MPS3_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/font_9x15_h.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/font_9x15_h.h deleted file mode 100644 index b8b6bdc..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/font_9x15_h.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -//Font Generated by MikroElektronika GLCD Font Creator 1.2.0.0 -//MikroElektrnika 2011 -//http://www.mikroe.com - -//GLCD FontName : Lucida_Console9x15 -//GLCD FontSize : 9x15 - -#ifndef FONT_9x15_H_H -#define FONT_9x15_H_H - -const unsigned short Font_9x15_h[] = { - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 32. */ - 0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x10,0x10,0x00,0x00,0x00, /* Code for char num 33. */ - 0x44,0x44,0x44,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 34. */ - 0x00,0x12,0x12,0x24,0x7F,0x24,0x28,0x48,0xFE,0x48,0x90,0x90,0x00,0x00,0x00, /* Code for char num 35. */ - 0x10,0x7C,0x16,0x12,0x12,0x1C,0x38,0x70,0x50,0x50,0x52,0x3E,0x10,0x00,0x00, /* Code for char num 36. */ - 0x00,0x8C,0x92,0x52,0x52,0x2C,0x10,0x08,0x68,0x94,0x92,0x92,0x62,0x00,0x00, /* Code for char num 37. */ - 0x00,0x18,0x24,0x24,0x34,0x18,0x0C,0x12,0xB2,0xE2,0xC2,0xBC,0x00,0x00,0x00, /* Code for char num 38. */ - 0x08,0x08,0x08,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 39. */ - 0xC0,0x60,0x10,0x10,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x10,0x60,0xC0,0x00, /* Code for char num 40. */ - 0x0C,0x18,0x20,0x20,0x40,0x40,0x40,0x40,0x40,0x40,0x20,0x20,0x18,0x0C,0x00, /* Code for char num 41. */ - 0x00,0x10,0x92,0xEE,0x18,0x28,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 42. */ - 0x00,0x00,0x00,0x00,0x10,0x10,0x10,0x10,0xFE,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 43. */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x10,0x08,0x00, /* Code for char num 44. */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 45. */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00, /* Code for char num 46. */ - 0x80,0x40,0x40,0x60,0x20,0x20,0x10,0x10,0x08,0x08,0x0C,0x04,0x04,0x02,0x00, /* Code for char num 47. */ - 0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,0x00, /* Code for char num 48. */ - 0x00,0x10,0x1E,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0xFE,0x00,0x00,0x00, /* Code for char num 49. */ - 0x00,0x3E,0x42,0x40,0x40,0x40,0x20,0x10,0x08,0x04,0x02,0x7E,0x00,0x00,0x00, /* Code for char num 50. */ - 0x00,0x3C,0x40,0x40,0x40,0x60,0x38,0x40,0x40,0x40,0x40,0x3C,0x00,0x00,0x00, /* Code for char num 51. */ - 0x00,0x20,0x30,0x28,0x24,0x24,0x22,0x21,0x7F,0x20,0x20,0x20,0x00,0x00,0x00, /* Code for char num 52. */ - 0x00,0x7C,0x04,0x04,0x04,0x1C,0x20,0x40,0x40,0x40,0x20,0x3C,0x00,0x00,0x00, /* Code for char num 53. */ - 0x00,0x78,0x04,0x04,0x02,0x3A,0x46,0x82,0x82,0x82,0x44,0x38,0x00,0x00,0x00, /* Code for char num 54. */ - 0x00,0xFE,0x80,0x40,0x20,0x20,0x10,0x10,0x08,0x08,0x04,0x04,0x00,0x00,0x00, /* Code for char num 55. */ - 0x00,0x3C,0x42,0x42,0x42,0x24,0x1C,0x62,0x42,0x42,0x42,0x3C,0x00,0x00,0x00, /* Code for char num 56. */ - 0x00,0x38,0x44,0x82,0x82,0x82,0xC4,0xB8,0x80,0x40,0x40,0x3C,0x00,0x00,0x00, /* Code for char num 57. */ - 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00, /* Code for char num 58. */ - 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x18,0x18,0x10,0x08,0x00, /* Code for char num 59. */ - 0x00,0x00,0x00,0x00,0x80,0x60,0x10,0x0C,0x0C,0x10,0x60,0x80,0x00,0x00,0x00, /* Code for char num 60. */ - 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00, /* Code for char num 61. */ - 0x00,0x00,0x00,0x00,0x02,0x0C,0x10,0x60,0x60,0x10,0x0C,0x02,0x00,0x00,0x00, /* Code for char num 62. */ - 0x00,0x3E,0x42,0x42,0x40,0x20,0x10,0x08,0x08,0x00,0x08,0x08,0x00,0x00,0x00, /* Code for char num 63. */ - 0x00,0x78,0x84,0xE2,0x92,0x8A,0x8A,0xCA,0xCA,0xB2,0xA6,0x3C,0x00,0x00,0x00, /* Code for char num 64. */ - 0x00,0x00,0x10,0x38,0x28,0x28,0x44,0x44,0xFE,0x82,0x82,0x82,0x00,0x00,0x00, /* Code for char num 65. */ - 0x00,0x00,0x3E,0x42,0x42,0x22,0x1E,0x22,0x42,0x42,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 66. */ - 0x00,0x00,0xF8,0x06,0x02,0x01,0x01,0x01,0x01,0x02,0x06,0xF8,0x00,0x00,0x00, /* Code for char num 67. */ - 0x00,0x00,0x3E,0x42,0x82,0x82,0x82,0x82,0x82,0x82,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 68. */ - 0x00,0x00,0xFE,0x02,0x02,0x02,0x02,0x7E,0x02,0x02,0x02,0xFE,0x00,0x00,0x00, /* Code for char num 69. */ - 0x00,0x00,0xFE,0x02,0x02,0x02,0x02,0x7E,0x02,0x02,0x02,0x02,0x00,0x00,0x00, /* Code for char num 70. */ - 0x00,0x00,0xF8,0x06,0x02,0x01,0x01,0xE1,0x81,0x82,0x86,0xF8,0x00,0x00,0x00, /* Code for char num 71. */ - 0x00,0x00,0x42,0x42,0x42,0x42,0x42,0x7E,0x42,0x42,0x42,0x42,0x00,0x00,0x00, /* Code for char num 72. */ - 0x00,0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0xFE,0x00,0x00,0x00, /* Code for char num 73. */ - 0x00,0x00,0x3C,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x1E,0x00,0x00,0x00, /* Code for char num 74. */ - 0x00,0x00,0x42,0x22,0x12,0x0A,0x06,0x0A,0x12,0x22,0x42,0x82,0x00,0x00,0x00, /* Code for char num 75. */ - 0x00,0x00,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0xFE,0x00,0x00,0x00, /* Code for char num 76. */ - 0x00,0x00,0x63,0x63,0x63,0x55,0x55,0x55,0x4D,0x49,0x41,0x41,0x00,0x00,0x00, /* Code for char num 77. */ - 0x00,0x00,0x82,0x86,0x8A,0x8A,0x92,0x92,0xA2,0xA2,0xC2,0x82,0x00,0x00,0x00, /* Code for char num 78. */ - 0x00,0x00,0x3C,0x42,0x81,0x81,0x81,0x81,0x81,0x81,0x42,0x3C,0x00,0x00,0x00, /* Code for char num 79. */ - 0x00,0x00,0x3E,0x42,0x42,0x42,0x62,0x1E,0x02,0x02,0x02,0x02,0x00,0x00,0x00, /* Code for char num 80. */ - 0x00,0x00,0x3C,0x42,0x81,0x81,0x81,0x81,0x81,0x81,0x42,0x3C,0x60,0x80,0x00, /* Code for char num 81. */ - 0x00,0x00,0x3E,0x42,0x42,0x42,0x22,0x1E,0x12,0x22,0x42,0x82,0x00,0x00,0x00, /* Code for char num 82. */ - 0x00,0x00,0x7C,0x42,0x02,0x06,0x1C,0x20,0x40,0x40,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 83. */ - 0x00,0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 84. */ - 0x00,0x00,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x44,0x3C,0x00,0x00,0x00, /* Code for char num 85. */ - 0x00,0x00,0x82,0x82,0x82,0x82,0x44,0x44,0x28,0x28,0x38,0x10,0x00,0x00,0x00, /* Code for char num 86. */ - 0x00,0x00,0x82,0x82,0x92,0x92,0xAA,0xAA,0xAA,0xAA,0x64,0x44,0x00,0x00,0x00, /* Code for char num 87. */ - 0x00,0x00,0x82,0x82,0x44,0x28,0x10,0x10,0x28,0x44,0x82,0x82,0x00,0x00,0x00, /* Code for char num 88. */ - 0x00,0x00,0x82,0x82,0x44,0x44,0x28,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 89. */ - 0x00,0x00,0xFF,0x80,0x40,0x20,0x10,0x08,0x04,0x02,0x01,0xFF,0x00,0x00,0x00, /* Code for char num 90. */ - 0xF8,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xF8,0x00, /* Code for char num 91. */ - 0x02,0x04,0x04,0x04,0x08,0x08,0x10,0x10,0x20,0x20,0x20,0x40,0x40,0x80,0x00, /* Code for char num 92. */ - 0x3E,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x3E,0x00, /* Code for char num 93. */ - 0x00,0x10,0x10,0x10,0x28,0x28,0x44,0x44,0x44,0x82,0x00,0x00,0x00,0x00,0x00, /* Code for char num 94. */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00, /* Code for char num 95. */ - 0x10,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 96. */ - 0x00,0x00,0x00,0x00,0x3C,0x40,0x40,0x78,0x44,0x42,0x62,0xDC,0x00,0x00,0x00, /* Code for char num 97. */ - 0x02,0x02,0x02,0x02,0x7A,0x46,0x82,0x82,0x82,0x82,0x46,0x3A,0x00,0x00,0x00, /* Code for char num 98. */ - 0x00,0x00,0x00,0x00,0xF8,0x04,0x02,0x02,0x02,0x02,0x04,0xF8,0x00,0x00,0x00, /* Code for char num 99. */ - 0x80,0x80,0x80,0x80,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xBC,0x00,0x00,0x00, /* Code for char num 100. */ - 0x00,0x00,0x00,0x00,0x38,0x44,0x42,0x7E,0x02,0x02,0x04,0x78,0x00,0x00,0x00, /* Code for char num 101. */ - 0xF0,0x08,0x08,0x08,0xFE,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x00,0x00,0x00, /* Code for char num 102. */ - 0x00,0x00,0x00,0x00,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xBC,0x80,0x40,0x3C, /* Code for char num 103. */ - 0x02,0x02,0x02,0x02,0x3A,0x46,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00, /* Code for char num 104. */ - 0x18,0x18,0x00,0x00,0x1E,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 105. */ - 0x30,0x30,0x00,0x00,0x3C,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x1E, /* Code for char num 106. */ - 0x02,0x02,0x02,0x02,0x42,0x22,0x12,0x0E,0x0A,0x12,0x22,0x42,0x00,0x00,0x00, /* Code for char num 107. */ - 0x1E,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 108. */ - 0x00,0x00,0x00,0x00,0xDA,0xB6,0x92,0x92,0x92,0x92,0x92,0x92,0x00,0x00,0x00, /* Code for char num 109. */ - 0x00,0x00,0x00,0x00,0x3A,0x46,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00, /* Code for char num 110. */ - 0x00,0x00,0x00,0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,0x00, /* Code for char num 111. */ - 0x00,0x00,0x00,0x00,0x7A,0x46,0x82,0x82,0x82,0x82,0x46,0x3A,0x02,0x02,0x02, /* Code for char num 112. */ - 0x00,0x00,0x00,0x00,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xBC,0x80,0x80,0x80, /* Code for char num 113. */ - 0x00,0x00,0x00,0x00,0xF4,0x8C,0x04,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00, /* Code for char num 114. */ - 0x00,0x00,0x00,0x00,0x7C,0x02,0x02,0x0C,0x30,0x40,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 115. */ - 0x00,0x00,0x08,0x08,0xFE,0x08,0x08,0x08,0x08,0x08,0x08,0xF0,0x00,0x00,0x00, /* Code for char num 116. */ - 0x00,0x00,0x00,0x00,0x42,0x42,0x42,0x42,0x42,0x42,0x62,0x5C,0x00,0x00,0x00, /* Code for char num 117. */ - 0x00,0x00,0x00,0x00,0x82,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x00,0x00,0x00, /* Code for char num 118. */ - 0x00,0x00,0x00,0x00,0x82,0x92,0xAA,0xAA,0xAA,0xAA,0x44,0x44,0x00,0x00,0x00, /* Code for char num 119. */ - 0x00,0x00,0x00,0x00,0x82,0x44,0x28,0x10,0x10,0x28,0x44,0x82,0x00,0x00,0x00, /* Code for char num 120. */ - 0x00,0x00,0x00,0x00,0x82,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x10,0x0C,0x00, /* Code for char num 121. */ - 0x00,0x00,0x00,0x00,0xFE,0x80,0x40,0x20,0x10,0x08,0x04,0xFE,0x00,0x00,0x00, /* Code for char num 122. */ - 0xE0,0x10,0x10,0x10,0x10,0x10,0x10,0x0C,0x10,0x10,0x10,0x10,0x10,0xE0,0x00, /* Code for char num 123. */ - 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00, /* Code for char num 124. */ - 0x0E,0x10,0x10,0x10,0x10,0x10,0x10,0x60,0x10,0x10,0x10,0x10,0x10,0x0E,0x00, /* Code for char num 125. */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x62,0x92,0x8C,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 126. */ - 0x00,0x00,0x00,0x07,0x05,0x05,0x05,0x05,0x05,0x05,0x07,0x00,0x00,0x00,0x00 /* Code for char num 127. */ -}; - - -#endif /* FONT_9x15_H_H */
\ No newline at end of file diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/glcd_mps3.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/glcd_mps3.h deleted file mode 100644 index c2810c0..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/glcd_mps3.h +++ /dev/null @@ -1,202 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef GLCD_MPS3_H -#define GLCD_MPS3_H - -#include <stdint.h> - -/****************************************************************************** - Color coding - GLCD is coded: 15..11 red, 10..5 green, 4..0 blue (unsigned short) - GLCD_R5, GLCD_G6, GLCD_B5 - original coding: 17..12 red, 11..6 green, 5..0 blue - ORG_R6, ORG_G6, ORG_B6 - - ORG_R1..5 = GLCD_R0..4, ORG_R0 = GLCD_R4 - ORG_G0..5 = GLCD_G0..5, - ORG_B1..5 = GLCD_B0..4, ORG_B0 = GLCD_B4 - - GLCD RGB color definitions -******************************************************************************/ -#define Black 0x0000 /* 0, 0, 0 */ -#define Navy 0x000F /* 0, 0, 128 */ -#define DarkGreen 0x03E0 /* 0, 128, 0 */ -#define DarkCyan 0x03EF /* 0, 128, 128 */ -#define Maroon 0x7800 /* 128, 0, 0 */ -#define Purple 0x780F /* 128, 0, 128 */ -#define Olive 0x7BE0 /* 128, 128, 0 */ -#define LightGrey 0xC618 /* 192, 192, 192 */ -#define DarkGrey 0x7BEF /* 128, 128, 128 */ -#define Blue 0x001F /* 0, 0, 255 */ -#define Green 0x07E0 /* 0, 255, 0 */ -#define Cyan 0x07FF /* 0, 255, 255 */ -#define Red 0xF800 /* 255, 0, 0 */ -#define Magenta 0xF81F /* 255, 0, 255 */ -#define Yellow 0xFFE0 /* 255, 255, 0 */ -#define White 0xFFFF /* 255, 255, 255 */ - -/************************** Orientation configuration ************************/ -#ifndef LANDSCAPE -#define LANDSCAPE 1 /* 1 for landscape, 0 for portrait. */ -#endif -#ifndef ROTATE180 -#define ROTATE180 1 /* 1 to rotate the screen for 180 deg. */ -#endif - -/*------------------------- Speed dependant settings -------------------------*/ - -/* If processor works on high frequency delay has to be increased, it can be - increased by factor 2^N by this constant. */ -#define DELAY_2N 8 - -/*---------------------- Graphic LCD size definitions ------------------------*/ -#if (LANDSCAPE == 1) - #define GLCD_WIDTH 320 /* Screen Width (in pixels). */ - #define GLCD_HEIGHT 240 /* Screen Hight (in pixels). */ -#else - #define GLCD_WIDTH 240 /* Screen Width (in pixels). */ - #define GLCD_HEIGHT 320 /* Screen Hight (in pixels). */ -#endif - -#define BPP 16 /* Bits per pixel. */ -#define BYPP ((BPP+7)/8) /* Bytes per pixel. */ - - -/** - * @brief Initialize the Himax LCD with HX8347-D LCD Controller. - */ -void GLCD_Initialize(void); - -/** - * @brief Set draw window region to whole screen. - */ -void GLCD_WindowMax(void); - -/** - * @brief Set draw window region. - * @param[in] x Horizontal position. - * @param[in] y Vertical position. - * @param[in] w Window width in pixel. - * @param[in] h Window height in pixels. - */ -void GLCD_SetWindow(unsigned int x, unsigned int y, - unsigned int w, unsigned int h); - -/** - * @brief Set foreground color. - * @param[in] color Foreground color. - */ -void GLCD_SetTextColor(unsigned short color); - -/** - * @brief Set background color. - * @param[in] color Background color. - */ -void GLCD_SetBackColor(unsigned short color); - -/** - * @brief Clear display. - * @param[in] color Display clearing color. - * - */ -void GLCD_Clear(unsigned short color); - -/** - * @brief Draw character on given position. - * @param[in] x Horizontal position. - * @param[in] y Vertical position. - * @param[in] cw Character width in pixel. - * @param[in] ch Character height in pixels. - * @param[in] c Pointer to character bitmap. - * - */ -void GLCD_DrawChar(unsigned int x, unsigned int y, - unsigned int cw, unsigned int ch, - unsigned char *c); - -/** - * @brief Display character on given line. - * @param[in] ln Line number. - * @param[in] col Column number. - * @param[in] fi Font index (0 = 9x15). - * @param[in] c ASCII character. - */ -void GLCD_DisplayChar(unsigned int ln, unsigned int col, - unsigned char fi, unsigned char c); - - -/** - * @brief Display string on given line. - * @param[in] ln Line number. - * @param[in] col Column number. - * @param[in] fi Font index (0 = 9x15). - * @param[in] s Pointer to string. - */ -void GLCD_DisplayString(unsigned int ln, unsigned int col, - unsigned char fi, char *s); - -/** - * @brief Clear given line. - * @param[in] ln: Line number. - * @param[in] fi Font index (0 = 9x15). - */ -void GLCD_ClearLn(unsigned int ln, unsigned char fi); - -/** - * @brief Display graphical bitmap image at position x horizontally and y - * vertically. This function is optimized for 16 bits per pixel - * format, it has to be adapted for any other format. - * @param[in] x Horizontal position. - * @param[in] y Vertical position. - * @param[in] w Width of bitmap. - * @param[in] h Height of bitmap. - * @param[in] bitmap Address at which the bitmap data resides. - */ -void GLCD_Bitmap(unsigned int x, unsigned int y, - unsigned int w, unsigned int h, - unsigned short *bitmap); - -/** - * @brief Displays an 8 bit image, conversion to the LCD's - * 16 bit codec is done on the fly. - * @param[in] data Pointer to the full sized image data. - * @param[in] width Image width. - * @param[in] height Image height. - * @param[in] channels Number of channels in the image. - * @param[in] pos_x Start x position for the LCD. - * @param[in] pos_y Start y position for the LCD. - * @param[in] downsample_factor Factor by which the image - * is downsampled by. - */ -void GLCD_Image(void *data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor); - -/** - * @brief Draw box filled with color. - * @param[in] x Horizontal position. - * @param[in] y Vertical position. - * @param[in] w Window width in pixels. - * @param[in] h Window height in pixels. - * @param[in] color Box color. - */ -void GLCD_Box(unsigned int x, unsigned int y, - unsigned int w, unsigned int h, - unsigned short color); - -#endif /* GLCD_MPS3_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/smm_mps3.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/smm_mps3.h deleted file mode 100644 index 1c0e0f2..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/smm_mps3.h +++ /dev/null @@ -1,615 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef SMM_MPS3_H -#define SMM_MPS3_H - -#include "cmsis.h" /* Device specific header file. */ -#include "peripheral_memmap.h" /* Peripheral memory map definitions. */ - -#if defined ( __CC_ARM ) -#pragma anon_unions -#endif - -/******************************************************************************/ -/* FPGA System Register declaration */ -/******************************************************************************/ - -typedef struct -{ - __IO uint32_t LED; /* Offset: 0x000 (R/W) LED connections - * [31:2] : Reserved - * [1:0] : LEDs - */ - uint32_t RESERVED1[1]; - __IO uint32_t BUTTON; /* Offset: 0x008 (R/W) Buttons - * [31:2] : Reserved - * [1:0] : Buttons - */ - uint32_t RESERVED2[1]; - __IO uint32_t CLK1HZ; /* Offset: 0x010 (R/W) 1Hz up counter */ - __IO uint32_t CLK100HZ; /* Offset: 0x014 (R/W) 100Hz up counter */ - __IO uint32_t COUNTER; /* Offset: 0x018 (R/W) Cycle Up Counter - * Increments when 32-bit prescale counter reach zero - */ - __IO uint32_t PRESCALE; /* Offset: 0x01C (R/W) Prescaler - * Bit[31:0] : reload value for prescale counter - */ - __IO uint32_t PSCNTR; /* Offset: 0x020 (R/W) 32-bit Prescale counter - * current value of the pre-scaler counter - * The Cycle Up Counter increment when the prescale down counter reach 0 - * The pre-scaler counter is reloaded with PRESCALE after reaching 0. - */ - uint32_t RESERVED3[1]; - __IO uint32_t SWITCHES; /* Offset: 0x028 (R/W) Switches - * [31:8] : Reserved - * [7:0] : Switches - */ - uint32_t RESERVED4[8]; - __IO uint32_t MISC; /* Offset: 0x04C (R/W) Misc control - * [31:10] : Reserved - * [9] : - * [8] : - * [7] : ADC_SPI_nCS - * [6] : CLCD_BL_CTRL - * [5] : CLCD_RD - * [4] : CLCD_RS - * [3] : CLCD_RESET - * [2] : SHIELD_1_SPI_nCS - * [1] : SHIELD_0_SPI_nCS - * [0] : CLCD_CS - */ -} MPS3_FPGAIO_TypeDef; - -/* MISC register bit definitions. */ - -#define CLCD_CS_Pos 0 -#define CLCD_CS_Msk (1UL<<CLCD_CS_Pos) -#define SHIELD_0_nCS_Pos 1 -#define SHIELD_0_nCS_Msk (1UL<<SHIELD_0_nCS_Pos) -#define SHIELD_1_nCS_Pos 2 -#define SHIELD_1_nCS_Msk (1UL<<SHIELD_1_nCS_Pos) -#define CLCD_RESET_Pos 3 -#define CLCD_RESET_Msk (1UL<<CLCD_RESET_Pos) -#define CLCD_RS_Pos 4 -#define CLCD_RS_Msk (1UL<<CLCD_RS_Pos) -#define CLCD_RD_Pos 5 -#define CLCD_RD_Msk (1UL<<CLCD_RD_Pos) -#define CLCD_BL_Pos 6 -#define CLCD_BL_Msk (1UL<<CLCD_BL_Pos) -#define ADC_nCS_Pos 7 -#define ADC_nCS_Msk (1UL<<ADC_nCS_Pos) - -/******************************************************************************/ -/* SCC Register declaration */ -/******************************************************************************/ - -typedef struct -{ - __IO uint32_t CFG_REG0; /* Offset: 0x000 (R/W) Remaps block RAM to ZBT - * [31:1] : Reserved - * [0] 1 : REMAP BlockRam to ZBT - */ - __IO uint32_t LEDS; /* Offset: 0x004 (R/W) Controls the MCC user LEDs - * [31:8] : Reserved - * [7:0] : MCC LEDs - */ - uint32_t RESERVED0[1]; - __I uint32_t SWITCHES; /* Offset: 0x00C (R/ ) Denotes the state of the MCC user switches - * [31:8] : Reserved - * [7:0] : These bits indicate state of the MCC switches - */ - __I uint32_t CFG_REG4; /* Offset: 0x010 (R/ ) Denotes the board revision - * [31:4] : Reserved - * [3:0] : Used by the MCC to pass PCB revision. 0 = A 1 = B - */ - __I uint32_t CFG_ACLK; /* Offset: 0x014 (R/ ) System Clock - */ - uint32_t RESERVED1[34]; - __IO uint32_t SYS_CFGDATA_RTN; /* Offset: 0x0A0 (R/W) User data register - * [31:0] : Data - */ - __IO uint32_t SYS_CFGDATA_OUT; /* Offset: 0x0A4 (R/W) User data register - * [31:0] : Data - */ - __IO uint32_t SYS_CFGCTRL; /* Offset: 0x0A8 (R/W) Control register - * [31] : Start (generates interrupt on write to this bit) - * [30] : R/W access - * [29:26] : Reserved - * [25:20] : Function value - * [19:12] : Reserved - * [11:0] : Device (value of 0/1/2 for supported clocks) - */ - __IO uint32_t SYS_CFGSTAT; /* Offset: 0x0AC (R/W) Contains status information - * [31:2] : Reserved - * [1] : Error - * [0] : Complete - */ - __IO uint32_t RESERVED2[20]; - __IO uint32_t SCC_DLL; /* Offset: 0x100 (R/W) DLL Lock Register - * [31:24] : DLL LOCK MASK[7:0] - Indicate if the DLL locked is masked - * [23:16] : DLL LOCK MASK[7:0] - Indicate if the DLLs are locked or unlocked - * [15:1] : Reserved - * [0] : This bit indicates if all enabled DLLs are locked - */ - uint32_t RESERVED3[957]; - __I uint32_t SCC_AID; /* Offset: 0xFF8 (R/ ) SCC AID Register - * [31:24] : FPGA build number - * [23:20] : V2M-MPS3 target board revision (A = 0, B = 1) - * [19:11] : Reserved - * [10] : if “1” SCC_SW register has been implemented - * [9] : if “1” SCC_LED register has been implemented - * [8] : if “1” DLL lock register has been implemented - * [7:0] : number of SCC configuration register - */ - __I uint32_t SCC_ID; /* Offset: 0xFFC (R/ ) Contains information about the FPGA image - * [31:24] : Implementer ID: 0x41 = ARM - * [23:20] : Application note IP variant number - * [19:16] : IP Architecture: 0x4 =AHB - * [15:4] : Primary part number: 386 = AN386 - * [3:0] : Application note IP revision number - */ -} MPS3_SCC_TypeDef; - - -/******************************************************************************/ -/* SSP Peripheral declaration */ -/******************************************************************************/ - -typedef struct -{ - __IO uint32_t CR0; /* Offset: 0x000 (R/W) Control register 0 - * [31:16] : Reserved - * [15:8] : Serial clock rate - * [7] : SSPCLKOUT phase, applicable to Motorola SPI frame format only - * [6] : SSPCLKOUT polarity, applicable to Motorola SPI frame format only - * [5:4] : Frame format - * [3:0] : Data Size Select - */ - __IO uint32_t CR1; /* Offset: 0x004 (R/W) Control register 1 - * [31:4] : Reserved - * [3] : Slave-mode output disable - * [2] : Master or slave mode select - * [1] : Synchronous serial port enable - * [0] : Loop back mode - */ - __IO uint32_t DR; /* Offset: 0x008 (R/W) Data register - * [31:16] : Reserved - * [15:0] : Transmit/Receive FIFO - */ - __I uint32_t SR; /* Offset: 0x00C (R/ ) Status register - * [31:5] : Reserved - * [4] : PrimeCell SSP busy flag - * [3] : Receive FIFO full - * [2] : Receive FIFO not empty - * [1] : Transmit FIFO not full - * [0] : Transmit FIFO empty - */ - __IO uint32_t CPSR; /* Offset: 0x010 (R/W) Clock prescale register - * [31:8] : Reserved - * [8:0] : Clock prescale divisor - */ - __IO uint32_t IMSC; /* Offset: 0x014 (R/W) Interrupt mask set or clear register - * [31:4] : Reserved - * [3] : Transmit FIFO interrupt mask - * [2] : Receive FIFO interrupt mask - * [1] : Receive timeout interrupt mask - * [0] : Receive overrun interrupt mask - */ - __I uint32_t RIS; /* Offset: 0x018 (R/ ) Raw interrupt status register - * [31:4] : Reserved - * [3] : raw interrupt state, prior to masking, of the SSPTXINTR interrupt - * [2] : raw interrupt state, prior to masking, of the SSPRXINTR interrupt - * [1] : raw interrupt state, prior to masking, of the SSPRTINTR interrupt - * [0] : raw interrupt state, prior to masking, of the SSPRORINTR interrupt - */ - __I uint32_t MIS; /* Offset: 0x01C (R/ ) Masked interrupt status register - * [31:4] : Reserved - * [3] : transmit FIFO masked interrupt state, after masking, of the SSPTXINTR interrupt - * [2] : receive FIFO masked interrupt state, after masking, of the SSPRXINTR interrupt - * [1] : receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt - * [0] : receive over run masked interrupt status, after masking, of the SSPRORINTR interrupt - */ - __O uint32_t ICR; /* Offset: 0x020 ( /W) Interrupt clear register - * [31:2] : Reserved - * [1] : Clears the SSPRTINTR interrupt - * [0] : Clears the SSPRORINTR interrupt - */ - __IO uint32_t DMACR; /* Offset: 0x024 (R/W) DMA control register - * [31:2] : Reserved - * [1] : Transmit DMA Enable - * [0] : Receive DMA Enable - */ -} MPS3_SSP_TypeDef; - - -/* SSP_CR0 Control register 0. */ -#define SSP_CR0_DSS_Pos 0 /* Data Size Select. */ -#define SSP_CR0_DSS_Msk (0xF<<SSP_CR0_DSS_Pos) -#define SSP_CR0_FRF_Pos 4 /* Frame Format Select. */ -#define SSP_CR0_FRF_Msk (3UL<<SSP_CR0_FRM_Pos) -#define SSP_CR0_SPO_Pos 6 /* SSPCLKOUT polarity. */ -#define SSP_CR0_SPO_Msk (1UL<<SSP_CR0_SPO_Pos) -#define SSP_CR0_SPH_Pos 7 /* SSPCLKOUT phase. */ -#define SSP_CR0_SPH_Msk (1UL<<SSP_CR0_SPH_Pos) -#define SSP_CR0_SCR_Pos 8 /* Serial Clock Rate (divide). */ -#define SSP_CR0_SCR_Msk (0xFF<<SSP_CR0_SCR_Pos) - -#define SSP_CR0_SCR_DFLT 0x0300 /* Serial Clock Rate (divide), default set at 3. */ -#define SSP_CR0_FRF_MOT 0x0000 /* Frame format. */ -#define SSP_CR0_DSS_8 0x0007 /* Data packet size, 8bits. */ -#define SSP_CR0_DSS_16 0x000F /* Data packet size, 16bits. */ - -/* SSP_CR1 Control register 1. */ -#define SSP_CR1_LBM_Pos 0 /* Loop Back Mode. */ -#define SSP_CR1_LBM_Msk (1UL<<SSP_CR1_LBM_Pos) -#define SSP_CR1_SSE_Pos 1 /* Serial port enable. */ -#define SSP_CR1_SSE_Msk (1UL<<SSP_CR1_SSE_Pos) -#define SSP_CR1_MS_Pos 2 /* Master or Slave mode. */ -#define SSP_CR1_MS_Msk (1UL<<SSP_CR1_MS_Pos) -#define SSP_CR1_SOD_Pos 3 /* Slave Output mode Disable. */ -#define SSP_CR1_SOD_Msk (1UL<<SSP_CR1_SOD_Pos) - -/* SSP_SR Status register. */ -#define SSP_SR_TFE_Pos 0 /* Transmit FIFO empty. */ -#define SSP_SR_TFE_Msk (1UL<<SSP_SR_TFE_Pos) -#define SSP_SR_TNF_Pos 1 /* Transmit FIFO not full. */ -#define SSP_SR_TNF_Msk (1UL<<SSP_SR_TNF_Pos) -#define SSP_SR_RNE_Pos 2 /* Receive FIFO not empty. */ -#define SSP_SR_RNE_Msk (1UL<<SSP_SR_RNE_Pos) -#define SSP_SR_RFF_Pos 3 /* Receive FIFO full. */ -#define SSP_SR_RFF_Msk (1UL<<SSP_SR_RFF_Pos) -#define SSP_SR_BSY_Pos 4 /* Busy. */ -#define SSP_SR_BSY_Msk (1UL<<SSP_SR_BSY_Pos) - -/* SSP_CPSR Clock prescale register. */ -#define SSP_CPSR_CPD_Pos 0 /* Clock prescale divisor. */ -#define SSP_CPSR_CPD_Msk (0xFF<<SSP_CPSR_CDP_Pos) - -#define SSP_CPSR_DFLT 0x0008 /* Clock prescale (use with SCR), default set at 8. */ - -/* SSPIMSC Interrupt mask set and clear register. */ -#define SSP_IMSC_RORIM_Pos 0 /* Receive overrun not Masked. */ -#define SSP_IMSC_RORIM_Msk (1UL<<SSP_IMSC_RORIM_Pos) -#define SSP_IMSC_RTIM_Pos 1 /* Receive timeout not Masked. */ -#define SSP_IMSC_RTIM_Msk (1UL<<SSP_IMSC_RTIM_Pos) -#define SSP_IMSC_RXIM_Pos 2 /* Receive FIFO not Masked. */ -#define SSP_IMSC_RXIM_Msk (1UL<<SSP_IMSC_RXIM_Pos) -#define SSP_IMSC_TXIM_Pos 3 /* Transmit FIFO not Masked. */ -#define SSP_IMSC_TXIM_Msk (1UL<<SSP_IMSC_TXIM_Pos) - -/* SSPRIS Raw interrupt status register. */ -#define SSP_RIS_RORRIS_Pos 0 /* Raw Overrun interrupt flag. */ -#define SSP_RIS_RORRIS_Msk (1UL<<SSP_RIS_RORRIS_Pos) -#define SSP_RIS_RTRIS_Pos 1 /* Raw Timemout interrupt flag. */ -#define SSP_RIS_RTRIS_Msk (1UL<<SSP_RIS_RTRIS_Pos) -#define SSP_RIS_RXRIS_Pos 2 /* Raw Receive interrupt flag. */ -#define SSP_RIS_RXRIS_Msk (1UL<<SSP_RIS_RXRIS_Pos) -#define SSP_RIS_TXRIS_Pos 3 /* Raw Transmit interrupt flag. */ -#define SSP_RIS_TXRIS_Msk (1UL<<SSP_RIS_TXRIS_Pos) - -/* SSPMIS Masked interrupt status register. */ -#define SSP_MIS_RORMIS_Pos 0 /* Masked Overrun interrupt flag. */ -#define SSP_MIS_RORMIS_Msk (1UL<<SSP_MIS_RORMIS_Pos) -#define SSP_MIS_RTMIS_Pos 1 /* Masked Timemout interrupt flag. */ -#define SSP_MIS_RTMIS_Msk (1UL<<SSP_MIS_RTMIS_Pos) -#define SSP_MIS_RXMIS_Pos 2 /* Masked Receive interrupt flag. */ -#define SSP_MIS_RXMIS_Msk (1UL<<SSP_MIS_RXMIS_Pos) -#define SSP_MIS_TXMIS_Pos 3 /* Masked Transmit interrupt flag. */ -#define SSP_MIS_TXMIS_Msk (1UL<<SSP_MIS_TXMIS_Pos) - -/* SSPICR Interrupt clear register. */ -#define SSP_ICR_RORIC_Pos 0 /* Clears Overrun interrupt flag. */ -#define SSP_ICR_RORIC_Msk (1UL<<SSP_ICR_RORIC_Pos) -#define SSP_ICR_RTIC_Pos 1 /* Clears Timemout interrupt flag. */ -#define SSP_ICR_RTIC_Msk (1UL<<SSP_ICR_RTIC_Pos) - -/* SSPDMACR DMA control register. */ -#define SSP_DMACR_RXDMAE_Pos 0 /* Enable Receive FIFO DMA. */ -#define SSP_DMACR_RXDMAE_Msk (1UL<<SSP_DMACR_RXDMAE_Pos) -#define SSP_DMACR_TXDMAE_Pos 1 /* Enable Transmit FIFO DMA. */ -#define SSP_DMACR_TXDMAE_Msk (1UL<<SSP_DMACR_TXDMAE_Pos) - -/******************************************************************************/ -/* Audio and Touch Screen (I2C) Peripheral declaration */ -/******************************************************************************/ - -typedef struct -{ - union { - __O uint32_t CONTROLS; /* Offset: 0x000 CONTROL Set Register ( /W). */ - __I uint32_t CONTROL; /* Offset: 0x000 CONTROL Status Register (R/ ). */ - }; - __O uint32_t CONTROLC; /* Offset: 0x004 CONTROL Clear Register ( /W). */ -} MPS3_I2C_TypeDef; - -#define SDA 1 << 1 -#define SCL 1 << 0 - - -/******************************************************************************/ -/* Audio I2S Peripheral declaration */ -/******************************************************************************/ - -typedef struct -{ - /*!< Offset: 0x000 CONTROL Register (R/W) */ - __IO uint32_t CONTROL; /* <h> CONTROL </h> - * <o.0> TX Enable - * <0=> TX disabled - * <1=> TX enabled - * <o.1> TX IRQ Enable - * <0=> TX IRQ disabled - * <1=> TX IRQ enabled - * <o.2> RX Enable - * <0=> RX disabled - * <1=> RX enabled - * <o.3> RX IRQ Enable - * <0=> RX IRQ disabled - * <1=> RX IRQ enabled - * <o.10..8> TX Buffer Water Level - * <0=> / IRQ triggers when any space available - * <1=> / IRQ triggers when more than 1 space available - * <2=> / IRQ triggers when more than 2 space available - * <3=> / IRQ triggers when more than 3 space available - * <4=> Undefined! - * <5=> Undefined! - * <6=> Undefined! - * <7=> Undefined! - * <o.14..12> RX Buffer Water Level - * <0=> Undefined! - * <1=> / IRQ triggers when less than 1 space available - * <2=> / IRQ triggers when less than 2 space available - * <3=> / IRQ triggers when less than 3 space available - * <4=> / IRQ triggers when less than 4 space available - * <5=> Undefined! - * <6=> Undefined! - * <7=> Undefined! - * <o.16> FIFO reset - * <0=> Normal operation - * <1=> FIFO reset - * <o.17> Audio Codec reset - * <0=> Normal operation - * <1=> Assert audio Codec reset - */ - /*!< Offset: 0x004 STATUS Register (R/ ) */ - __I uint32_t STATUS; /* <h> STATUS </h> - * <o.0> TX Buffer alert - * <0=> TX buffer don't need service yet - * <1=> TX buffer need service - * <o.1> RX Buffer alert - * <0=> RX buffer don't need service yet - * <1=> RX buffer need service - * <o.2> TX Buffer Empty - * <0=> TX buffer have data - * <1=> TX buffer empty - * <o.3> TX Buffer Full - * <0=> TX buffer not full - * <1=> TX buffer full - * <o.4> RX Buffer Empty - * <0=> RX buffer have data - * <1=> RX buffer empty - * <o.5> RX Buffer Full - * <0=> RX buffer not full - * <1=> RX buffer full - */ - union { - /*!< Offset: 0x008 Error Status Register (R/ ) */ - __I uint32_t ERROR; /* <h> ERROR </h> - * <o.0> TX error - * <0=> Okay - * <1=> TX overrun/underrun - * <o.1> RX error - * <0=> Okay - * <1=> RX overrun/underrun - */ - /*!< Offset: 0x008 Error Clear Register ( /W) */ - __O uint32_t ERRORCLR; /* <h> ERRORCLR </h> - * <o.0> TX error - * <0=> Okay - * <1=> Clear TX error - * <o.1> RX error - * <0=> Okay - * <1=> Clear RX error - */ - }; - /*!< Offset: 0x00C Divide ratio Register (R/W) */ - __IO uint32_t DIVIDE; /* <h> Divide ratio for Left/Right clock </h> - * <o.9..0> TX error (default 0x80) - */ - /*!< Offset: 0x010 Transmit Buffer ( /W) */ - __O uint32_t TXBUF; /* <h> Transmit buffer </h> - * <o.15..0> Right channel - * <o.31..16> Left channel - */ - - /*!< Offset: 0x014 Receive Buffer (R/ ) */ - __I uint32_t RXBUF; /* <h> Receive buffer </h> - * <o.15..0> Right channel - * <o.31..16> Left channel - */ - uint32_t RESERVED1[186]; - __IO uint32_t ITCR; /* <h> Integration Test Control Register </h> - * <o.0> ITEN - * <0=> Normal operation - * <1=> Integration Test mode enable - */ - __O uint32_t ITIP1; /* <h> Integration Test Input Register 1</h> - * <o.0> SDIN - */ - __O uint32_t ITOP1; /* <h> Integration Test Output Register 1</h> - * <o.0> SDOUT - * <o.1> SCLK - * <o.2> LRCK - * <o.3> IRQOUT - */ -} MPS3_I2S_TypeDef; - -#define I2S_CONTROL_TXEN_Pos 0 -#define I2S_CONTROL_TXEN_Msk (1UL<<I2S_CONTROL_TXEN_Pos) - -#define I2S_CONTROL_TXIRQEN_Pos 1 -#define I2S_CONTROL_TXIRQEN_Msk (1UL<<I2S_CONTROL_TXIRQEN_Pos) - -#define I2S_CONTROL_RXEN_Pos 2 -#define I2S_CONTROL_RXEN_Msk (1UL<<I2S_CONTROL_RXEN_Pos) - -#define I2S_CONTROL_RXIRQEN_Pos 3 -#define I2S_CONTROL_RXIRQEN_Msk (1UL<<I2S_CONTROL_RXIRQEN_Pos) - -#define I2S_CONTROL_TXWLVL_Pos 8 -#define I2S_CONTROL_TXWLVL_Msk (7UL<<I2S_CONTROL_TXWLVL_Pos) - -#define I2S_CONTROL_RXWLVL_Pos 12 -#define I2S_CONTROL_RXWLVL_Msk (7UL<<I2S_CONTROL_RXWLVL_Pos) -/* FIFO reset. */ -#define I2S_CONTROL_FIFORST_Pos 16 -#define I2S_CONTROL_FIFORST_Msk (1UL<<I2S_CONTROL_FIFORST_Pos) -/* Codec reset. */ -#define I2S_CONTROL_CODECRST_Pos 17 -#define I2S_CONTROL_CODECRST_Msk (1UL<<I2S_CONTROL_CODECRST_Pos) - -#define I2S_STATUS_TXIRQ_Pos 0 -#define I2S_STATUS_TXIRQ_Msk (1UL<<I2S_STATUS_TXIRQ_Pos) - -#define I2S_STATUS_RXIRQ_Pos 1 -#define I2S_STATUS_RXIRQ_Msk (1UL<<I2S_STATUS_RXIRQ_Pos) - -#define I2S_STATUS_TXEmpty_Pos 2 -#define I2S_STATUS_TXEmpty_Msk (1UL<<I2S_STATUS_TXEmpty_Pos) - -#define I2S_STATUS_TXFull_Pos 3 -#define I2S_STATUS_TXFull_Msk (1UL<<I2S_STATUS_TXFull_Pos) - -#define I2S_STATUS_RXEmpty_Pos 4 -#define I2S_STATUS_RXEmpty_Msk (1UL<<I2S_STATUS_RXEmpty_Pos) - -#define I2S_STATUS_RXFull_Pos 5 -#define I2S_STATUS_RXFull_Msk (1UL<<I2S_STATUS_RXFull_Pos) - -#define I2S_ERROR_TXERR_Pos 0 -#define I2S_ERROR_TXERR_Msk (1UL<<I2S_ERROR_TXERR_Pos) - -#define I2S_ERROR_RXERR_Pos 1 -#define I2S_ERROR_RXERR_Msk (1UL<<I2S_ERROR_RXERR_Pos) - -/******************************************************************************/ -/* SMSC9220 Register Definitions */ -/******************************************************************************/ - -typedef struct /* SMSC LAN9220 */ -{ -__I uint32_t RX_DATA_PORT; /* Receive FIFO Ports (offset 0x0). */ - uint32_t RESERVED1[0x7]; -__O uint32_t TX_DATA_PORT; /* Transmit FIFO Ports (offset 0x20). */ - uint32_t RESERVED2[0x7]; - -__I uint32_t RX_STAT_PORT; /* Receive FIFO status port (offset 0x40). */ -__I uint32_t RX_STAT_PEEK; /* Receive FIFO status peek (offset 0x44). */ -__I uint32_t TX_STAT_PORT; /* Transmit FIFO status port (offset 0x48). */ -__I uint32_t TX_STAT_PEEK; /* Transmit FIFO status peek (offset 0x4C). */ - -__I uint32_t ID_REV; /* Chip ID and Revision (offset 0x50). */ -__IO uint32_t IRQ_CFG; /* Main Interrupt Configuration (offset 0x54). */ -__IO uint32_t INT_STS; /* Interrupt Status (offset 0x58). */ -__IO uint32_t INT_EN; /* Interrupt Enable Register (offset 0x5C). */ - uint32_t RESERVED3; /* Reserved for future use (offset 0x60). */ -__I uint32_t BYTE_TEST; /* Read-only byte order testing register 87654321h (offset 0x64). */ -__IO uint32_t FIFO_INT; /* FIFO Level Interrupts (offset 0x68). */ -__IO uint32_t RX_CFG; /* Receive Configuration (offset 0x6C). */ -__IO uint32_t TX_CFG; /* Transmit Configuration (offset 0x70). */ -__IO uint32_t HW_CFG; /* Hardware Configuration (offset 0x74). */ -__IO uint32_t RX_DP_CTL; /* RX Datapath Control (offset 0x78). */ -__I uint32_t RX_FIFO_INF; /* Receive FIFO Information (offset 0x7C). */ -__I uint32_t TX_FIFO_INF; /* Transmit FIFO Information (offset 0x80). */ -__IO uint32_t PMT_CTRL; /* Power Management Control (offset 0x84). */ -__IO uint32_t GPIO_CFG; /* General Purpose IO Configuration (offset 0x88). */ -__IO uint32_t GPT_CFG; /* General Purpose Timer Configuration (offset 0x8C). */ -__I uint32_t GPT_CNT; /* General Purpose Timer Count (offset 0x90). */ - uint32_t RESERVED4; /* Reserved for future use (offset 0x94). */ -__IO uint32_t ENDIAN; /* WORD SWAP Register (offset 0x98). */ -__I uint32_t FREE_RUN; /* Free Run Counter (offset 0x9C). */ -__I uint32_t RX_DROP; /* RX Dropped Frames Counter (offset 0xA0). */ -__IO uint32_t MAC_CSR_CMD; /* MAC CSR Synchronizer Command (offset 0xA4). */ -__IO uint32_t MAC_CSR_DATA; /* MAC CSR Synchronizer Data (offset 0xA8). */ -__IO uint32_t AFC_CFG; /* Automatic Flow Control Configuration (offset 0xAC). */ -__IO uint32_t E2P_CMD; /* EEPROM Command (offset 0xB0). */ -__IO uint32_t E2P_DATA; /* EEPROM Data (offset 0xB4). */ - -} SMSC9220_TypeDef; - -/* SMSC9220 MAC Registers Indices. */ -#define SMSC9220_MAC_CR 0x1 -#define SMSC9220_MAC_ADDRH 0x2 -#define SMSC9220_MAC_ADDRL 0x3 -#define SMSC9220_MAC_HASHH 0x4 -#define SMSC9220_MAC_HASHL 0x5 -#define SMSC9220_MAC_MII_ACC 0x6 -#define SMSC9220_MAC_MII_DATA 0x7 -#define SMSC9220_MAC_FLOW 0x8 -#define SMSC9220_MAC_VLAN1 0x9 -#define SMSC9220_MAC_VLAN2 0xA -#define SMSC9220_MAC_WUFF 0xB -#define SMSC9220_MAC_WUCSR 0xC - -/* SMSC9220 PHY Registers Indices. */ -#define SMSC9220_PHY_BCONTROL 0x0 -#define SMSC9220_PHY_BSTATUS 0x1 -#define SMSC9220_PHY_ID1 0x2 -#define SMSC9220_PHY_ID2 0x3 -#define SMSC9220_PHY_ANEG_ADV 0x4 -#define SMSC9220_PHY_ANEG_LPA 0x5 -#define SMSC9220_PHY_ANEG_EXP 0x6 -#define SMSC9220_PHY_MCONTROL 0x17 -#define SMSC9220_PHY_MSTATUS 0x18 -#define SMSC9220_PHY_CSINDICATE 0x27 -#define SMSC9220_PHY_INTSRC 0x29 -#define SMSC9220_PHY_INTMASK 0x30 -#define SMSC9220_PHY_CS 0x31 - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ - -#define MPS3_TS_I2C ((MPS3_I2C_TypeDef *) MPS3_I2C0_BASE ) -#define MPS3_AAIC_I2C ((MPS3_I2C_TypeDef *) MPS3_I2C1_BASE ) -#define MPS3_CAM_I2C2 ((MPS3_I2C_TypeDef *) MPS3_I2C2_BASE ) -#define MPS3_CAM_I2C3 ((MPS3_I2C_TypeDef *) MPS3_I2C3_BASE ) -#define MPS3_AAIC_I2S ((MPS3_I2S_TypeDef *) MPS3_AAIC_I2S_BASE ) -#define MPS3_FPGAIO ((MPS3_FPGAIO_TypeDef *) MPS3_FPGAIO_BASE ) -#define MPS3_SCC ((MPS3_SCC_TypeDef *) MPS3_SCC_BASE ) -#define MPS3_SSP0 ((MPS3_SSP_TypeDef *) MPS3_SSP0_BASE ) -#define MPS3_SSP1 ((MPS3_SSP_TypeDef *) MPS3_SSP1_BASE ) -#define MPS3_SSP2 ((MPS3_SSP_TypeDef *) MPS3_SSP2_BASE ) -#define MPS3_SSP3 ((MPS3_SSP_TypeDef *) MPS3_SSP3_BASE ) -#define MPS3_SSP4 ((MPS3_SSP_TypeDef *) MPS3_SSP4_BASE ) -#define SMSC9220 ((SMSC9220_TypeDef *) SMSC9220_BASE) - -/******************************************************************************/ -/* Secure Peripheral declaration */ -/******************************************************************************/ - -#define SEC_TS_I2C ((MPS3_I2C_TypeDef *) SEC_MPS3_I2C0_BASE ) -#define SEC_AAIC_I2C ((MPS3_I2C_TypeDef *) SEC_MPS3_I2C1_BASE ) -#define SEC_AAIC_I2S ((MPS3_I2S_TypeDef *) SEC_MPS3_AAIC_I2S_BASE ) -#define SEC_FPGAIO ((MPS3_FPGAIO_TypeDef *) SEC_MPS3_FPGAIO_BASE ) -#define SEC_SCC ((MPS3_SCC_TypeDef *) SEC_MPS3_SCC_BASE ) -#define SEC_SSP0 ((MPS3_SSP_TypeDef *) SEC_SSP0_BASE ) -#define SEC_SSP1 ((MPS3_SSP_TypeDef *) SEC_SSP1_BASE ) -#define SEC_SSP2 ((MPS3_SSP_TypeDef *) SEC_MPS3_SSP2_BASE ) -#define SEC_SMSC9220 ((SMSC9220_TypeDef *) SEC_SMSC9220_BASE) - -#endif /* SMM_MPS3_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/timer_mps3.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/timer_mps3.h deleted file mode 100644 index 14d64e5..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/include/timer_mps3.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef TIMER_MPS3_H -#define TIMER_MPS3_H - -#include <stdint.h> -#include <time.h> - -/* Container for timestamp up-counters. */ -typedef struct _mps3_time_counter { - uint32_t counter_1Hz; - uint32_t counter_100Hz; - - /* Running at FPGA clock rate. See GetMPS3CoreClock(). */ - uint32_t counter_fpga; - - /* Running at processor core's internal clock rate, triggered by SysTick. */ - uint64_t counter_systick; -} mps3_time_counter; - -/** - * @brief Resets the counters. - */ -void timer_reset(void); - -/** - * @brief Gets the current counter values. - * @returns Mps3 timer counter. - **/ -mps3_time_counter get_time_counter(void); - -/** - * @brief Gets the duration elapsed between two counters in milliseconds. - * @param[in] start Pointer to mps3_time_counter value at start time. - * @param[in] end Pointer to mps3_time_counter value at end. - * @returns Difference in milliseconds between the two give counters - * expressed as an unsigned integer. - **/ -uint32_t get_duration_milliseconds(mps3_time_counter *start, - mps3_time_counter *end); - -/** - * @brief Gets the duration elapsed between two counters in microseconds. - * @param[in] start Pointer to mps3_time_counter value at start time. - * @param[in] end Pointer to mps3_time_counter value at end. - * @returns Difference in microseconds between the two give counters - * expressed as an unsigned integer. - **/ -uint32_t get_duration_microseconds(mps3_time_counter *start, - mps3_time_counter *end); - -/** - * @brief Gets the cycle counts elapsed between start and end. - * @param[in] start Pointer to mps3_time_counter value at start time. - * @param[in] end Pointer to mps3_time_counter value at end. - * @return Difference in counter values as 32 bit unsigned integer. - **/ -uint64_t get_cycle_count_diff(mps3_time_counter *start, - mps3_time_counter *end); - -/** - * @brief Enables or triggers cycle counting mechanism, if required - * by the platform. - **/ -void start_cycle_counter(void); - -/** - * @brief Stops cycle counting mechanism, if required by the platform. - **/ -void stop_cycle_counter(void); - -#endif /* TIMER_MPS3_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c deleted file mode 100644 index c0c3bdf..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "timer_mps3.h" - -#include "bsp_core_log.h" -#include "device_mps3.h" - -#include <inttypes.h> - -void timer_reset(void) -{ - MPS3_FPGAIO->CLK1HZ = 0; - MPS3_FPGAIO->CLK100HZ = 0; - MPS3_FPGAIO->COUNTER = 0; - - if (0 != Init_SysTick()) { - printf_err("Failed to initialise system tick config\n"); - } - debug("system tick config ready\n"); -} - -mps3_time_counter get_time_counter(void) -{ - mps3_time_counter t = { - .counter_1Hz = MPS3_FPGAIO->CLK1HZ, - .counter_100Hz = MPS3_FPGAIO->CLK100HZ, - .counter_fpga = MPS3_FPGAIO->COUNTER, - .counter_systick = Get_SysTick_Cycle_Count() - }; - debug("Timestamp:\n"); - debug("\tCounter 1 Hz: %" PRIu32 "\n", t.counter_1Hz); - debug("\tCounter 100 Hz: %" PRIu32 "\n", t.counter_100Hz); - debug("\tCounter FPGA: %" PRIu32 "\n", t.counter_fpga); - debug("\tCounter CPU: %" PRIu64 "\n", t.counter_systick); - return t; -} - -/** - * Please note, that there are no checks for overflow in this function => if - * the time elapsed has been big (in days) this could happen and is currently - * not handled. - **/ -uint32_t get_duration_milliseconds(mps3_time_counter *start, - mps3_time_counter *end) -{ - uint32_t time_elapsed = 0; - if (end->counter_100Hz > start->counter_100Hz) { - time_elapsed = (end->counter_100Hz - start->counter_100Hz) * 10; - } else { - time_elapsed = (end->counter_1Hz - start->counter_1Hz) * 1000 + - ((0xFFFFFFFF - start->counter_100Hz) + end->counter_100Hz + 1) * 10; - } - - /* If the time elapsed is less than 100ms, use microseconds count to be - * more precise */ - if (time_elapsed < 100) { - debug("Using the microsecond function instead..\n"); - return get_duration_microseconds(start, end)/1000; - } - - return time_elapsed; -} - -/** - * Like the microsecond counterpart, this function could return wrong results when - * the counter (MAINCLK) overflows. There are no overflow counters available. - **/ -uint32_t get_duration_microseconds(mps3_time_counter *start, - mps3_time_counter *end) -{ - const int divisor = GetMPS3CoreClock()/1000000; - uint32_t time_elapsed = 0; - if (end->counter_fpga > start->counter_fpga) { - time_elapsed = (end->counter_fpga - start->counter_fpga)/divisor; - } else { - time_elapsed = ((0xFFFFFFFF - end->counter_fpga) - + start->counter_fpga + 1)/divisor; - } - return time_elapsed; -} - -uint64_t get_cycle_count_diff(mps3_time_counter *start, - mps3_time_counter *end) -{ - if (start->counter_systick > end->counter_systick) { - warn("start > end; counter might have overflown\n"); - } - return end->counter_systick - start->counter_systick; -} - -void start_cycle_counter(void) -{ - /* Nothing to do for FPGA */ -} - -void stop_cycle_counter(void) -{ - /* Nothing to do for FPGA */ -} diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/uart_stdout.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/uart_stdout.c deleted file mode 100644 index 35d4160..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/uart_stdout.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "uart_stdout.h" - -#include "device_mps3.h" - -#include <stdio.h> - -#define CNTLQ 0x11 -#define CNTLS 0x13 -#define DEL 0x7F -#define BACKSPACE 0x08 -#define CR 0x0D -#define LF 0x0A -#define ESC 0x1B - -void UartStdOutInit(void) -{ - CMSDK_UART0->BAUDDIV = PERIF_CLK / 115200; /* => (25 or 32 MHz) / (115200 bps). */ - CMSDK_UART0->CTRL = ((1ul << 0) | /* TX enable. */ - (1ul << 1) ); /* RX enable. */ - return; -} - -unsigned char UartPutc(unsigned char my_ch) -{ - while ((CMSDK_UART0->STATE & 1)); /* Wait if Transmit Holding register is full. */ - - if (my_ch == '\n') { - CMSDK_UART0->DATA = '\r'; - while ((CMSDK_UART0->STATE & 1)); /* Wait if Transmit Holding register is full. */ - } - - CMSDK_UART0->DATA = my_ch; /* Write to transmit holding register. */ - return (my_ch); -} - -unsigned char UartGetc(void) -{ - unsigned char my_ch; - unsigned int cnt; - - /* Wait if Receive Holding register is empty. */ - while (0 == (CMSDK_UART0->STATE & 2)) { - cnt = MPS3_FPGAIO->CLK100HZ / 50; - if (cnt & 0x8) { - MPS3_FPGAIO->LED = 0x01 << (cnt & 0x7); - } - else { - MPS3_FPGAIO->LED = 0x80 >> (cnt & 0x7); - } - } - - my_ch = CMSDK_UART0->DATA; - - /* Convert CR to LF. */ - if(my_ch == '\r') { - my_ch = '\n'; - } - - return (my_ch); -} - -bool GetLine(char *lp, unsigned int len) -{ - unsigned int cnt = 0; - char c; - - do { - c = UartGetc (); - switch (c) { - case CNTLQ: /* Ignore Control S/Q. */ - case CNTLS: - break; - - case BACKSPACE: - case DEL: - if (cnt == 0) { - break; - } - cnt--; /* Decrement count. */ - lp--; /* Decrement line pointer. */ - UartPutc (0x08); /* Echo backspace. */ - UartPutc (' '); - UartPutc (0x08); - fflush (stdout); - break; - - case ESC: - case 0: - *lp = 0; /* ESC - stop editing line. */ - return false; - - case CR: /* CR - done, stop editing line. */ - UartPutc (*lp = c); /* Echo and store character. */ - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - c = LF; - UartPutc (*lp = c); /* Echo and store character. */ - fflush (stdout); - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - break; - default: - UartPutc (*lp = c); /* Echo and store character. */ - fflush (stdout); - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - break; - } - } while (cnt < len - 2 && c != LF); /* Check limit and CR. */ - *lp = 0; /* Mark end of string. */ - - return true; -} - -__attribute__((noreturn)) void UartEndSimulation(int code) -{ - UartPutc((char) 0x4); /* End of simulation */ - UartPutc((char) code); /* End of simulation */ - while(1); -} diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/include/stubs_simple_platform.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/include/stubs_simple_platform.h deleted file mode 100644 index 9977cd2..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/include/stubs_simple_platform.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef STUBS_SIMPLE_PLATFORM_H -#define STUBS_SIMPLE_PLATFORM_H - -#include "cmsis.h" /* device specific header file */ -#include "peripheral_memmap.h" /* peripheral memory map definitions */ - -/****************************************************************************/ -/* Definitions and stub functions for modules currently */ -/* unavailable on this target platform */ -/****************************************************************************/ -#define GLCD_WIDTH 320 -#define GLCD_HEIGHT 240 -#define Black 0x0000 /* 0, 0, 0 */ -#define White 0xFFFF /* 255, 255, 255 */ - -/*********************** Clock related functions *****************************/ -uint32_t GetCoreClock(void); - -/************************ GLCD related functions ****************************/ -/** - * @brief Initialize the Himax LCD with HX8347-D LCD Controller - */ -void GLCD_Initialize(void); - -/** - * @brief Display graphical bitmap image at position x horizontally and y - * vertically. This function is optimized for 16 bits per pixel - * format, it has to be adapted for any other format. - * @param[in] x horizontal position. - * @param[in] y vertical position. - * @param[in] w width of bitmap. - * @param[in] h height of bitmap. - * @param[in] bitmap address at which the bitmap data resides. - */ -void GLCD_Bitmap(unsigned int x, unsigned int y, - unsigned int w, unsigned int h, - unsigned short *bitmap); - -/** - * @brief Displays an 8 bit image, conversion to the LCD's - * 16 bit codec is done on the fly. - * @param[in] data pointer to the full sized image data. - * @param[in] width image width. - * @param[in] height image height. - * @param[in] channels number of channels in the image. - * @param[in] pos_x start x position for the LCD. - * @param[in] pos_y start y position for the LCD. - * @param[in] downsample_factor factor by which the image - * is downsampled by. - */ -void GLCD_Image(void *data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor); - -/** - * @brief Clear display - * @param[in] color display clearing color - */ -void GLCD_Clear(unsigned short color); - -/** - * @brief Set foreground color - * @param[in] color foreground color - */ -void GLCD_SetTextColor(unsigned short color); - -/** - * @brief Display character on given line - * @param[in] ln line number - * @param[in] col column number - * @param[in] fi font index (0 = 9x15) - * @param[in] c ASCII character - */ -void GLCD_DisplayChar(unsigned int ln, unsigned int col, - unsigned char fi, unsigned char c); - -/** - * @brief Display string on given line - * @param[in] ln line number - * @param[in] col column number - * @param[in] fi font index (0 = 9x15) - * @param[in] s pointer to string - */ -void GLCD_DisplayString(unsigned int ln, unsigned int col, - unsigned char fi, char *s); - -/** - * @brief Draw box filled with color - * @param[in] x horizontal position - * @param[in] y: vertical position - * @param[in] w: window width in pixels - * @param[in] h: window height in pixels - * @param[in] color box color - */ -void GLCD_Box(unsigned int x, unsigned int y, - unsigned int w, unsigned int h, - unsigned short color); - -#endif /* STUBS_SIMPLE_PLATFORM_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/include/timer_simple_platform.h b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/include/timer_simple_platform.h deleted file mode 100644 index 320a57a..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/include/timer_simple_platform.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef TIMER_SIMPLE_PLATFORM_H -#define TIMER_SIMPLE_PLATFORM_H - -#include "stubs_simple_platform.h" - -/* Container for timestamp for simple platform. */ -typedef struct _generic_time_counter { - uint64_t counter_systick; -} generic_time_counter; - -/** - * @brief Resets the counters. - */ -void timer_reset(void); - -/** - * @brief Gets the current counter values. - * @returns counter struct. - **/ -generic_time_counter get_time_counter(void); - -/** - * @brief Gets the cycle counts elapsed between start and end. - * @return difference in counter values as 32 bit unsigned integer. - */ -uint64_t get_cycle_count_diff(generic_time_counter *start, generic_time_counter *end); - -/** - * @brief Enables or triggers cycle counting mechanism, if required - * by the platform. - */ -void start_cycle_counter(void); - -/** - * @brief Stops cycle counting mechanism, if required by the platform. - */ -void stop_cycle_counter(void); - -#endif /* TIMER_SIMPLE_PLATFORM_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/stubs_simple_platform.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/stubs_simple_platform.c deleted file mode 100644 index df11adb..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/stubs_simple_platform.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "stubs_simple_platform.h" - -#include "bsp_core_log.h" - -#include <inttypes.h> - -uint32_t GetCoreClock(void) -{ - return 1; -} - -void GLCD_Initialize(void) {} - -void GLCD_Bitmap(unsigned int x, unsigned int y, - unsigned int w, unsigned int h, unsigned short *bitmap) -{ - UNUSED(x); - UNUSED(y); - UNUSED(w); - UNUSED(h); - UNUSED(bitmap); -} - -void GLCD_Image(void *data, const uint32_t width, const uint32_t height, - const uint32_t channels, const uint32_t pos_x, - const uint32_t pos_y, const uint32_t downsample_factor) -{ - UNUSED(data); - UNUSED(pos_x); - UNUSED(pos_y); - UNUSED(width); - UNUSED(height); - UNUSED(channels); - UNUSED(downsample_factor); - debug("image display: (x, y, w, h) = " - "(%" PRIu32 ", %" PRIu32 ", %" PRIu32 ", %" PRIu32 ")\n", - pos_x, pos_y, width, height); - debug("image display: channels = %" PRIu32 ", downsample factor = %" PRIu32 "\n", - channels, downsample_factor); -} - -void GLCD_Clear(unsigned short color) -{ - UNUSED(color); -} - -void GLCD_SetTextColor(unsigned short color) -{ - UNUSED(color); -} - -void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char fi, - unsigned char c) -{ - UNUSED(ln); - UNUSED(col); - UNUSED(fi); - UNUSED(c); -} - -void GLCD_DisplayString(unsigned int ln, unsigned int col, unsigned char fi, - char *s) -{ - UNUSED(ln); - UNUSED(col); - UNUSED(fi); - UNUSED(s); - debug("text display: %s\n", s); -} - -void GLCD_Box(unsigned int x, unsigned int y, unsigned int w, unsigned int h, - unsigned short color) -{ - UNUSED(x); - UNUSED(y); - UNUSED(w); - UNUSED(h); - UNUSED(color); -} - -void LED_Initialize(uint32_t port) -{ - UNUSED(port); -} - -void LED_On(uint32_t num, uint32_t port) -{ - UNUSED(num); - UNUSED(port); - debug("LED %" PRIu32 " ON\n", num); -} - -void LED_Off(uint32_t num, uint32_t port) -{ - UNUSED(num); - UNUSED(port); - debug("LED %" PRIu32 " OFF\n", num); -} diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/timer_simple_platform.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/timer_simple_platform.c deleted file mode 100644 index 6914209..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/timer_simple_platform.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "timer_simple_platform.h" - -#include "irqs.h" -#include "bsp_core_log.h" - -#include <inttypes.h> - -generic_time_counter get_time_counter(void) -{ - generic_time_counter t = { - .counter_systick = Get_SysTick_Cycle_Count() - }; - debug("counter_systick: %" PRIu64 "\n", t.counter_systick); - return t; -} - -void timer_reset(void) -{ - if (0 != Init_SysTick()) { - printf_err("Failed to initialise system tick config\n"); - } - debug("system tick config ready\n"); -} - -uint64_t get_cycle_count_diff(generic_time_counter *start, - generic_time_counter *end) -{ - if (start->counter_systick > end->counter_systick) { - warn("start > end; counter might have overflown\n"); - } - return end->counter_systick - start->counter_systick; -} - -void start_cycle_counter(void) -{ - /* Add any custom requirement for this platform here */ -} - -void stop_cycle_counter(void) -{ - /* Add any custom requirement for this platform here */ -} diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/uart_pl011.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/uart_pl011.c deleted file mode 100644 index 1cbf70c..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/simple_platform/uart_pl011.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "uart_stdout.h" -#include "peripheral_memmap.h" /* peripheral memory map definitions */ - -#include <stdio.h> -#include <stdint.h> - -#define CNTLQ 0x11 -#define CNTLS 0x13 -#define DEL 0x7F -#define BACKSPACE 0x08 -#define CR 0x0D -#define LF 0x0A -#define ESC 0x1B - -#define UARTBASE (PL011_UART0_BASE) - -/*****************************************************************************/ -/* UART Control Register Locations */ -/*****************************************************************************/ -#define UART0_DR *((volatile unsigned *) UARTBASE) -#define UART0_RSR *((volatile unsigned *)(UARTBASE + 0x04)) -#define UART0_ECR *((volatile unsigned *)(UARTBASE + 0x04)) -#define UART0_LCRH *((volatile unsigned *)(UARTBASE + 0x2C)) -#define UART0_LCRM *((volatile unsigned *)(UARTBASE + 0x28)) -#define UART0_LCRL *((volatile unsigned *)(UARTBASE + 0x24)) -#define UART0_CR *((volatile unsigned *)(UARTBASE + 0x30)) -#define UART0_FR *((volatile unsigned *)(UARTBASE + 0x18)) -#define UART0_IIR *((volatile unsigned *)(UARTBASE + 0x1C)) -#define UART0_ICR *((volatile unsigned *)(UARTBASE + 0x44)) - -/*****************************************************************************/ -/* Received Status Register - RSR */ -/*****************************************************************************/ -#define RSR_OVERRUN_ERROR 0x08 -#define RSR_BREAK_ERROR 0x04 -#define RSR_PARITY_ERROR 0x02 -#define RSR_FRAMING_ERROR 0x01 - -/*****************************************************************************/ -/* Line Control High Byte Register - LCRH */ -/*****************************************************************************/ -#define LCRH_WORD_LENGTH_8 0x60 -#define LCRH_WORD_LENGTH_7 0x40 -#define LCRH_WORD_LENGTH_6 0x20 -#define LCRH_WORD_LENGTH_5 0x00 -#define LCRH_FIFO_ENABLED 0x10 -#define LCRH_2_STOP_BITS 0x08 -#define LCRH_EVEN_PARITY 0x04 -#define LCRH_PARITY_ENABLE 0x02 -#define LCRH_SEND_BREAK 0x01 - -/*****************************************************************************/ -/* Line Control Medium Byte Register - LCRM */ -/* This register specifies the high byte of the Baud rate divisor */ -/*****************************************************************************/ -#define LCRM_BAUD_460800 0x00 -#define LCRM_BAUD_230400 0x00 -#define LCRM_BAUD_115200 0x00 -#define LCRM_BAUD_76800 0x00 -#define LCRM_BAUD_57600 0x00 -#define LCRM_BAUD_38400 0x00 -#define LCRM_BAUD_19200 0x00 -#define LCRM_BAUD_14400 0x00 -#define LCRM_BAUD_9600 0x00 -#define LCRM_BAUD_2400 0x01 -#define LCRM_BAUD_1200 0x02 - -/*****************************************************************************/ -/* Line Control Low Byte Register - LCRL */ -/* This register specifies the low byte of the Baud rate divisor */ -/*****************************************************************************/ -#define LCRL_BAUD_460800 0x01 -#define LCRL_BAUD_230400 0x03 -#define LCRL_BAUD_115200 0x07 -#define LCRL_BAUD_76800 0x0B -#define LCRL_BAUD_57600 0x0F -#define LCRL_BAUD_38400 0xC -#define LCRL_BAUD_19200 0x2F -#define LCRL_BAUD_14400 0x3F -#define LCRL_BAUD_9600 0x5F -#define LCRL_BAUD_2400 0x7F -#define LCRL_BAUD_1200 0xFF - -/*****************************************************************************/ -/* Control Register - CR */ -/*****************************************************************************/ -#define CR_LOOP_BACK_EN 0x80 -#define CR_TIMEOUT_INT_EN 0x40 -#define CR_TX_INT_ENABLE 0x100 -#define CR_RX_INT_ENABLE 0x200 -#define CR_MODSTAT_INT_EN 0x08 -#define CR_UART_ENABLE 0x01 - -/*****************************************************************************/ -/* Flag Register - FR */ -/*****************************************************************************/ -#define FR_TX_FIFO_EMPTY 0x80 -#define FR_RX_FIFO_FULL 0x40 -#define FR_TX_FIFO_FULL 0x20 -#define FR_RX_FIFO_EMPTY 0x10 -#define FR_BUSY 0x08 -#define FR_CARRIER_DETECT 0x04 -#define FR_SET_READY 0x02 -#define FR_CLEAR_TO_SEND 0x01 - -/*****************************************************************************/ -/* Interrupt Identification Register - IIR */ -/*****************************************************************************/ -#define IIR_RX_TIME_OUT 0x08 -#define IIR_TX 0x04 -#define IIR_RX 0x02 -#define IIR_MODEM 0x01 - -void UartStdOutInit(void) -{ - /* Disable the serial port while setting the baud rate and word length. */ - UART0_CR = 0; - - /* Clear the receive status register. */ - UART0_ECR = 0; - - /* Set the correct baud rate and word length. */ - UART0_LCRL = LCRL_BAUD_115200; - UART0_LCRM = LCRM_BAUD_115200; - UART0_LCRH = LCRH_WORD_LENGTH_8; - - /* Explicitly disable FIFO's for char mode. */ - UART0_LCRH &= ~LCRH_FIFO_ENABLED; - - /* Enable UART0 (and RX/TX) without interrupts. */ - UART0_CR = CR_UART_ENABLE | CR_TX_INT_ENABLE | CR_RX_INT_ENABLE; -} - -unsigned char UartPutc(unsigned char ch) -{ - if (ch == '\n') { - (void) UartPutc('\r'); - } - while (UART0_FR & FR_TX_FIFO_FULL) - ; - UART0_DR = ch; - - return ch; -} - -unsigned char UartGetc(void) -{ - unsigned char c; - while (UART0_FR & FR_RX_FIFO_EMPTY) - ; - c = UART0_DR; - if (c == '\r') { - c = '\n'; - } - - return c; -} - -bool GetLine (char *lp, unsigned int len) -{ - unsigned int cnt = 0; - char c; - - do { - c = UartGetc(); - switch (c) { - case CNTLQ: /* ignore Control S/Q. */ - case CNTLS: - break; - case BACKSPACE: - case DEL: - if (cnt == 0) { - break; - } - cnt--; /* decrement count. */ - lp--; /* and line pointer. */ - UartPutc (0x08); /* echo backspace. */ - UartPutc (' '); - UartPutc (0x08); - fflush (stdout); - break; - case ESC: - case 0: - *lp = 0; /* ESC - stop editing line. */ - return false; - case CR: /* CR - done, stop editing line. */ - UartPutc (*lp = c); /* Echo and store character. */ - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - c = LF; - UartPutc (*lp = c); /* Echo and store character. */ - fflush (stdout); - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - break; - default: - UartPutc (*lp = c); /* echo and store character. */ - fflush (stdout); - lp++; /* increment line pointer. */ - cnt++; /* and count. */ - break; - } - } while (cnt < len - 2 && c != LF); /* check limit and CR. */ - *lp = 0; /* mark end of string. */ - return true; -} - -__attribute__((noreturn)) void UartEndSimulation(int code) -{ - UartPutc((char) 0x4); // End of simulation - UartPutc((char) code); // Exit code - while(1); -} diff --git a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/cmsis.c b/source/application/hal/platforms/bare-metal/bsp/cmsis-device/cmsis.c deleted file mode 100644 index 9cf6213..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/cmsis.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "cmsis.h" - -extern void *__Vectors; /* see irqs.c */ - -/*----------------------------------------------------------------------------*\ - * Define clocks (uses OSC1 ACLK) * -\*----------------------------------------------------------------------------*/ -#define __XTAL (32000000) /* Oscillator frequency */ -#define __SYSTEM_CLOCK (__XTAL) - -#if defined(CPU_CORTEX_M55) -#define CCR_DL (1 << 19) -#else -#error "Invalid CPU; This file only services Cortex-M55 CPUs" -#endif /* (CPU_CORTEX_M55) */ - -/*---------------------------------------------------------------------------- - System Core Clock Variable (Core Clock) - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = __SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - Clock functions - *----------------------------------------------------------------------------*/ -/** - * @brief Updates the SystemCoreClock variable with current core Clock - * retrieved from cpu registers. - */ -void SystemCoreClockUpdate(void) -{ - /* Update the SystemCoreClock variable */ - SystemCoreClock = __SYSTEM_CLOCK; -} - -uint32_t GetSystemCoreClock(void) -{ - return SystemCoreClock; -} - -/** - * @brief Setup the microcontroller system. - * Initialize the System. - **/ -void SystemInit(void) -{ -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__MVE_USED) && (__MVE_USED == 1U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); -#endif - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &__Vectors; -#endif - - /* Enable hard, bus, mem and usage fault detection in SHCSR, bits 16-18. - * Enable stkof, bf, div_0_trp, unalign_trp and usersetm bits in CCR. - */ - SCB->SHCSR = ( - _VAL2FLD(SCB_SHCSR_USGFAULTENA, 1) | - _VAL2FLD(SCB_SHCSR_BUSFAULTENA, 1) | - _VAL2FLD(SCB_SHCSR_MEMFAULTENA, 1)); - - SCB->CCR = (_VAL2FLD(SCB_CCR_USERSETMPEND, 1) | - _VAL2FLD(SCB_CCR_DIV_0_TRP, 1) | - _VAL2FLD(SCB_CCR_BFHFNMIGN, 1) | - _VAL2FLD(SCB_CCR_STKOFHFNMIGN, 1)); -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= _VAL2FLD(SCB_CCR_UNALIGN_TRP, 1); -#endif - - SCB->CCR |= CCR_DL; - - /* Reset pipeline. */ - __DSB(); - __ISB(); - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = __SYSTEM_CLOCK; -} diff --git a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/include/cmsis.h b/source/application/hal/platforms/bare-metal/bsp/cmsis-device/include/cmsis.h deleted file mode 100644 index 9d6326a..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/include/cmsis.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef BAREMETAL_CMSIS_H -#define BAREMETAL_CMSIS_H - -#if defined(CPU_HEADER_FILE) -#include CPU_HEADER_FILE /* Cortex M system header file from CMSIS. */ -#endif /* CPU_HEADER_FILE */ -#include "irqs.h" /* Interrupt definitions file. */ - -/* Addition to template functions should be mentioned here. */ - -/** - * @brief Gets the internal processor clock. - * @return Clock frequency as unsigned 32 bit value. - **/ -uint32_t GetSystemCoreClock(void); - -#endif /* BAREMETAL_CMSIS_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/include/irqs.h b/source/application/hal/platforms/bare-metal/bsp/cmsis-device/include/irqs.h deleted file mode 100644 index 0d8dec6..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/include/irqs.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef IRQS_H -#define IRQS_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "peripheral_irqs.h" - -#include <stdint.h> - -/* Interrupt handler function type. */ -typedef void (*const irq_vec_type)(void); - -/** - * @brief Reset interrupt handler and also, the starting - * point of the application. - **/ -extern void Reset_Handler(void); - -/** - * @brief Gets the system tick triggered cycle counter for the CPU. - * @return 64-bit counter value. - **/ -extern uint64_t Get_SysTick_Cycle_Count(void); - -/** - * @brief Initialises the system tick registers. - * @return Error code return from sys tick configuration function - * (0 = no error). - **/ -extern int Init_SysTick(void); - -#ifdef __cplusplus -} -#endif - -#endif /* IRQS_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/irqs.c b/source/application/hal/platforms/bare-metal/bsp/cmsis-device/irqs.c deleted file mode 100644 index 7d8aa06..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/cmsis-device/irqs.c +++ /dev/null @@ -1,265 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "irqs.h" -#include "cmsis.h" - -#include <stdio.h> -#include <inttypes.h> - -static uint64_t cpu_cycle_count = 0; - -/** - * External references - */ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - extern uint32_t __STACK_SEAL; -#endif - -extern __NO_RETURN void __PROGRAM_START(void); - -/** - * @brief Dump core registers on stdout - */ -static void LogCoreCPURegisters(void) -{ - printf("CTRL : 0x%08" PRIx32 "\n", __get_CONTROL()); - printf("IPSR : 0x%08" PRIx32 "\n", __get_IPSR()); - printf("APSR : 0x%08" PRIx32 "\n", __get_APSR()); - printf("xPSR : 0x%08" PRIx32 "\n", __get_xPSR()); - printf("PSP : 0x%08" PRIx32 "\n", __get_PSP()); - printf("MSP : 0x%08" PRIx32 "\n", __get_MSP()); - printf("PRIMASK : 0x%08" PRIx32 "\n", __get_PRIMASK()); - printf("BASEPRI : 0x%08" PRIx32 "\n", __get_BASEPRI()); - printf("FAULTMSK: 0x%08" PRIx32 "\n", __get_FAULTMASK()); -} - -/** - * @brief Default interrupt handler - an infinite loop. - **/ -__attribute__((noreturn)) static void DefaultHandler(void) -{ - LogCoreCPURegisters(); - while (1) { - /* Without the following line, armclang may optimize away the - * infinite loop because it'd be without side effects and thus - * undefined behaviour. */ - __ASM volatile(""); - } -} - -#define DEFAULT_HANDLER_CALL(type) \ - do { \ - printf("\n"); \ - printf("%s caught by function %s\n", \ - type, __FUNCTION__); \ - DefaultHandler(); \ - } while (0) - -#define DEFAULT_ERROR_HANDLER_CALL() \ - DEFAULT_HANDLER_CALL("Exception") - -#define DEFAULT_IRQ_HANDLER_CALL() \ - DEFAULT_HANDLER_CALL("Interrupt") - -/** - * Dummy Exception Handlers for core interrupts. - * - * Weak definitions provided to be used if the user chooses not - * to override them. - **/ - -/** - * @brief Non maskable interrupt handler. - **/ - __attribute__((weak)) void NMI_Handler(void) -{ - DEFAULT_ERROR_HANDLER_CALL(); -} - -/** - * @brief Hardfault interrupt handler. - **/ - __attribute__((weak)) void HardFault_Handler(void) -{ - DEFAULT_ERROR_HANDLER_CALL(); -} - -/** - * @brief Memory management interrupt handler. - **/ -__attribute__((weak)) void MemManage_Handler(void) -{ - DEFAULT_IRQ_HANDLER_CALL(); -} - -/** - * @brief Bus fault interrupt handler. - **/ -__attribute__((weak)) void BusFault_Handler(void) -{ - DEFAULT_ERROR_HANDLER_CALL(); -} - -/** - * @brief Usage fault interrupt handler. - **/ -__attribute__((weak)) void UsageFault_Handler(void) -{ - DEFAULT_ERROR_HANDLER_CALL(); -} - -/** - * @brief Secure access fault interrupt handler. - **/ -__attribute__((weak)) void SecureFault_Handler(void) -{ - DEFAULT_ERROR_HANDLER_CALL(); -} - -/** - * @brief Supervisor call interrupt handler. - **/ -__attribute__((weak)) void SVC_Handler(void) -{ - DEFAULT_IRQ_HANDLER_CALL(); -} - -/** - * @brief Debug monitor interrupt handler. - **/ -__attribute__((weak)) void DebugMon_Handler(void) -{ - DEFAULT_IRQ_HANDLER_CALL(); -} - -/** - * @brief Pending SV call interrupt handler. - */ -__attribute__((weak)) void PendSV_Handler(void) -{ - DEFAULT_IRQ_HANDLER_CALL(); -} - -/** - * @brief System tick interrupt handler. - **/ -void SysTick_Handler(void) -{ - /* Increment the cycle counter based on load value. */ - cpu_cycle_count += SysTick->LOAD + 1; -} - -/** - * Gets the current SysTick derived counter value - */ -uint64_t Get_SysTick_Cycle_Count(void) -{ - uint32_t systick_val; - - NVIC_DisableIRQ(SysTick_IRQn); - systick_val = SysTick->VAL & SysTick_VAL_CURRENT_Msk; - NVIC_EnableIRQ(SysTick_IRQn); - - return cpu_cycle_count + (SysTick->LOAD - systick_val); -} - -/** - * Interrupt vector table. - */ -irq_vec_type __VECTOR_TABLE[] __VECTOR_TABLE_ATTRIBUTE = { - (irq_vec_type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler , /* 1 Initial PC, set to entry point */ - - NMI_Handler , /* 2 (-14) NMI Handler */ - HardFault_Handler , /* 3 (-13) Hard Fault Handler */ - MemManage_Handler , /* 4 (-12) MPU Fault Handler */ - BusFault_Handler , /* 5 (-11) Bus Fault Handler */ - UsageFault_Handler , /* 6 (-10) Usage Fault Handler */ - SecureFault_Handler, /* 7 ( -9) Secure Fault Handler */ - 0 , /* 8 ( -8) Reserved */ - 0 , /* 9 ( -7) Reserved */ - 0 , /* 10 ( -6) Reserved */ - SVC_Handler , /* 11 ( -5) SVCall Handler */ - DebugMon_Handler , /* 12 ( -4) Debug Monitor Handler */ - 0 , /* 13 ( -3) Reserved */ - PendSV_Handler , /* 14 ( -2) PendSV Handler */ - SysTick_Handler , /* 15 ( -1) SysTick Handler */ - - /* External sources to be populated by user. */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0 - 16 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 16 - 32 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 32 - 48 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 48 - 64 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 64 - 80 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 80 - 96 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 96 - 112 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 112 - 128 */ -}; - -/** - * SysTick initialisation - */ -int Init_SysTick(void) -{ - const uint32_t ticks_10ms = GetSystemCoreClock()/100 + 1; - int err = 0; - - /* Reset CPU cycle count value. */ - cpu_cycle_count = 0; - - /* Changing configuration for sys tick => guard from being - * interrupted. */ - NVIC_DisableIRQ(SysTick_IRQn); - - /* SysTick init - this will enable interrupt too. */ - err = SysTick_Config(ticks_10ms); - - /* Enable interrupt again. */ - NVIC_EnableIRQ(SysTick_IRQn); - - /* Wait for SysTick to kick off */ - while (!err && !SysTick->VAL) { - __NOP(); - } - - return err; -} - -/* Reset handler - starting point of our application. */ -__attribute__((used)) void Reset_Handler(void) -{ - /* Initialise system. */ - SystemInit(); - - /* Configure the system tick. */ - Init_SysTick(); - - /* cmsis supplied entry point. */ - __PROGRAM_START(); -} - -#ifdef __cplusplus -} -#endif diff --git a/source/application/hal/platforms/bare-metal/bsp/include/bsp.h b/source/application/hal/platforms/bare-metal/bsp/include/bsp.h deleted file mode 100644 index 2bd4fa1..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/include/bsp.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef BSP_H -#define BSP_H - -/* Core modules - these are common */ -#include "bsp_core_log.h" /* Logging related helpers. */ -#include "uart_stdout.h" /* stdout over UART. */ - -#if defined(MPS3_PLATFORM) /* If running on MPS3 platform. */ - -#include "smm_mps3.h" /* Mem map for MPS3 peripherals. */ -#include "glcd_mps3.h" /* LCD functions. */ -#include "timer_mps3.h" /* Timer functions. */ -#include "device_mps3.h" /* FPGA level definitions and functions. */ - -#else /* MPS3_PLATFORM */ - -#include "stubs_simple_platform.h" /* Stubs for simple_platform. */ -#include "timer_simple_platform.h" /* Timer API for simple_platform. */ - -#endif /* MPS3_PLATFORM */ - -#if defined(ARM_NPU) -#include "ethosu_mem_config.h" -#endif /* defined(ARM_NPU) */ - -#endif /* BSP_H */ diff --git a/source/application/hal/platforms/bare-metal/bsp/include/ethosu_mem_config.h b/source/application/hal/platforms/bare-metal/bsp/include/ethosu_mem_config.h deleted file mode 100644 index b393a03..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/include/ethosu_mem_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef ETHOS_U_NPU_MEM_CONFIG_H -#define ETHOS_U_NPU_MEM_CONFIG_H - -#define ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY 0 -#define ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM 1 -#define ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM 2 - -#define ETHOS_U_MEM_BYTE_ALIGNMENT 16 - -#ifndef ETHOS_U_NPU_MEMORY_MODE - #define ETHOS_U_NPU_MEMORY_MODE ETHOS_U_MEMORY_MODE_SHARED_SRAM -#endif /* ETHOS_U_NPU_MEMORY_MODE */ - -#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM) - #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc? for reference? */ -#else - #define ETHOS_U_CACHE_BUF_SZ (0U) -#endif /* CACHE_BUF_SZ */ - -/** - * Activation buffer aka tensor arena section name - * We have to place the tensor arena in different region based on the memory config. - **/ -#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM) - #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram") - #define ACTIVATION_BUF_SECTION_NAME ("SRAM") -#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY) - #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram") - #define ACTIVATION_BUF_SECTION_NAME ("SRAM") -#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM) - #define ACTIVATION_BUF_SECTION section("activation_buf_dram") - #define CACHE_BUF_SECTION section(".bss.NoInit.ethos_u_cache") - #define ACTIVATION_BUF_SECTION_NAME ("DDR/DRAM") - #define CACHE_BUF_ATTRIBUTE __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION)) -#endif - -#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
\ No newline at end of file diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld b/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld deleted file mode 100644 index d369fa7..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld +++ /dev/null @@ -1,277 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__STACK_SIZE = 0x00060000; -__HEAP_SIZE = 0x000C0000; - -/* System memory brief */ -MEMORY -{ - ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 - DTCM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00080000 - BRAM (rwx) : ORIGIN = 0x11000000, LENGTH = 0x00100000 - SRAM (rwx) : ORIGIN = 0x31000000, LENGTH = 0x00200000 - DDR (rwx) : ORIGIN = 0x70000000, LENGTH = 0x02000000 - - /* Dynamic load regions declared for use by FVP only - * These regions are mentioned in the CMake subsystem profile. - * Do not change the addresses here in isolation. */ - DDR_dynamic_model (rx) : ORIGIN = 0x90000000, LENGTH = 0x02000000 - DDR_dynamic_ifm (rx) : ORIGIN = 0x92000000, LENGTH = 0x01000000 - DDR_dynamic_ofm (rx) : ORIGIN = 0x93000000, LENGTH = 0x01000000 -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions ITCM and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __copy_table_start__ - * __copy_table_end__ - * __zero_table_start__ - * __zero_table_end__ - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text.at_itcm : - { - KEEP(*(.vectors)) - - /** - * All code goes here, with one exception of - * all_ops_resolver object file. This code - * instead placed on BRAM. See comment in the - * BRAM section for details. - **/ - *(EXCLUDE_FILE(*all_ops_resolver.o *hal.c.obj) .text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - KEEP(*(.eh_frame*)) - } > ITCM - - __exidx_start = .; - .ARM.exidx.at_itcm : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > ITCM - __exidx_end = .; - - .zero.table.at_itcm : - { - . = ALIGN(4); - __zero_table_start__ = .; - - LONG (__bss_start__) - LONG ((__bss_end__ - __bss_start__)/4) /* Size is in 32-bit words */ - - __zero_table_end__ = .; - } > ITCM - - .copy.table.at_itcm : - { - . = ALIGN(4); - __copy_table_start__ = .; - - /* Section to be copied - part 1: any data to be placed in BRAM */ - LONG (__etext) - LONG (__data_start__) - LONG ((__data_end__ - __data_start__)/4) /* Size is in 32-bit words */ - - /* Section to be copied - part 2: RO data for for DTCM */ - LONG (__etext2) - LONG (__ro_data_start__) - LONG ((__ro_data_end__ - __ro_data_start__)/4) /* Size is in 32-bit words */ - - __copy_table_end__ = .; - } > ITCM - - __itcm_total = ALIGN(4); - - ASSERT( __itcm_total < (ORIGIN(ITCM) + LENGTH(ITCM)), "ITCM overflow") - - .sram : - { - . = ALIGN(16); - /* Cache area (if used) */ - *(.bss.NoInit.ethos_u_cache) - . = ALIGN (16); - /* activation buffers a.k.a tensor arena when memory mode sram only or shared sram */ - *(.bss.NoInit.activation_buf_sram) - . = ALIGN(16); - } > SRAM AT > SRAM - - .bss : - { - . = ALIGN(4); - __bss_start__ = .; - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - } > DTCM AT > DTCM - - .stack (ORIGIN(DTCM) + LENGTH(DTCM) - __STACK_SIZE) (COPY) : - { - . = ALIGN(8); - __StackLimit = .; - . = . + __STACK_SIZE; - . = ALIGN(8); - __StackTop = .; - } > DTCM - PROVIDE(__stack = __StackTop); - ASSERT( - (__STACK_SIZE + __bss_end__ - __bss_start__) <= LENGTH(DTCM), - "DTCM overflow") - - .ddr.at_ddr : - { - /* __attribute__((aligned(16))) is not handled by the CMSIS startup code. - * Force the alignment here as a workaround */ - . = ALIGN(16); - /* nn model's baked in input matrices */ - *(ifm) - . = ALIGN(16); - /* nn model's default space */ - *(nn_model) - . = ALIGN (16); - /* labels */ - *(labels) - . = ALIGN (16); - /* activation buffers a.k.a tensor arena when memory mode dedicated sram */ - *(activation_buf_dram) - . = ALIGN (16); - } > DDR AT > DDR - - /** - * Location counter can end up 2byte aligned with narrow Thumb code but - * __etext is assumed by startup code to be the LMA of a section in DTCM - * which must be 4byte aligned - */ - __etext = ALIGN (4); - - .bram.at_ddr : AT (__etext) - { - __data_start__ = .; - *(vtable) - *(.data) - *(.data.*) - . = ALIGN(4); - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - KEEP(*(.jcr*)) - . = ALIGN(4); - - *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(4); - - /** - * Place the all ops resolver code data here. This accounts - * for ~4k worth of saving on the ITCM load region. It is - * only designed to be included (by default) for the inference - * runner use case. - **/ - *all_ops_resolver.o (*.text*) - . = ALIGN(4); - *hal.c.obj (*.text*) - . = ALIGN(4); - - __data_end__ = .; - } > BRAM - - __etext2 = __etext + (__data_end__ - __data_start__); - - .data.at_ddr : AT (__etext2) - { - . = ALIGN(4); - __ro_data_start__ = .; - - *(.rodata*) - . = ALIGN(4); - * (npu_driver_version) - . = ALIGN(4); - * (npu_driver_arch_version) - . = ALIGN(4); - - __ro_data_end__ = .; - } > BRAM - - .heap (COPY) : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - . = . + __HEAP_SIZE; - . = ALIGN(8); - __HeapLimit = .; - } > BRAM - - ASSERT ( - (__ro_data_end__ - __ro_data_start__) - + (__data_end__ - __data_start__) - + __HEAP_SIZE <= LENGTH(BRAM), - "BRAM overflow") -} diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.sct b/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.sct deleted file mode 100644 index f78dc25..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.sct +++ /dev/null @@ -1,145 +0,0 @@ -; Copyright (c) 2021 Arm Limited. All rights reserved. -; SPDX-License-Identifier: Apache-2.0 -; -; Licensed under the Apache License, Version 2.0 (the "License"); -; you may not use this file except in compliance with the License. -; You may obtain a copy of the License at -; -; http://www.apache.org/licenses/LICENSE-2.0 -; -; Unless required by applicable law or agreed to in writing, software -; distributed under the License is distributed on an "AS IS" BASIS, -; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; See the License for the specific language governing permissions and -; limitations under the License. - -; ************************************************************* -; *** Scatter-Loading Description File *** -; ************************************************************* -; Please see docs/sections/appendix.md for memory mapping information. -; -; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR sections => activation buffers and -; the model should only be placed in those regions. -; -;--------------------------------------------------------- -; First load region (ITCM) -;--------------------------------------------------------- -LOAD_REGION_0 0x00000000 0x00080000 -{ - ;----------------------------------------------------- - ; First part of code mem - 512kiB - ;----------------------------------------------------- - itcm.bin 0x00000000 0x00080000 - { - *.o (RESET, +First) - * (InRoot$$Sections) - - ; Essentially only RO-CODE, RO-DATA is in a - ; different region. - .ANY (+RO) - } - - ;----------------------------------------------------- - ; 128kiB of 512kiB DTCM is used for any other RW or ZI - ; data. Note: this region is internal to the Cortex-M - ; CPU. - ;----------------------------------------------------- - dtcm.bin 0x20000000 0x00020000 - { - ; Any R/W and/or zero initialised data - .ANY(+RW +ZI) - } - - ;----------------------------------------------------- - ; 384kiB of stack space within the DTCM region. See - ; `dtcm.bin` for the first section. Note: by virtue of - ; being part of DTCM, this region is only accessible - ; from Cortex-M55. - ;----------------------------------------------------- - ARM_LIB_STACK 0x20020000 EMPTY ALIGN 8 0x00060000 - {} - - ;----------------------------------------------------- - ; FPGA internal SRAM of 2MiB - reserved for activation - ; buffers. - ; This region should have 3 cycle read latency from - ; both Cortex-M55 and Ethos-U NPU - ;----------------------------------------------------- - isram.bin 0x31000000 UNINIT ALIGN 16 0x00200000 - { - ; Cache area (if used) - *.o (.bss.NoInit.ethos_u_cache) - - ; activation buffers a.k.a tensor arena when - ; memory mode sram only or shared sram - *.o (.bss.NoInit.activation_buf_sram) - } -} - -;--------------------------------------------------------- -; Second load region (DDR) -;--------------------------------------------------------- -LOAD_REGION_1 0x70000000 0x02000000 -{ - ;----------------------------------------------------- - ; 32 MiB of DDR space for neural network model, - ; input vectors and labels. If the activation buffer - ; size required by the network is bigger than the - ; SRAM size available, it is accommodated here. - ;----------------------------------------------------- - ddr.bin 0x70000000 ALIGN 16 0x02000000 - { - ; nn model's baked in input matrices - *.o (ifm) - - ; nn model's default space - *.o (nn_model) - - ; labels - *.o (labels) - - ; activation buffers a.k.a tensor arena when memory mode dedicated sram - *.o (activation_buf_dram) - } - - ;----------------------------------------------------- - ; First 256kiB of BRAM (FPGA SRAM) used for RO data. - ; Note: Total BRAM size available is 1MiB. - ;----------------------------------------------------- - bram.bin 0x11000000 ALIGN 8 0x00040000 - { - ; RO data (incl. unwinding tables for debugging) - .ANY (+RO-DATA) - } - - ;----------------------------------------------------- - ; 768 KiB of remaining part of the 1MiB BRAM used as - ; heap space. - ;----------------------------------------------------- - ARM_LIB_HEAP 0x11040000 EMPTY ALIGN 8 0x000C0000 - {} - - ;----------------------------------------------------- - ; The following regions are for use by the FVP to - ; allow loading or dumping of dynamic data into or - ; from the memory. These regions are mentioned in - ; the CMake subsystem profile. Do not change the - ; addresses and sizes below in isolation. - ;----------------------------------------------------- - ; 32 MiB of model space for run-time load of model - ;----------------------------------------------------- - runtime_model 0x90000000 EMPTY ALIGN 16 0x02000000 - {} - - ;----------------------------------------------------- - ; 16 MiB of IFM space for run-time loading (FVP only) - ;----------------------------------------------------- - runtime_ifm 0x92000000 EMPTY ALIGN 16 0x01000000 - {} - - ;----------------------------------------------------- - ; 16 MiB of OFM space for run-time loading (FVP only) - ;----------------------------------------------------- - runtime_ofm 0x93000000 EMPTY ALIGN 16 0x01000000 - {} -} diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld b/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld deleted file mode 100644 index 82cb18e..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld +++ /dev/null @@ -1,270 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__STACK_SIZE = 0x00060000; -__HEAP_SIZE = 0x000C0000; - -/* System memory brief */ -MEMORY -{ - ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 - DTCM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00080000 - BRAM (rwx) : ORIGIN = 0x11000000, LENGTH = 0x00100000 - SRAM (rwx) : ORIGIN = 0x31000000, LENGTH = 0x00200000 - DDR (rwx) : ORIGIN = 0x70000000, LENGTH = 0x02000000 -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions ITCM and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __copy_table_start__ - * __copy_table_end__ - * __zero_table_start__ - * __zero_table_end__ - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text.at_itcm : - { - KEEP(*(.vectors)) - - /** - * All code goes here, with one exception of - * all_ops_resolver object file. This code - * instead placed on BRAM. See comment in the - * BRAM section for details. - **/ - *(EXCLUDE_FILE(*all_ops_resolver.o *hal.c.obj) .text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - KEEP(*(.eh_frame*)) - } > ITCM - - __exidx_start = .; - .ARM.exidx.at_itcm : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > ITCM - __exidx_end = .; - - .zero.table.at_itcm : - { - . = ALIGN(4); - __zero_table_start__ = .; - - LONG (__bss_start__) - LONG ((__bss_end__ - __bss_start__)/4) /* Size is in 32-bit words */ - - __zero_table_end__ = .; - } > ITCM - - .copy.table.at_itcm : - { - . = ALIGN(4); - __copy_table_start__ = .; - - /* Section to be copied - part 1: any data to be placed in BRAM */ - LONG (__etext) - LONG (__data_start__) - LONG ((__data_end__ - __data_start__)/4) /* Size is in 32-bit words */ - - /* Section to be copied - part 2: RO data for for DTCM */ - LONG (__etext2) - LONG (__ro_data_start__) - LONG ((__ro_data_end__ - __ro_data_start__)/4) /* Size is in 32-bit words */ - - __copy_table_end__ = .; - } > ITCM - - __itcm_total = ALIGN(4); - - ASSERT( __itcm_total < (ORIGIN(ITCM) + LENGTH(ITCM)), "ITCM overflow") - - .sram : - { - . = ALIGN(16); - /* Cache area (if used) */ - *(.bss.NoInit.ethos_u_cache) - . = ALIGN (16); - /* activation buffers a.k.a tensor arena when memory mode sram only or shared sram */ - *(.bss.NoInit.activation_buf_sram) - . = ALIGN(16); - } > SRAM AT > SRAM - - .bss : - { - . = ALIGN(4); - __bss_start__ = .; - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - } > DTCM AT > DTCM - - .stack (ORIGIN(DTCM) + LENGTH(DTCM) - __STACK_SIZE) (COPY) : - { - . = ALIGN(8); - __StackLimit = .; - . = . + __STACK_SIZE; - . = ALIGN(8); - __StackTop = .; - } > DTCM - PROVIDE(__stack = __StackTop); - ASSERT( - (__STACK_SIZE + __bss_end__ - __bss_start__) <= LENGTH(DTCM), - "DTCM overflow") - - .ddr.at_ddr : - { - /* __attribute__((aligned(16))) is not handled by the CMSIS startup code. - * Force the alignment here as a workaround */ - . = ALIGN(16); - /* nn model's baked in input matrices */ - *(ifm) - . = ALIGN(16); - /* nn model's default space */ - *(nn_model) - . = ALIGN (16); - /* labels */ - *(labels) - . = ALIGN (16); - /* activation buffers a.k.a tensor arena when memory mode dedicated sram */ - *(activation_buf_dram) - . = ALIGN (16); - } > DDR AT > DDR - - /** - * Location counter can end up 2byte aligned with narrow Thumb code but - * __etext is assumed by startup code to be the LMA of a section in DTCM - * which must be 4byte aligned - */ - __etext = ALIGN (4); - - .bram.at_ddr : AT (__etext) - { - __data_start__ = .; - *(vtable) - *(.data) - *(.data.*) - . = ALIGN(4); - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - . = ALIGN(4); - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(4); - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - KEEP(*(.jcr*)) - . = ALIGN(4); - - *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(4); - - /** - * Place the all ops resolver code data here. This accounts - * for ~4k worth of saving on the ITCM load region. It is - * only designed to be included (by default) for the inference - * runner use case. - **/ - *all_ops_resolver.o (*.text*) - . = ALIGN(4); - *hal.c.obj (*.text*) - . = ALIGN(4); - - __data_end__ = .; - } > BRAM - - __etext2 = __etext + (__data_end__ - __data_start__); - - .data.at_ddr : AT (__etext2) - { - . = ALIGN(4); - __ro_data_start__ = .; - - *(.rodata*) - . = ALIGN(4); - * (npu_driver_version) - . = ALIGN(4); - * (npu_driver_arch_version) - . = ALIGN(4); - - __ro_data_end__ = .; - } > BRAM - - .heap (COPY) : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - . = . + __HEAP_SIZE; - . = ALIGN(8); - __HeapLimit = .; - } > BRAM - - ASSERT ( - (__ro_data_end__ - __ro_data_start__) - + (__data_end__ - __data_start__) - + __HEAP_SIZE <= LENGTH(BRAM), - "BRAM overflow") -} diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct b/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct deleted file mode 100644 index 5825d47..0000000 --- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct +++ /dev/null @@ -1,122 +0,0 @@ -; Copyright (c) 2021 Arm Limited. All rights reserved. -; SPDX-License-Identifier: Apache-2.0 -; -; Licensed under the Apache License, Version 2.0 (the "License"); -; you may not use this file except in compliance with the License. -; You may obtain a copy of the License at -; -; http://www.apache.org/licenses/LICENSE-2.0 -; -; Unless required by applicable law or agreed to in writing, software -; distributed under the License is distributed on an "AS IS" BASIS, -; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; See the License for the specific language governing permissions and -; limitations under the License. - -; ************************************************************* -; *** Scatter-Loading Description File *** -; ************************************************************* -; Please see docs/sections/appendix.md for memory mapping information. -; -; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR -; sections => activation buffers and the model should only -; be placed in those regions. -; -;--------------------------------------------------------- -; First load region (ITCM) -;--------------------------------------------------------- -LOAD_REGION_0 0x00000000 0x00080000 -{ - ;----------------------------------------------------- - ; First part of code mem - 512kiB - ;----------------------------------------------------- - itcm.bin 0x00000000 0x00080000 - { - *.o (RESET, +First) - * (InRoot$$Sections) - - ; Essentially only RO-CODE, RO-DATA is in a - ; different region. - .ANY (+RO) - } - - ;----------------------------------------------------- - ; 128kiB of 512kiB DTCM is used for any other RW or ZI - ; data. Note: this region is internal to the Cortex-M - ; CPU. - ;----------------------------------------------------- - dtcm.bin 0x20000000 0x00020000 - { - ; Any R/W and/or zero initialised data - .ANY(+RW +ZI) - } - - ;----------------------------------------------------- - ; 384kiB of stack space within the DTCM region. See - ; `dtcm.bin` for the first section. Note: by virtue of - ; being part of DTCM, this region is only accessible - ; from Cortex-M55. - ;----------------------------------------------------- - ARM_LIB_STACK 0x20020000 EMPTY ALIGN 8 0x00060000 - {} - - ;----------------------------------------------------- - ; SSE-300's internal SRAM of 2MiB - reserved for - ; activation buffers. - ; This region should have 3 cycle read latency from - ; both Cortex-M55 and Ethos-U NPU - ;----------------------------------------------------- - isram.bin 0x31000000 UNINIT ALIGN 16 0x00200000 - { - ; Cache area (if used) - *.o (.bss.NoInit.ethos_u_cache) - - ; activation buffers a.k.a tensor arena when - ; memory mode sram only or shared sram - *.o (.bss.NoInit.activation_buf_sram) - } -} - -;--------------------------------------------------------- -; Second load region (DDR) -;--------------------------------------------------------- -LOAD_REGION_1 0x70000000 0x02000000 -{ - ;----------------------------------------------------- - ; 32 MiB of DDR space for neural network model, - ; input vectors and labels. If the activation buffer - ; size required by the network is bigger than the - ; SRAM size available, it is accommodated here. - ;----------------------------------------------------- - ddr.bin 0x70000000 ALIGN 16 0x02000000 - { - ; nn model's baked in input matrices - *.o (ifm) - - ; nn model's default space - *.o (nn_model) - - ; labels - *.o (labels) - - ; activation buffers a.k.a tensor arena when memory mode dedicated sram - *.o (activation_buf_dram) - } - - ;----------------------------------------------------- - ; First 256kiB of BRAM (FPGA SRAM) used for RO data. - ; Note: Total BRAM size available is 1MiB. - ;----------------------------------------------------- - bram.bin 0x11000000 ALIGN 8 0x00040000 - { - ; RO data (incl. unwinding tables for debugging) - .ANY (+RO-DATA) - } - - ;----------------------------------------------------- - ; 768 KiB of remaining part of the 1MiB BRAM used as - ; heap space. - ;----------------------------------------------------- - ARM_LIB_HEAP 0x11040000 EMPTY ALIGN 8 0x000C0000 - {} -} diff --git a/source/application/hal/platforms/bare-metal/data_acquisition/data_acq.c b/source/application/hal/platforms/bare-metal/data_acquisition/data_acq.c deleted file mode 100644 index 1e40b02..0000000 --- a/source/application/hal/platforms/bare-metal/data_acquisition/data_acq.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "data_acq.h" - -#include "bsp.h" - -#include <assert.h> -#include <stdlib.h> -#include <string.h> - -/** - * @brief Get the user input from USART. - * @param[out] user_input String read from the UART block. - * @param[in] size String read length. - * @return 0 if successful, error code otherwise. - **/ -static int get_uart_user_input(char* user_input, int size) -{ - if (true != GetLine(user_input, size - 1)) { - printf_err("invalid input\n"); - return 1; - } - return 0; -} - -int data_acq_channel_init(data_acq_module* module) -{ - assert(module); - - /* UART should have been initialised with low level initialisation - * routines. */ - module->system_init = NULL; - - strncpy(module->system_name, "UART", sizeof(module->system_name)); - module->get_input = get_uart_user_input; - module->inited = 1; - - return !(module->inited); -} - -int data_acq_channel_release(data_acq_module* module) -{ - assert(module); - module->inited = 0; - module->get_input = NULL; - return 0; -} diff --git a/source/application/hal/platforms/bare-metal/data_presentation/data_psn.c b/source/application/hal/platforms/bare-metal/data_presentation/data_psn.c deleted file mode 100644 index 474d552..0000000 --- a/source/application/hal/platforms/bare-metal/data_presentation/data_psn.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "data_psn.h" - -#include "bsp.h" -#include "lcd_img.h" - -#include <assert.h> -#include <string.h> - -int data_psn_system_init(data_psn_module* module) -{ - assert(module); - - /* LCD output supported. */ - module->system_init = lcd_init; - module->present_data_image = lcd_display_image; - module->present_data_text = lcd_display_text; - module->present_box = lcd_display_box; - module->set_text_color = lcd_set_text_color; - module->clear = lcd_clear; - strncpy(module->system_name, "lcd", sizeof(module->system_name)); - module->inited = !module->system_init(); - return !module->inited; -} - -int data_psn_system_release(data_psn_module* module) -{ - assert(module); - module->inited = 0; - return 0; -} diff --git a/source/application/hal/platforms/bare-metal/data_presentation/lcd/include/lcd_img.h b/source/application/hal/platforms/bare-metal/data_presentation/lcd/include/lcd_img.h deleted file mode 100644 index e4ad791..0000000 --- a/source/application/hal/platforms/bare-metal/data_presentation/lcd/include/lcd_img.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef LCD_IMG_H -#define LCD_IMG_H - -#include <stdint.h> -#include <stddef.h> -#include <stdbool.h> - -/** - * @brief Initialise the LCD - * @return 0 if successful, error code otherwise. - **/ -int lcd_init(void); - -/** - * @brief Display a given image on the LCD. This allows displaying 8 bit - * single or multi-channel images on the LCD. - * @param[in] data Pointer to start of the image. - * @param[in] width Width of this image. - * @param[in] height Image height. - * @param[in] channels Number of channels. - * @param[in] pos_x Screen position x co-ordinate. - * @param[in] pos_y Screen position y co-ordinate. - * @param[in] downsample_factor Factor by which the image needs to be - * downsampled. - * @return 0 if successful, non-zero otherwise. - **/ -int lcd_display_image(uint8_t* data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor); - -/** - * @brief Display a given image on the LCD. This allows displaying 8 bit - * single or multi-channel images on the LCD. - * @param[in] str Pointer to a null terminated string. - * @param[in] str_sz Length of the string. - * @param[in] pos_x Screen position x co-ordinate. - * @param[in] pos_y Screen position y co-ordinate. - * @param[in] allow_multiple_lines The function will try and spread - * the string into multiple lines if - * they don't fit in one. - * @return 0 if successful, non-zero otherwise. - **/ -int lcd_display_text(const char* str, const size_t str_sz, - const uint32_t pos_x, const uint32_t pos_y, - const bool allow_multiple_lines); - -/** - * @brief Display a box with given color on LCD. - * @param[in] pos_x Screen position x co-ordinate. - * @param[in] pos_y Screen position y co-ordinate. - * @param[in] width Width. - * @param[in] height Height. - * @param[in] color Fill color. - * @return 0 if successful, non-zero otherwise. - **/ -int lcd_display_box(const uint32_t pos_x, const uint32_t pos_y, - const uint32_t width, const uint32_t height, const uint16_t color); - -/** - * @brief Clear LCD. - * @param[in] color Fill color. - * @return 0 if successful, non-zero otherwise. - **/ -int lcd_clear(const uint16_t color); - -/** - * @brief Set text color. - * @param[in] color Fill color. - * @return 0 if successful, non-zero otherwise. - **/ -int lcd_set_text_color(const uint16_t color); - -#endif /* LCD_IMG_H */ diff --git a/source/application/hal/platforms/bare-metal/data_presentation/lcd/lcd_img.c b/source/application/hal/platforms/bare-metal/data_presentation/lcd/lcd_img.c deleted file mode 100644 index f03566f..0000000 --- a/source/application/hal/platforms/bare-metal/data_presentation/lcd/lcd_img.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "lcd_img.h" - -#include "bsp.h" - -#include <string.h> -#include <assert.h> - -static int show_title(void) -{ - char title[128]; - int status = 0; - - /* LCD title string */ -#if defined(CPU_CORTEX_M55) - const char* cpu_name = "Arm Cortex-M55"; -#else /* defined(CPU_CORTEX_M55) */ - const char* cpu_name = "Arm CPU"; -#endif /* defined(CPU_CORTEX_M55) */ - - lcd_set_text_color(White); - - /* First line */ - snprintf(title, sizeof(title), "Arm ML embedded code samples"); - - if (0 != (status = lcd_display_text( - title, strlen(title), 10, 0, false))) { - return status; - } - - /* Second line */ -#if defined (ARM_NPU) - snprintf(title, sizeof(title), "%s + Arm Ethos-U NPU", cpu_name); -#else /* defined (ARM_NPU) */ - snprintf(title, sizeof(title), "%s", cpu_name); -#endif /* defined (ARM_NPU) */ - - return lcd_display_text(title, strlen(title), 10, 20, false); -} - -int lcd_init(void) -{ - GLCD_Initialize(); - GLCD_Clear(Black); - return show_title(); -} - -int lcd_display_image(uint8_t* data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor) -{ - /* Sanity checks */ - assert(data); - if ((pos_x + width/downsample_factor > GLCD_WIDTH) || - (pos_y + height/downsample_factor > GLCD_HEIGHT)) { - printf_err("Invalid image size for given location!\n"); - return 1; - } - - if (1 == channels || 3 == channels) { - GLCD_Image(data, width, height, channels, pos_x, pos_y, - downsample_factor); - } else { - printf_err("Only single and three channel images are supported!\n"); - return 1; - } - - return 0; -} - -int lcd_display_text(const char* str, const size_t str_sz, - const uint32_t pos_x, const uint32_t pos_y, - const bool allow_multiple_lines) -{ - /* We use a font 0 which is 9x15. */ - const uint32_t x_span = 9; /* Each character is this 9 pixels "wide". */ - const uint32_t y_span = 15; /* Each character is this 15 pixels "high". */ - - if (str_sz == 0) { - return 1; - } - - /* If not within the LCD bounds, return error. */ - if (pos_x + x_span > GLCD_WIDTH || pos_y + y_span > GLCD_HEIGHT) { - return 1; - } else { - const unsigned char font_idx = 0; /* We are using the custom font = 0 */ - - const uint32_t col = pos_x/x_span; - const uint32_t max_cols = GLCD_WIDTH/x_span - 1; - const uint32_t max_lines = GLCD_HEIGHT/y_span - 1; - - uint32_t i = 0; - uint32_t current_line = pos_y/y_span; - uint32_t current_col = col; - - /* Display the string on the LCD. */ - for (i = 0; i < str_sz; ++i) { - - if (allow_multiple_lines) { - - /* If the next character won't fit. */ - if (current_col > max_cols) { - current_col = col; - - /* If the next line won't fit. */ - if (++current_line > max_lines) { - return 1; - } - } - } - - GLCD_DisplayChar(current_line, current_col++, font_idx, str[i]); - } - } - return 0; -} - -int lcd_display_box(const uint32_t pos_x, const uint32_t pos_y, - const uint32_t width, const uint32_t height, const uint16_t color) -{ - /* If not within the LCD bounds, return error. */ - if (pos_x > GLCD_WIDTH || pos_y > GLCD_HEIGHT) { - return 1; - } - else { - GLCD_Box(pos_x, pos_y, width, height, color); - } - return 0; -} - -int lcd_clear(const uint16_t color) -{ - GLCD_Clear(color); - GLCD_SetTextColor(White); - return show_title(); -} - -int lcd_set_text_color(const uint16_t color) -{ - GLCD_SetTextColor(color); - return 0; -} diff --git a/source/application/hal/platforms/bare-metal/timer/baremetal_timer.c b/source/application/hal/platforms/bare-metal/timer/baremetal_timer.c deleted file mode 100644 index c8e7252..0000000 --- a/source/application/hal/platforms/bare-metal/timer/baremetal_timer.c +++ /dev/null @@ -1,350 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "bsp.h" -#include "timer.h" - -#include <assert.h> -#include <string.h> -#include <inttypes.h> - -#if defined (ARM_NPU) - -#include "pmu_ethosu.h" - -extern struct ethosu_driver ethosu_drv; /* Default Ethos-U55 device driver */ - -/** - * @brief Initialises the PMU and enables the cycle counter. - **/ -static void _init_ethosu_cyclecounter(void); - -/** - * @brief Gets the difference of total NPU cycle counts. - * (includes active and idle) - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Total NPU cycle counts difference between the arguments expressed - * as unsigned 64 bit integer. - **/ -static uint64_t bm_get_npu_total_cycle_diff(time_counter *st, - time_counter *end); - -/** - * @brief Gets the difference in active NPU cycle counts. - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Active NPU cycle counts difference between the arguments expressed - * as unsigned 64 bit integer. - **/ -static uint64_t bm_get_npu_active_cycle_diff(time_counter *st, - time_counter *end); - -/** @brief Gets the difference in idle NPU cycle counts - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Idle NPU cycle counts difference between the arguments expressed - * as unsigned 64 bit integer. - **/ -static uint64_t bm_get_npu_idle_cycle_diff(time_counter *st, - time_counter *end); - -/** @brief Gets the difference in axi0 bus reads cycle counts - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return NPU AXI0 read cycle counts difference between the arguments expressed - * as unsigned 64 bit integer. - **/ -static uint64_t bm_get_npu_axi0_read_cycle_diff(time_counter *st, - time_counter *end); - -/** @brief Gets the difference in axi0 bus writes cycle counts - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return NPU AXI0 write cycle counts difference between the arguments expressed - * as unsigned 64 bit integer. - **/ -static uint64_t bm_get_npu_axi0_write_cycle_diff(time_counter *st, - time_counter *end); - -/** @brief Gets the difference in axi1 bus reads cycle counts - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return NPU AXI1 read cycle counts difference between the arguments expressed - * as unsigned 64 bit integer. - **/ -static uint64_t bm_get_npu_axi1_read_cycle_diff(time_counter *st, - time_counter *end); - -/** @brief Gets the difference for 6 collected cycle counts: - * 1) total NPU - * 2) active NPU - * 3) idle NPU - * 4) axi0 read - * 5) axi0 write - * 6) axi1 read - * */ -static int bm_get_npu_cycle_diff(time_counter *st, time_counter *end, - uint64_t* pmu_counters_values, const size_t size); - -#endif /* defined (ARM_NPU) */ - -#if defined(MPS3_PLATFORM) -/** - * @brief Wrapper for getting milliseconds duration between time counters - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Difference in milliseconds between given time counters. - **/ -static time_t bm_get_duration_ms(time_counter *st, time_counter *end); - -/** - * @brief Wrapper for getting microseconds duration between time counters - * @param[in] st Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Difference in microseconds between given time counters. - **/ -static time_t bm_get_duration_us(time_counter *st, time_counter *end); -#endif /* defined(MPS3_PLATFORM) */ - -/** - * @brief Wrapper for resetting timer. - **/ -static void bm_timer_reset(void); - -/** - * @brief Wrapper for getting the current timer counter. - * @return Current time counter value. - **/ -static time_counter bm_get_time_counter(void); - -/** - * @brief Wrapper for profiler start. - * @return Current profiler start timer counter. - **/ -static time_counter bm_start_profiling(void); - -/** - * @brief Wrapper for profiler end. - * @return Current profiler end timer counter. - **/ -static time_counter bm_stop_profiling(void); - -/** - * @brief Wrapper for getting CPU cycle difference between time counters. - * @return CPU cycle difference between given time counters expressed - * as unsigned 32 bit integer. - **/ -static uint64_t bm_get_cpu_cycles_diff(time_counter *st, time_counter *end); - -/** - * @brief Initialiser for bare metal timer. - * @param[in] timer Platform timer to initialize. - **/ -void init_timer(platform_timer *timer) -{ - assert(timer); - memset(timer, 0, sizeof(*timer)); - - timer->reset = bm_timer_reset; - timer->get_time_counter = bm_get_time_counter; - timer->start_profiling = bm_start_profiling; - timer->stop_profiling = bm_stop_profiling; - timer->get_cpu_cycle_diff = bm_get_cpu_cycles_diff; - timer->cap.cpu_cycles = 1; - -#if defined (MPS3_PLATFORM) - timer->cap.duration_ms = 1; - timer->cap.duration_us = 1; - timer->get_duration_ms = bm_get_duration_ms; - timer->get_duration_us = bm_get_duration_us; -#endif /* defined (MPS3_PLATFORM) */ - -#if defined (ARM_NPU) - /* We are capable of reporting npu cycle counts. */ - timer->cap.npu_cycles = 1; - timer->get_npu_cycles_diff = bm_get_npu_cycle_diff; - _init_ethosu_cyclecounter(); -#endif /* defined (ARM_NPU) */ - - timer->reset(); - timer->inited = 1; -} - -#if defined (ARM_NPU) -static void _reset_ethosu_counters() -{ - /* Reset all cycle and event counters. */ - ETHOSU_PMU_CYCCNT_Reset(ðosu_drv); - ETHOSU_PMU_EVCNTR_ALL_Reset(ðosu_drv); -} -static void _init_ethosu_cyclecounter() -{ - /* Reset overflow status. */ - ETHOSU_PMU_Set_CNTR_OVS(ðosu_drv, ETHOSU_PMU_CNT1_Msk | ETHOSU_PMU_CCNT_Msk); - /* We can retrieve only 4 PMU counters: */ - ETHOSU_PMU_Set_EVTYPER(ðosu_drv, 0, ETHOSU_PMU_NPU_IDLE); - ETHOSU_PMU_Set_EVTYPER(ðosu_drv, 1, ETHOSU_PMU_AXI0_RD_DATA_BEAT_RECEIVED); - ETHOSU_PMU_Set_EVTYPER(ðosu_drv, 2, ETHOSU_PMU_AXI0_WR_DATA_BEAT_WRITTEN); - ETHOSU_PMU_Set_EVTYPER(ðosu_drv, 3, ETHOSU_PMU_AXI1_RD_DATA_BEAT_RECEIVED); - /* Enable PMU. */ - ETHOSU_PMU_Enable(ðosu_drv); - /* Enable counters for cycle and counter# 0. */ - ETHOSU_PMU_CNTR_Enable(ðosu_drv, ETHOSU_PMU_CNT1_Msk | ETHOSU_PMU_CNT2_Msk | ETHOSU_PMU_CNT3_Msk | ETHOSU_PMU_CNT4_Msk| ETHOSU_PMU_CCNT_Msk); - _reset_ethosu_counters(); -} - -static int bm_get_npu_cycle_diff(time_counter *st, time_counter *end, - uint64_t* pmu_counters_values, const size_t size) -{ - if (size == 6) { - pmu_counters_values[0] = bm_get_npu_total_cycle_diff(st, end); - pmu_counters_values[1] = bm_get_npu_active_cycle_diff(st, end); - pmu_counters_values[2] = bm_get_npu_idle_cycle_diff(st, end); - pmu_counters_values[3] = bm_get_npu_axi0_read_cycle_diff(st, end); - pmu_counters_values[4] = bm_get_npu_axi0_write_cycle_diff(st, end); - pmu_counters_values[5] = bm_get_npu_axi1_read_cycle_diff(st, end); - return 0; - } else { - return 1; - } -} - -static uint64_t bm_get_npu_total_cycle_diff(time_counter *st, time_counter *end) -{ - return end->npu_total_ccnt - st->npu_total_ccnt; -} - -static uint32_t counter_overflow(uint32_t pmu_counter_mask) -{ - /* Check for overflow: The idle counter is 32 bit while the - total cycle count is 64 bit. */ - const uint32_t overflow_status = ETHOSU_PMU_Get_CNTR_OVS(ðosu_drv); - return pmu_counter_mask & overflow_status; -} - -static uint64_t bm_get_npu_idle_cycle_diff(time_counter *st, time_counter *end) -{ - if (counter_overflow(ETHOSU_PMU_CNT1_Msk)) { - printf_err("EthosU PMU idle counter overflow.\n"); - return 0; - } - return (uint64_t)(end->npu_idle_ccnt - st->npu_idle_ccnt); -} - -static uint64_t bm_get_npu_active_cycle_diff(time_counter *st, time_counter *end) -{ - /* Active NPU time = total time - idle time */ - return bm_get_npu_total_cycle_diff(st, end) - bm_get_npu_idle_cycle_diff(st, end); -} - -static uint64_t bm_get_npu_axi0_read_cycle_diff(time_counter *st, time_counter *end) -{ - if (counter_overflow(ETHOSU_PMU_CNT2_Msk)) { - printf_err("EthosU PMU axi0 read counter overflow.\n"); - return 0; - } - return (uint64_t)(end->npu_axi0_read_beats - st->npu_axi0_read_beats); -} - -static uint64_t bm_get_npu_axi0_write_cycle_diff(time_counter *st, time_counter *end) -{ - if (counter_overflow(ETHOSU_PMU_CNT3_Msk)) { - printf_err("EthosU PMU axi0 write counter overflow.\n"); - return 0; - } - return (uint64_t)(end->npu_axi0_write_beats - st->npu_axi0_write_beats); -} - -static uint64_t bm_get_npu_axi1_read_cycle_diff(time_counter *st, time_counter *end) -{ - if (counter_overflow(ETHOSU_PMU_CNT4_Msk)) { - printf_err("EthosU PMU axi1 read counter overflow.\n"); - return 0; - } - return (uint64_t)(end->npu_axi1_read_beats - st->npu_axi1_read_beats); -} - -#endif /* defined (ARM_NPU) */ - -static void bm_timer_reset(void) -{ -#if defined (ARM_NPU) - _init_ethosu_cyclecounter(); -#endif /* defined (ARM_NPU) */ - - timer_reset(); -} - -static time_counter bm_get_time_counter(void) -{ - time_counter t = { - .counter = get_time_counter(), - -#if defined (ARM_NPU) - .npu_total_ccnt = ETHOSU_PMU_Get_CCNTR(ðosu_drv), - .npu_idle_ccnt = ETHOSU_PMU_Get_EVCNTR(ðosu_drv, 0), - .npu_axi0_read_beats = ETHOSU_PMU_Get_EVCNTR(ðosu_drv, 1), - .npu_axi0_write_beats = ETHOSU_PMU_Get_EVCNTR(ðosu_drv, 2), - .npu_axi1_read_beats = ETHOSU_PMU_Get_EVCNTR(ðosu_drv, 3) -#endif /* defined (ARM_NPU) */ - - }; - -#if defined (ARM_NPU) - debug("NPU total cc: %" PRIu64 - "; NPU idle cc: %" PRIu32 - "; NPU axi0 read beats: %" PRIu32 - "; NPU axi0 write beats: %" PRIu32 - "; NPU axi1 read beats: %" PRIu32 "\n", - t.npu_total_ccnt, - t.npu_idle_ccnt, - t.npu_axi0_read_beats, - t.npu_axi0_write_beats, - t.npu_axi1_read_beats); -#endif /* defined (ARM_NPU) */ - - return t; -} - -static time_counter bm_start_profiling(void) -{ - start_cycle_counter(); - return bm_get_time_counter(); -} - -static time_counter bm_stop_profiling(void) -{ - stop_cycle_counter(); - return bm_get_time_counter(); -} - -static uint64_t bm_get_cpu_cycles_diff(time_counter *st, time_counter *end) -{ - return get_cycle_count_diff(&(st->counter), &(end->counter)); -} - -#if defined(MPS3_PLATFORM) -static time_t bm_get_duration_ms(time_counter *st, time_counter *end) -{ - return get_duration_milliseconds(&(st->counter), &(end->counter)); -} - -static time_t bm_get_duration_us(time_counter *st, time_counter *end) -{ - return get_duration_microseconds(&(st->counter), &(end->counter)); -} -#endif /* defined(MPS3_PLATFORM) */ diff --git a/source/application/hal/platforms/bare-metal/timer/include/baremetal_timer.h b/source/application/hal/platforms/bare-metal/timer/include/baremetal_timer.h deleted file mode 100644 index 0d23a05..0000000 --- a/source/application/hal/platforms/bare-metal/timer/include/baremetal_timer.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef BAREMETAL_TIMER_H -#define BAREMETAL_TIMER_H - -#include <stdint.h> -#include <time.h> - -#if defined (MPS3_PLATFORM) - #include "timer_mps3.h" - typedef mps3_time_counter base_time_counter; -#else /* defined (MPS3_PLATFORM) */ - #include "timer_simple_platform.h" - typedef generic_time_counter base_time_counter; -#endif /* defined (MPS3_PLATFORM) */ - -typedef struct bm_time_counter { - base_time_counter counter; - -#if defined (ARM_NPU) - uint64_t npu_total_ccnt; - uint32_t npu_idle_ccnt; - uint32_t npu_axi0_read_beats; - uint32_t npu_axi0_write_beats; - uint32_t npu_axi1_read_beats; -#endif /* ARM_NPU */ - -} time_counter; - -#endif /* BAREMETAL_TIMER_H */ diff --git a/source/application/hal/platforms/bare-metal/utils/include/system_init.h b/source/application/hal/platforms/bare-metal/utils/include/system_init.h deleted file mode 100644 index 84e0305..0000000 --- a/source/application/hal/platforms/bare-metal/utils/include/system_init.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef BAREMETAL_SYSTEM_INIT_H -#define BAREMETAL_SYSTEM_INIT_H - -#include "bsp.h" - -/** - * @brief Initialises the platform (MPS3 FPGA board or Fixed Virtual Platform) - * Updates the system core clock and initialises the UART. It also - * verifies that the Cortex-M CPU variant being used matches the expected - * value if running on MPS3. - * @return 0 if successful, error code otherwise. -*/ -int system_init(void); - -/** - * @brief Releases the platform (MPS3 FPGA board or Fixed Virtual Platform). - **/ -void system_release(void); - -/** - * @brief Return the name the platform (MPS3 FPGA board or Fixed Virtual Platform). - * @param[out] name Platform name string. - * @param[in] size Name string length. - **/ -void system_name(char* name, size_t size); - -#endif /* BAREMETAL_SYSTEM_INIT_H */ diff --git a/source/application/hal/platforms/bare-metal/utils/system_init.c b/source/application/hal/platforms/bare-metal/utils/system_init.c deleted file mode 100644 index 376f08b..0000000 --- a/source/application/hal/platforms/bare-metal/utils/system_init.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "system_init.h" - -#include "uart_stdout.h" - -#include <string.h> -#include <inttypes.h> - -#if defined(MPS3_PLATFORM) -#define CREATE_MASK(msb, lsb) (int)(((1U << ((msb) - (lsb) + 1)) - 1) << (lsb)) -#define MASK_BITS(arg, msb, lsb) (int)((arg) & CREATE_MASK(msb, lsb)) -#define EXTRACT_BITS(arg, msb, lsb) (int)(MASK_BITS(arg, msb, lsb) >> (lsb)) -#endif /* MPS3_PLATFORM */ - -int system_init(void) -{ -#if defined(MPS3_PLATFORM) - uint32_t id = 0; - uint32_t fpgaid = 0; - uint32_t apnote = 0; - uint32_t rev = 0; - uint32_t aid = 0; - uint32_t fpga_clk = 0; - const uint32_t ascii_A = (uint32_t)('A'); - - /* Initialise the LEDs as the switches are */ - MPS3_FPGAIO->LED = MPS3_FPGAIO->SWITCHES & 0xFF; -#endif - - /* UART init - will enable valid use of printf (stdout - * re-directed at this UART (UART0) */ - UartStdOutInit(); - info("Processor internal clock: %" PRIu32 "Hz\n", GetSystemCoreClock()); - -#if defined(MPS3_PLATFORM) - /* Get revision information from various registers */ - rev = MPS3_SCC->CFG_REG4; - fpgaid = MPS3_SCC->SCC_ID; - aid = MPS3_SCC->SCC_AID; - apnote = EXTRACT_BITS(fpgaid, 15, 4); - fpga_clk = GetMPS3CoreClock(); - - info("V2M-MPS3 revision %c\n\n", (char)(rev + ascii_A)); - info("Application Note AN%" PRIx32 ", Revision %c\n", apnote, - (char)(EXTRACT_BITS(aid, 23, 20) + ascii_A)); - info("MPS3 build %d\n", EXTRACT_BITS(aid, 31, 24)); - info("MPS3 core clock has been set to: %" PRIu32 "Hz\n", fpga_clk); - - /* Display CPU ID */ - id = SCB->CPUID; - info("CPU ID: 0x%08" PRIx32 "\n", id); - - if(EXTRACT_BITS(id, 15, 8) == 0xD2) { - if (EXTRACT_BITS(id, 7, 4) == 2) { - info ("CPU: Cortex-M55 r%dp%d\n\n", - EXTRACT_BITS(id, 23, 20),EXTRACT_BITS(id, 3, 0)); -#if defined (CPU_CORTEX_M55) - /* CPU ID should be "0x_41_0f_d2_20" for Cortex-M55 */ - return 0; -#endif /* CPU_CORTEX_M55 */ - } else if (EXTRACT_BITS(id, 7, 4) == 1) { - info ("CPU: Cortex-M33 r%dp%d\n\n", - EXTRACT_BITS(id, 23, 20),EXTRACT_BITS(id, 3, 0)); -#if defined (CPU_CORTEX_M33) - return 0; -#endif /* CPU_CORTEX_M33 */ - } else if (EXTRACT_BITS(id, 7, 4) == 0) { - info ("CPU: Cortex-M23 r%dp%d\n\n", - EXTRACT_BITS(id, 23, 20),EXTRACT_BITS(id, 3, 0)); - } else { - info ("CPU: Cortex-M processor family"); - } - } else if (EXTRACT_BITS(id, 15, 8) == 0xC6) { - info ("CPU: Cortex-M%d+ r%dp%d\n\n", - EXTRACT_BITS(id, 7, 4), EXTRACT_BITS(id, 23, 20), - EXTRACT_BITS(id, 3, 0)); - } else { - info ("CPU: Cortex-M%d r%dp%d\n\n", - EXTRACT_BITS(id, 7, 4), EXTRACT_BITS(id, 23, 20), - EXTRACT_BITS(id, 3, 0)); - } -#else /* MPS3_PLATFORM */ - - info("%s: complete\n", __FUNCTION__); - return 0; -#endif /* MPS3_PLATFORM */ - - /* If the CPU is anything other than M33 or M55, we return 1 */ - printf_err("CPU mismatch!\n"); - return 1; -} - -void system_release(void) -{ - __disable_irq(); -} - -void system_name(char* name, size_t size) -{ - strncpy(name, DESIGN_NAME, size); -}
\ No newline at end of file diff --git a/source/application/hal/platforms/native/data_acquisition/data_acq.c b/source/application/hal/platforms/native/data_acquisition/data_acq.c deleted file mode 100644 index 9b6815b..0000000 --- a/source/application/hal/platforms/native/data_acquisition/data_acq.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "data_acq.h" - -#include <assert.h> -#include <stdio.h> -#include <string.h> - -/** - * @brief Initialize the acuisition. - * @return 0 if successful, error code otherwise. - **/ -static int acquisition_init(void) -{ - return 0; -} - -/** - * @brief Get the user input from stdin. - * @param[out] user_input String read from the stdin. - * @param[in,out] size String read length. - * @return 0 if successful, error code otherwise. - **/ -static int get_user_input(char* user_input, int size) -{ - if (NULL == fgets(user_input, size, stdin)) { - return 1; - } - return 0; -} - -int data_acq_channel_init(data_acq_module *module) -{ - assert(module); - - module->system_init = acquisition_init; - module->get_input = get_user_input; - strncpy(module->system_name, "native", - sizeof(module->system_name)); - module->inited = !module->system_init(); - return !module->inited; -} - -int data_acq_channel_release(data_acq_module *module) -{ - assert(module); - module->inited = 0; - return 0; -} diff --git a/source/application/hal/platforms/native/data_presentation/data_psn.c b/source/application/hal/platforms/native/data_presentation/data_psn.c deleted file mode 100644 index fe4bcfa..0000000 --- a/source/application/hal/platforms/native/data_presentation/data_psn.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "data_psn.h" - -#include "log.h" - -#include <assert.h> -#include <string.h> - -int data_psn_system_init(data_psn_module *module) -{ - assert(module); - - module->system_init = log_psn_init; - module->present_data_image = log_display_image; - module->present_data_text = log_display_text; - module->present_box = log_display_box_icon; - module->set_text_color = log_set_text_color; - module->clear = log_clear; - strncpy(module->system_name, "log_psn", sizeof(module->system_name)); - module->inited = !module->system_init(); - return !module->inited; -} - -int data_psn_system_release(data_psn_module *module) -{ - /* Nothing to do here! */ - assert(module); - module->inited = 0; - return 0; -} diff --git a/source/application/hal/platforms/native/data_presentation/log/include/log.h b/source/application/hal/platforms/native/data_presentation/log/include/log.h deleted file mode 100644 index 9b9928f..0000000 --- a/source/application/hal/platforms/native/data_presentation/log/include/log.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef NATIVE_LOG_H -#define NATIVE_LOG_H - -#include <stdint.h> -#include <stddef.h> -#include <stdbool.h> - -/** - * @brief Data presentation initialiser - **/ -int log_psn_init(void); - -/** - * @brief Log parameters for the image to be displayed. - * @param[in] data Image pointer. - * @param[in] width Image width. - * @param[in] height Image height. - * @param[in] channels Number of channels. - * @param[in] pos_x Screen position x co-ordinate. - * @param[in] pos_y Screen position y co-ordinate. - * @param[in] downsample_factor Factor by which the image needs to be - * down-sampled. - * @return 0 if successful, non-zero otherwise. - **/ - -int log_display_image(uint8_t* data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor); - -/** - * @brief Log the parameters for text to be displayed. - * @param[in] str Pointer to a null terminated string. - * @param[in] str_sz Length of the string. - * @param[in] pos_x Screen position x co-ordinate. - * @param[in] pos_y Screen position y co-ordinate. - * @param[in] allow_multiple_lines Specifies if multiple lines are allowed. - * @return 0 if successful, non-zero otherwise. - **/ -int log_display_text(const char* str, const size_t str_sz, - const uint32_t pos_x, const uint32_t pos_y, - const bool allow_multiple_lines); - -/** - * @brief Log parameters for the box to be displayed. - * @param[in] pos_x Screen position x co-ordinate. - * @param[in] pos_y Screen position y co-ordinate. - * @param[in] width Width. - * @param[in] height Height. - * @param[in] color Fill color. - * @return 0 if successful, non-zero otherwise. - **/ -int log_display_box_icon(const uint32_t pos_x, const uint32_t pos_y, - const uint32_t width, const uint32_t height, const uint16_t color); - -/** - * @brief Logs the colour with which the display - * needs to be cleared with. - * @param[in] color Fill color. - * @return 0 if successful, non-zero otherwise. - **/ -int log_clear(const uint16_t color); - -/** - * @brief Logs the text color to be set. - * @param[in] color Fill color. - * @return 0 if successful, non-zero otherwise. - **/ -int log_set_text_color (const uint16_t color); - -#endif /* NATIVE_LOG_H */
\ No newline at end of file diff --git a/source/application/hal/platforms/native/data_presentation/log/log.c b/source/application/hal/platforms/native/data_presentation/log/log.c deleted file mode 100644 index 8dffba9..0000000 --- a/source/application/hal/platforms/native/data_presentation/log/log.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "log.h" - -#include "dummy_log.h" - -#include <stdint.h> - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wunused-parameter" -#elif defined(__GNUC__) - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wunused-parameter" -#endif - -int log_psn_init(void) -{ - return 0; -} - -int log_display_image(uint8_t* data, const uint32_t width, - const uint32_t height, const uint32_t channels, - const uint32_t pos_x, const uint32_t pos_y, - const uint32_t downsample_factor) -{ - debug("Image details\n"); - debug("Data: %p\n", data); - debug("WxHxC: %dx%dx%d\n", width, height, channels); - debug("Pos (x,y): (%d,%d)\n", pos_x, pos_y); - debug("Downsampling factor: %u\n", downsample_factor); - return 0; -} - -int log_display_text(const char* str, const size_t str_sz, - const uint32_t pos_x, const uint32_t pos_y, - const bool allow_multiple_lines) -{ - UNUSED(allow_multiple_lines); - debug("%s\n", str); - debug("Text size: %lu, x: %d, y: %d\n", str_sz, pos_x, pos_y); - return 0; -} - - -int log_display_box_icon(const uint32_t pos_x, const uint32_t pos_y, - const uint32_t width, const uint32_t height, - const uint16_t color) -{ - debug("Showing rectangular, width: %d, height: %d, color: %d, x: %d, y: %d\n", - width, height, color, pos_x, pos_y); - return 0; -} - -int log_clear(const uint16_t color) -{ - debug("Clearing with color: %d\n", color); - return 0; -} - -int log_set_text_color (const uint16_t color) -{ - debug("Setting text color: %d\n", color); - return 0; -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#elif defined(__GNUC__) - #pragma GCC diagnostic pop -#endif diff --git a/source/application/hal/platforms/native/timer/include/native_timer.h b/source/application/hal/platforms/native/timer/include/native_timer.h deleted file mode 100644 index df7b493..0000000 --- a/source/application/hal/platforms/native/timer/include/native_timer.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef TIMER_H -#define TIMER_H - -#include <stdint.h> -#include <time.h> - -/* Container for time struct */ -typedef struct _time_counter { - /* Current POSIX time in secs. */ - time_t current_secs; - /* Nanoseconds expired in current second. */ - time_t current_nsecs; -} time_counter; - -#endif /* TIMER_H */
\ No newline at end of file diff --git a/source/application/hal/platforms/native/timer/native_timer.cc b/source/application/hal/platforms/native/timer/native_timer.cc deleted file mode 100644 index c115f4d..0000000 --- a/source/application/hal/platforms/native/timer/native_timer.cc +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifdef __cplusplus -extern "C" { -#endif - -#include "timer.h" - -#include <cassert> -#include <ctime> -#include <cstring> - -#define MILLISECONDS_IN_SECOND 1000 -#define MICROSECONDS_IN_SECOND 1000000 -#define NANOSECONDS_IN_MILLISECOND 1000000 -#define NANOSECONDS_IN_MICROSECOND 1000 - -/** - * @brief Gets the current time counter value. - * @return Counter value expressed in terms of time_counter struct. - **/ -static time_counter get_time_counter(void) -{ - struct timespec current_time{}; - clock_gettime(1, ¤t_time); - time_counter t = { - .current_secs = current_time.tv_sec, - .current_nsecs = current_time.tv_nsec - }; - - return t; -} - -/** - * @brief Gets the time duration elapsed between start and end. - * @param[in] start Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Difference in milliseconds between the arguments expressed - * as unsigned 32 bit integer. - **/ -static time_t get_duration_milliseconds(time_counter *start, time_counter *end) -{ - /* Convert both parts of time struct to ms then add for complete time. */ - time_t seconds_part = - (end->current_secs - start->current_secs) * MILLISECONDS_IN_SECOND; - time_t nanoseconds_part = - (end->current_nsecs - start->current_nsecs) / NANOSECONDS_IN_MILLISECOND; - - return seconds_part + nanoseconds_part; -} - -/** - * @brief Gets the time duration elapsed between start and end. - * @param[in] start Pointer to time_counter value at start time. - * @param[in] end Pointer to time_counter value at end. - * @return Difference in microseconds between the arguments expressed - * as unsigned 32 bit integer. - **/ -static time_t get_duration_microseconds(time_counter *start, time_counter *end) -{ - /* Convert both parts of time struct to us then add for complete time. */ - time_t seconds_part = - (end->current_secs - start->current_secs) * MICROSECONDS_IN_SECOND; - time_t nanoseconds_part = - (end->current_nsecs - start->current_nsecs) / NANOSECONDS_IN_MICROSECOND; - - return seconds_part + nanoseconds_part; -} - -/** - * @brief Stub for timer reset. - **/ -void reset_timer() {} - -/** - * @brief Initialise the timer for this platform. - **/ -void init_timer(platform_timer *timer) -{ - assert(timer); - memset(timer, 0, sizeof(*timer)); - - timer->get_time_counter = get_time_counter; - timer->start_profiling = get_time_counter; - timer->stop_profiling = get_time_counter; - timer->get_duration_ms = get_duration_milliseconds; - timer->cap.duration_ms = 1; - timer->get_duration_us = get_duration_microseconds; - timer->cap.duration_us = 1; - timer->reset = reset_timer; - timer->inited = 1; -} - -#ifdef __cplusplus -} -#endif diff --git a/source/application/hal/platforms/native/utils/include/dummy_log.h b/source/application/hal/platforms/native/utils/include/dummy_log.h deleted file mode 100644 index 3df5c5c..0000000 --- a/source/application/hal/platforms/native/utils/include/dummy_log.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef DUMMY_LOG_H -#define DUMMY_LOG_H - -#include <stdio.h> - -#define LOG_LEVEL_TRACE 0 -#define LOG_LEVEL_DEBUG 1 -#define LOG_LEVEL_INFO 2 -#define LOG_LEVEL_WARN 3 -#define LOG_LEVEL_ERROR 4 - -#ifndef LOG_LEVEL -#define LOG_LEVEL LOG_LEVEL_INFO -#endif /*LOG_LEVEL*/ - -#define UNUSED(x) ((void)(x)) - -#if (LOG_LEVEL == LOG_LEVEL_TRACE) - #define trace(...) printf("TRACE - "); printf(__VA_ARGS__) -#else - #define trace(...) -#endif /* LOG_LEVEL == LOG_LEVEL_TRACE */ - -#if (LOG_LEVEL <= LOG_LEVEL_DEBUG) - #define debug(...) printf("DEBUG - "); printf(__VA_ARGS__) -#else - #define debug(...) -#endif /* LOG_LEVEL > LOG_LEVEL_TRACE */ - -#if (LOG_LEVEL <= LOG_LEVEL_INFO) - #define info(...) printf("INFO - "); printf(__VA_ARGS__) -#else - #define info(...) -#endif /* LOG_LEVEL > LOG_LEVEL_DEBUG */ - -#if (LOG_LEVEL <= LOG_LEVEL_WARN) - #define warn(...) printf("WARN - "); printf(__VA_ARGS__) -#else - #define warn(...) -#endif /* LOG_LEVEL > LOG_LEVEL_INFO */ - -#if (LOG_LEVEL <= LOG_LEVEL_ERROR) - #define printf_err(...) printf("ERROR - "); printf(__VA_ARGS__) -#else - #define printf_err(...) -#endif /* LOG_LEVEL > LOG_LEVEL_INFO */ - -#endif /* DUMMY_LOG_H */
\ No newline at end of file diff --git a/source/application/hal/platforms/native/utils/include/system_init.h b/source/application/hal/platforms/native/utils/include/system_init.h deleted file mode 100644 index 80b1bb2..0000000 --- a/source/application/hal/platforms/native/utils/include/system_init.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef NATIVE_SYSTEM_INIT_H -#define NATIVE_SYSTEM_INIT_H - -#include "dummy_log.h" - -/** - * @brief Platform initialisation for native platform. - **/ -int system_init(void); - -/** - * @brief Platform release for native platform. - **/ -void system_release(void); - -/** - * @brief Returns the name of the platform. - * @param[out] name Platform name string. - * @param[in] size Name string length. - */ -void system_name(char* name, size_t size); - -#endif /* NATIVE_SYSTEM_INIT_H */ diff --git a/source/application/hal/platforms/native/utils/system_init.c b/source/application/hal/platforms/native/utils/system_init.c deleted file mode 100644 index 8e0b768..0000000 --- a/source/application/hal/platforms/native/utils/system_init.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "system_init.h" - -#include <string.h> - -int system_init(void) -{ - return 0; -} - -void system_release(void) -{} - -void system_name(char* name, size_t size) -{ - strncpy(name, "native", size); -}
\ No newline at end of file |