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authorIsabella Gottardi <isabella.gottardi@arm.com>2021-08-06 15:39:41 +0100
committerIsabella Gottardi <isabella.gottardi@arm.com>2021-08-06 16:02:23 +0100
commitf5907730c3cea2f1e2055a01d9f9afc7de0a6283 (patch)
tree97172b1391cbbc647a1df4e171fa9877d94ee553 /source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct
parent93e59512c3b7871d32503afeef54f5f72603beb9 (diff)
downloadml-embedded-evaluation-kit-f5907730c3cea2f1e2055a01d9f9afc7de0a6283.tar.gz
Fix documentation.
* Fix broken link "building-for-different-ethos_u-npu-variants" * Corstone-300 + Ethos-U65 NPU support in memory_considerations Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com> Change-Id: I2e99e2d24d3cd0bb64e06481862660d1b0679f20
Diffstat (limited to 'source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct')
-rw-r--r--source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct2
1 files changed, 1 insertions, 1 deletions
diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct b/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct
index deb4214..0c6a388 100644
--- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct
+++ b/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.sct
@@ -59,7 +59,7 @@ LOAD_REGION_0 0x00000000 0x00080000
; SSE-300's internal SRAM of 4MiB - reserved for
; activation buffers.
; This region should have 3 cycle read latency from
- ; both Cortex-M55 and Ethos-U55
+ ; both Cortex-M55 and Ethos-U NPU
;-----------------------------------------------------
isram.bin 0x31000000 UNINIT ALIGN 16 0x00400000
{