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authorÉanna Ó Catháin <eanna.ocathain@arm.com>2021-09-15 09:32:30 +0100
committerKshitij Sisodia <kshitij.sisodia@arm.com>2021-09-16 16:01:23 +0100
commit8f9588721cbb7356b03a714c97d6b3a9a6e89438 (patch)
tree1ca19d31958081c09f360d91e15fefb6e38b3992 /source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld
parente6588f620c648dd0492f6133152855d77c672568 (diff)
downloadml-embedded-evaluation-kit-8f9588721cbb7356b03a714c97d6b3a9a6e89438.tar.gz
MLECO-2082: Adding visual wake word use case21.08
MLECO-2083: Refactoring img_class and visual wake word *Added source files for visual wake word *Added tests *Added docs *Added new images for visual wake word demo *Refactored common functions in img_class, visual wake word and other usecases Change-Id: Ibd25854e19a5517f940a8d3086a5d4835fab89e9 Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
Diffstat (limited to 'source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld')
-rw-r--r--source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld28
1 files changed, 22 insertions, 6 deletions
diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld b/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld
index 8bb99cd..ceaff7d 100644
--- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld
+++ b/source/application/hal/platforms/bare-metal/bsp/mem_layout/simple_platform.ld
@@ -65,7 +65,14 @@ SECTIONS
.text.at_itcm :
{
KEEP(*(.vectors))
- *(.text*)
+
+ /**
+ * All code goes here, with one exception of
+ * all_ops_resolver object file. This code
+ * instead placed on BRAM. See comment in the
+ * BRAM section for details.
+ **/
+ *(EXCLUDE_FILE(*all_ops_resolver.o *hal.c.obj) .text*)
KEEP(*(.init))
KEEP(*(.fini))
@@ -87,11 +94,6 @@ SECTIONS
KEEP(*(.eh_frame*))
} > ITCM
- .ARM.extab.at_itcm :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > ITCM
-
__exidx_start = .;
.ARM.exidx.at_itcm :
{
@@ -208,6 +210,20 @@ SECTIONS
KEEP(*(.jcr*))
. = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+
+ /**
+ * Place the all ops resolver code data here. This accounts
+ * for ~4k worth of saving on the ITCM load region. It is
+ * only designed to be included (by default) for the inference
+ * runner use case.
+ **/
+ *all_ops_resolver.o (*.text*)
+ . = ALIGN(4);
+ *hal.c.obj (*.text*)
+ . = ALIGN(4);
+
__data_end__ = .;
} > BRAM