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author | Kshitij Sisodia <kshitij.sisodia@arm.com> | 2022-05-24 17:46:55 +0100 |
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committer | Kshitij Sisodia <kshitij.sisodia@arm.com> | 2022-05-25 15:48:44 +0000 |
commit | 6b857b8a245ceeedd70bc768784cf617db132d0d (patch) | |
tree | 4605afedc9aa3db5dcd506103c4030d010ae7ca5 /scripts | |
parent | 7487145426c692e7e3370fd288f5355ffd76ada2 (diff) | |
download | ml-embedded-evaluation-kit-6b857b8a245ceeedd70bc768784cf617db132d0d.tar.gz |
MLECO-3185: Documentation updates
Documentation updated to reflect refactoring changes
in the last few weeks.
Change-Id: Ic7abf5cc3af9898123049e890c189ed74e505309
Diffstat (limited to 'scripts')
-rw-r--r-- | scripts/mps3/sse-310/images.txt | 27 |
1 files changed, 9 insertions, 18 deletions
diff --git a/scripts/mps3/sse-310/images.txt b/scripts/mps3/sse-310/images.txt index 8a920cb..ef9ae8e 100644 --- a/scripts/mps3/sse-310/images.txt +++ b/scripts/mps3/sse-310/images.txt @@ -1,23 +1,14 @@ TITLE: Arm MPS3 FPGA prototyping board Images Configuration File -; MCC mapping for Corstone-310 MPS3 bitfile package AN555 -; +-------------+---------------+-------------------------------+ -; | FPGA addr | MCC addr | Region | -; +-------------+---------------+-------------------------------+ -; | 0x00000000 | 0x00000000 | ITCM (NS) | -; | 0x01000000 | 0x02000000 | BRAM or FPGA's data SRAM (NS) | -; | 0x60000000 | 0x08000000 | DDR (NS) | -; | 0x70000000 | 0x0c000000 | DDR (S) | -; +-------------+---------------+-------------------------------+ - [IMAGES] +TOTALIMAGES: 2 ;Number of Images (Max: 32) -TOTALIMAGES: 2 ;Number of Images (Max: 32) - -IMAGE0ADDRESS: 0x00000000 ; MCC@0x00000000 <=> FPGA@0x00000000 -IMAGE0UPDATE: AUTO -IMAGE0FILE: \SOFTWARE\itcm.bin +IMAGE0PORT: 1 +IMAGE0ADDRESS: 0x00_1100_0000 ; Address to load into +IMAGE0UPDATE: RAM ; Image Update:NONE/AUTO/FORCE +IMAGE0FILE: \SOFTWARE\bram.bin ; Image/data to be loaded -IMAGE1ADDRESS: 0x0c000000 ; MCC@0x0c000000 <=> FPGA@0x70000000 -IMAGE1UPDATE: AUTO -IMAGE1FILE: \SOFTWARE\ddr.bin +IMAGE1PORT: 1 +IMAGE1ADDRESS: 0x00_7000_0000 ; Address to load into +IMAGE1UPDATE: RAM ; Image Update:NONE/AUTO/FORCE +IMAGE1FILE: \SOFTWARE\ddr.bin ; Image/data to be loaded |