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| author | Kshitij Sisodia <kshitij.sisodia@arm.com> | 2022-05-17 11:16:22 +0100 |
|---|---|---|
| committer | Kshitij Sisodia <kshitij.sisodia@arm.com> | 2022-05-17 11:16:22 +0100 |
| commit | 8c61c0a3cb8d6b534d1e423211e06b89f45bf223 (patch) | |
| tree | 24895ed5f20d4cad92fbcd679fb9637637931e18 /scripts/mps3 | |
| parent | b76b855448d58b85f53642532375c9b7808ab14d (diff) | |
| download | ml-embedded-evaluation-kit-8c61c0a3cb8d6b534d1e423211e06b89f45bf223.tar.gz | |
MLECO-2985 Adding Corstone-310 support
Change-Id: Ifa4b11154478355c10cb3e747b9938a74afd242b
Signed-off-by: Eanna O Cathain <eanna.ocathain@arm.com>
Diffstat (limited to 'scripts/mps3')
| -rw-r--r-- | scripts/mps3/sse-310/images.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/scripts/mps3/sse-310/images.txt b/scripts/mps3/sse-310/images.txt new file mode 100644 index 0000000..8a920cb --- /dev/null +++ b/scripts/mps3/sse-310/images.txt @@ -0,0 +1,23 @@ +TITLE: Arm MPS3 FPGA prototyping board Images Configuration File + +; MCC mapping for Corstone-310 MPS3 bitfile package AN555 +; +-------------+---------------+-------------------------------+ +; | FPGA addr | MCC addr | Region | +; +-------------+---------------+-------------------------------+ +; | 0x00000000 | 0x00000000 | ITCM (NS) | +; | 0x01000000 | 0x02000000 | BRAM or FPGA's data SRAM (NS) | +; | 0x60000000 | 0x08000000 | DDR (NS) | +; | 0x70000000 | 0x0c000000 | DDR (S) | +; +-------------+---------------+-------------------------------+ + +[IMAGES] + +TOTALIMAGES: 2 ;Number of Images (Max: 32) + +IMAGE0ADDRESS: 0x00000000 ; MCC@0x00000000 <=> FPGA@0x00000000 +IMAGE0UPDATE: AUTO +IMAGE0FILE: \SOFTWARE\itcm.bin + +IMAGE1ADDRESS: 0x0c000000 ; MCC@0x0c000000 <=> FPGA@0x70000000 +IMAGE1UPDATE: AUTO +IMAGE1FILE: \SOFTWARE\ddr.bin |