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| author | alexander <alexander.efremov@arm.com> | 2021-03-26 21:42:19 +0000 |
|---|---|---|
| committer | Kshitij Sisodia <kshitij.sisodia@arm.com> | 2021-03-29 16:29:55 +0100 |
| commit | 3c79893217bc632c9b0efa815091bef3c779490c (patch) | |
| tree | ad06b444557eb8124652b45621d736fa1b92f65d /docs/sections/appendix.md | |
| parent | 6ad6d55715928de72979b04194da1bdf04a4c51b (diff) | |
| download | ml-embedded-evaluation-kit-21.03.tar.gz | |
Opensource ML embedded evaluation kit21.03
Change-Id: I12e807f19f5cacad7cef82572b6dd48252fd61fd
Diffstat (limited to 'docs/sections/appendix.md')
| -rw-r--r-- | docs/sections/appendix.md | 20 |
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diff --git a/docs/sections/appendix.md b/docs/sections/appendix.md new file mode 100644 index 0000000..7b56faa --- /dev/null +++ b/docs/sections/appendix.md @@ -0,0 +1,20 @@ +# Appendix + +## Arm® Cortex®-M55 Memory map overview for Corstone™-300 reference design + +The table below is the memory mapping information specific to the Arm® Cortex®-M55. + +| Name | Base address | Limit address | Size | IDAU | Remarks | +|-------|--------------|---------------|-----------|------|-----------------------------------------------------------| +| ITCM | 0x0000_0000 | 0x0007_FFFF | 512 kiB | NS | ITCM code region | +| BRAM | 0x0100_0000 | 0x0120_0000 | 2 MiB | NS | FPGA data SRAM region | +| DTCM | 0x2000_0000 | 0x2007_FFFF | 512 kiB | NS | 4 banks for 128 kiB each | +| SRAM | 0x2100_0000 | 0x213F_FFFF | 4 MiB | NS | 2 banks of 2 MiB each as SSE-300 internal SRAM region | +| DDR | 0x6000_0000 | 0x6FFF_FFFF | 256 MiB | NS | DDR memory region | +| ITCM | 0x1000_0000 | 0x1007_FFFF | 512 kiB | S | ITCM code region | +| BRAM | 0x1100_0000 | 0x1120_0000 | 2 MiB | S | FPGA data SRAM region | +| DTCM | 0x3000_0000 | 0x3007_FFFF | 512 kiB | S | 4 banks for 128 kiB each | +| SRAM | 0x3100_0000 | 0x313F_FFFF | 4 MiB | S | 2 banks of 2 MiB each as SSE-300 internal SRAM region | +| DDR | 0x7000_0000 | 0x7FFF_FFFF | 256 MiB | S | DDR memory region | + +Default memory map can be found here: https://developer.arm.com/documentation/101051/0002/Memory-model/Memory-map
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