MLECO-3847: Optimisation flag for TensorFlow Lite Micro

Overriding the default THIRD_PARTY_KERNEL_OPTIMIZATION_LEVEL flag
for comilation of Arm CMSIS-NN library. GNU linker script also
needed to be modified with this change because of increase in
the code footprint.

Change-Id: I65c76fcaf4b6421533086a0905b2e6f0048b46fd
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>

4 files changed, 49 insertions, 22 deletions

diff --git a/scripts/cmake/platforms/mps3/sse-300/mps3-sse-300.ld b/scripts/cmake/platforms/mps3/sse-300/mps3-sse-300.ld
index 880a233..2d72ed9 100644
--- a/scripts/cmake/platforms/mps3/sse-300/mps3-sse-300.ld
+++ b/scripts/cmake/platforms/mps3/sse-300/mps3-sse-300.ld
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2021 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ * SPDX-FileCopyrightText: Copyright 2021, 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
  * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -74,12 +74,17 @@ SECTIONS
     KEEP(*(.vectors))
 
     /**
-     * All code goes here, with one exception of
-     * all_ops_resolver object file. This code
-     * instead placed on BRAM. See comment in the
-     * BRAM section for details.
-     **/
-    *(EXCLUDE_FILE(*all_ops_resolver.o *hal.c.obj) .text*)
+     * Any code that is not time sensitive can be excluded from here.
+     * This code is instead placed on BRAM. See comment in the BRAM
+     * section for details.
+     */
+    *(EXCLUDE_FILE(*all_ops_resolver.o
+                   *hal.c.obj
+                   *_allocator.o
+                   *flatbuffer*.o
+                   *lcd*.obj
+                   *timing_adapter.c.obj)
+    .text*)
 
     KEEP(*(.init))
     KEEP(*(.fini))
@@ -238,6 +243,14 @@ SECTIONS
     . = ALIGN(4);
     *hal.c.obj (*.text*)
     . = ALIGN(4);
+    *_allocator.o (*.text*)
+    . = ALIGN(4);
+    *flatbuffer*.o (*.text*)
+    . = ALIGN(4);
+    *lcd*.obj (*.text*)
+    . = ALIGN(4);
+    *timing_adapter.* (*.text*)
+    . = ALIGN(4);
 
     __data_end__ = .;
   } > BRAM
diff --git a/scripts/cmake/platforms/mps3/sse-310/mps3-sse-310.sct b/scripts/cmake/platforms/mps3/sse-310/mps3-sse-310.sct
index c46fae4..61f2aba 100644
--- a/scripts/cmake/platforms/mps3/sse-310/mps3-sse-310.sct
+++ b/scripts/cmake/platforms/mps3/sse-310/mps3-sse-310.sct
@@ -1,4 +1,4 @@
-;  SPDX-FileCopyrightText: Copyright 2021 Arm Limited and/or its affiliates <open-source-office@arm.com>
+;  SPDX-FileCopyrightText: Copyright 2021, 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
 ;  SPDX-License-Identifier: Apache-2.0
 ;
 ;  Licensed under the Apache License, Version 2.0 (the "License");
@@ -30,13 +30,13 @@
 LOAD_REGION_0       0x11000000                  0x00200000
 {
     ;-----------------------------------------------------
-    ; 0.5 MiB of SRAM/BRAM region. Our vector table also
+    ; First 640K of SRAM/BRAM. Our vector table also
     ; resides here as the default INITSVTOR is 0x11000000.
     ; We currently do not use the ITCM for any code, but
     ; could potentially put some critical code in there
     ; if we need to.
     ;-----------------------------------------------------
-    bram.bin        0x11000000                  0x00080000
+    bram.bin        0x11000000                  0x000A0000
     {
         *.o (RESET, +First)
         * (InRoot$$Sections)
@@ -46,10 +46,10 @@ LOAD_REGION_0       0x11000000                  0x00200000
     }
 
     ;-----------------------------------------------------
-    ; Next 0.5 MiB of SRAM/BRAM region for RO, RW and ZI
+    ; Next 384K of SRAM/BRAM region for RO, RW and ZI
     ; data, 8 byte aligned.
     ;-----------------------------------------------------
-    data.bin        0x11080000 ALIGN 8          0x00080000
+    data.bin        0x110A0000 ALIGN 8          0x00060000
     {
         ; Any RO-DATA
         .ANY (+RO-DATA)
diff --git a/scripts/cmake/platforms/simple_platform/simple_platform.ld b/scripts/cmake/platforms/simple_platform/simple_platform.ld
index 40b8ab6..492f6da 100644
--- a/scripts/cmake/platforms/simple_platform/simple_platform.ld
+++ b/scripts/cmake/platforms/simple_platform/simple_platform.ld
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2021 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ * SPDX-FileCopyrightText: Copyright 2021,2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
  * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -67,12 +67,17 @@ SECTIONS
     KEEP(*(.vectors))
 
     /**
-     * All code goes here, with one exception of
-     * all_ops_resolver object file. This code
-     * instead placed on BRAM. See comment in the
-     * BRAM section for details.
-     **/
-    *(EXCLUDE_FILE(*all_ops_resolver.o *hal.c.obj) .text*)
+     * Any code that is not time sensitive can be excluded from here.
+     * This code is instead placed on BRAM. See comment in the BRAM
+     * section for details.
+     */
+    *(EXCLUDE_FILE(*all_ops_resolver.o
+                   *hal.c.obj
+                   *_allocator.o
+                   *flatbuffer*.o
+                   *lcd*.obj
+                   *timing_adapter.c.obj)
+    .text*)
 
     KEEP(*(.init))
     KEEP(*(.fini))
@@ -231,6 +236,14 @@ SECTIONS
     . = ALIGN(4);
     *hal.c.obj (*.text*)
     . = ALIGN(4);
+    *_allocator.o (*.text*)
+    . = ALIGN(4);
+    *flatbuffer*.o (*.text*)
+    . = ALIGN(4);
+    *lcd*.obj (*.text*)
+    . = ALIGN(4);
+    *timing_adapter.* (*.text*)
+    . = ALIGN(4);
 
     __data_end__ = .;
   } > BRAM
diff --git a/scripts/cmake/tensorflow.cmake b/scripts/cmake/tensorflow.cmake
index 29d5bce..ea3b320 100644
--- a/scripts/cmake/tensorflow.cmake
+++ b/scripts/cmake/tensorflow.cmake
@@ -1,5 +1,5 @@
 #----------------------------------------------------------------------------
-#  SPDX-FileCopyrightText: Copyright 2021-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
+#  SPDX-FileCopyrightText: Copyright 2021-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
 #  SPDX-License-Identifier: Apache-2.0
 #
 #  Licensed under the Apache License, Version 2.0 (the "License");
@@ -26,8 +26,8 @@ if (CMAKE_BUILD_TYPE STREQUAL Debug)
     set(TENSORFLOW_LITE_MICRO_CORE_OPTIMIZATION_LEVEL "-O0")
     set(TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL "-O0")
 elseif (CMAKE_BUILD_TYPE STREQUAL Release)
-    set(TENSORFLOW_LITE_MICRO_CORE_OPTIMIZATION_LEVEL "-O3")
-    set(TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL "-O3")
+    set(TENSORFLOW_LITE_MICRO_CORE_OPTIMIZATION_LEVEL "-Ofast")
+    set(TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL "-Ofast")
 endif()
 
 assert_defined(TENSORFLOW_LITE_MICRO_BUILD_TYPE)
@@ -118,6 +118,7 @@ add_custom_target(tensorflow_build ALL
 
         $<$<BOOL:${TENSORFLOW_LITE_MICRO_CORE_OPTIMIZATION_LEVEL}>:CORE_OPTIMIZATION_LEVEL=${TENSORFLOW_LITE_MICRO_CORE_OPTIMIZATION_LEVEL}>
         $<$<BOOL:${TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL}>:KERNEL_OPTIMIZATION_LEVEL=${TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL}>
+        $<$<BOOL:${TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL}>:THIRD_PARTY_KERNEL_OPTIMIZATION_LEVEL=${TENSORFLOW_LITE_MICRO_KERNEL_OPTIMIZATION_LEVEL}>
         $<$<BOOL:${TENSORFLOW_LITE_MICRO_OPTIMIZED_KERNEL}>:OPTIMIZED_KERNEL_DIR=${TENSORFLOW_LITE_MICRO_OPTIMIZED_KERNEL}>
         $<$<BOOL:${TENSORFLOW_LITE_MICRO_CO_PROCESSOR}>:CO_PROCESSOR=${TENSORFLOW_LITE_MICRO_CO_PROCESSOR}>