From b6dd9c2e5fcf2885fb42dab567378c8aec22215c Mon Sep 17 00:00:00 2001 From: Tim Hall Date: Thu, 12 Aug 2021 18:35:14 +0100 Subject: MLBEDSW-5028: SRAM target exceeded for legacy_sram_size test option - Changed mem_type_size() to only return a hard limit Signed-off-by: Tim Hall Change-Id: Ia9271c54a592965f88f52fe25a52b3efaca88500 --- ethosu/vela/architecture_features.py | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'ethosu') diff --git a/ethosu/vela/architecture_features.py b/ethosu/vela/architecture_features.py index 5e26f1a1..e79ed720 100644 --- a/ethosu/vela/architecture_features.py +++ b/ethosu/vela/architecture_features.py @@ -517,14 +517,13 @@ class ArchitectureFeatures: ) def mem_type_size(self, mem_type: MemType) -> int: - """Returns size in bytes available for the given memory type""" - if mem_type == MemType.Scratch_fast or (mem_type == MemType.Scratch and not self.is_spilling_enabled()): - # the arena cache memory area always contains the scratch fast memory type. it also contains the scratch - # memory type when memory spilling is not being used + """Returns size in bytes available for the given memory type. This is a hard limit.""" + if mem_type == MemType.Scratch_fast and self.is_spilling_enabled(): + # when accessing the scratch fast memory type with memory spilling enabled the arena_cache_size refers to + # the cache memory area which is a hard limit return self.arena_cache_size else: - # the compiler is not aware of the memory limits for these memory types and so all it can do is return the - # maximum address size + # for all other memory types and modes the hard limit is the maximum possible address offset return self.max_address_offset def _mem_port_mapping(self, mem_port): -- cgit v1.2.1