From 8bc7a652607a771e234fda6b05275542ff0fc072 Mon Sep 17 00:00:00 2001 From: Tim Hall Date: Thu, 19 May 2022 15:29:23 +0100 Subject: MLBEDSW-6296: improvement_dram can become NaN - Problem is due to a divide by zero - Fix is simply to detect and assign zero. This could also affect improvement_sram Signed-off-by: Tim Hall Change-Id: I29a67710a17ef22656fb5ecfe9476953ffa5533d --- ethosu/vela/scheduler.py | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/ethosu/vela/scheduler.py b/ethosu/vela/scheduler.py index d65f1dc..0b79402 100644 --- a/ethosu/vela/scheduler.py +++ b/ethosu/vela/scheduler.py @@ -1073,8 +1073,12 @@ class Scheduler: new_tot_cycles = self.nng.cycles[npu_performance.PassCycles.Total] new_dram_cycles = self.nng.cycles[npu_performance.PassCycles.DramAccess] - improvement_tot = round((default_tot_cycles - new_tot_cycles) / default_tot_cycles, 2) - improvement_dram = round((default_dram_cycles - new_dram_cycles) / default_dram_cycles, 2) + improvement_tot = ( + round((default_tot_cycles - new_tot_cycles) / default_tot_cycles, 2) if default_tot_cycles != 0 else 0 + ) + improvement_dram = ( + round((default_dram_cycles - new_dram_cycles) / default_dram_cycles, 2) if default_dram_cycles != 0 else 0 + ) # Compare both total and dram improvement if not (improvement_tot >= 0 and improvement_dram > 0): -- cgit v1.2.1