From 5a39218a3bc150ec516913b45f341256057a6660 Mon Sep 17 00:00:00 2001 From: Tim Hall Date: Thu, 24 Feb 2022 13:35:29 +0000 Subject: MLBEDSW-5996: Clarify Sram_Only AXI port mapping - Updated the Memory Modes section in OPTIONS.md Signed-off-by: Tim Hall Change-Id: Ibfd3d2d6e1bf4a070d2af705878a5cc49381ce29 --- OPTIONS.md | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/OPTIONS.md b/OPTIONS.md index 6673ba5e..e24f9638 100644 --- a/OPTIONS.md +++ b/OPTIONS.md @@ -457,7 +457,11 @@ arena_cache_size=??? ---> Size of the arena/cache memory area. ??? = {int in The Vela configuration file defines three potential memory modes although other configurations are possible. Each memory mode is defined with respect to four attributes. If any of those attributes are not specified then an internal default value will be used. Note that this value may not be valid for the target embedded system. Therefore, the user -is recommended to explicitly specify all settings. +is recommended to explicitly specify all settings. +The three memory area attributes are each assigned to a virtual AXI port. This assignment is used by the compiler to +map a memory area to a specific memory type (as defined in the System Configuration section). It allows the System +Configuration sections to be reused with different Memory Mode sections. It does not control the mapping of the +physical AXI ports of the hardware, which are pre-determined in the compiler and driver. 1. `const_mem_area` this is the memory area in which the compiler will store all constant data such as weights, scales & biases, and constant value tensors. -- cgit v1.2.1