From 257a31e93cb2c7a8c06a102211ebb05b3ba78cd8 Mon Sep 17 00:00:00 2001 From: "patrik.gustavsson" Date: Thu, 19 Aug 2021 11:04:51 +0000 Subject: Revert "MLBEDSW-5028: SRAM target exceeded for legacy_sram_size test option" Relationship to other patches This reverts commit b6dd9c2e5fcf2885fb42dab567378c8aec22215c. Reason for revert: Change-Id: I50afb5ac4e33e5b8cd4f2aac1f5b94700ab8eeb1 --- ethosu/vela/architecture_features.py | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/ethosu/vela/architecture_features.py b/ethosu/vela/architecture_features.py index e79ed720..5e26f1a1 100644 --- a/ethosu/vela/architecture_features.py +++ b/ethosu/vela/architecture_features.py @@ -517,13 +517,14 @@ class ArchitectureFeatures: ) def mem_type_size(self, mem_type: MemType) -> int: - """Returns size in bytes available for the given memory type. This is a hard limit.""" - if mem_type == MemType.Scratch_fast and self.is_spilling_enabled(): - # when accessing the scratch fast memory type with memory spilling enabled the arena_cache_size refers to - # the cache memory area which is a hard limit + """Returns size in bytes available for the given memory type""" + if mem_type == MemType.Scratch_fast or (mem_type == MemType.Scratch and not self.is_spilling_enabled()): + # the arena cache memory area always contains the scratch fast memory type. it also contains the scratch + # memory type when memory spilling is not being used return self.arena_cache_size else: - # for all other memory types and modes the hard limit is the maximum possible address offset + # the compiler is not aware of the memory limits for these memory types and so all it can do is return the + # maximum address size return self.max_address_offset def _mem_port_mapping(self, mem_port): -- cgit v1.2.1