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PAD followed by max/average pool is run on NPU if NPU
padding can be used. Average pool is converted to depthwise.
Change-Id: Icc3652e6d9ecff5ac3dc7d92080313d90c245404
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Fixed pass through of LSTM operator.
Change-Id: I23140c69ab6cdc83f6bb8129256b4cc6a7c5ffac
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
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Fix read_offset at create_primary_op
The read_offset need to be copied when adding
avg pool as primary operator.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I6f168517a0e22543455b623b6b4f59237e8d530a
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Made HillClimb allocation results reproducible between runs.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I0535947e9cd9c6e0cf896e81b127d93cab54ebc8
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Made the same correction in OPTIONS.md
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
Change-Id: If79ee5c4c7464b40a72bbe6871b52a9eb0b308e1
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- Straight port of the C++ implementation to python.
- Renamed the allocator from "Search" to "HillClimb"
Change-Id: I50797d541f326d0264daf79bf7866aef32350a60
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Previously the debug database lost some operators in the debug database outputs when multiple custom operators were generated by Vela.
Also, the file offsets for command streams were always 0, even for a single custom operator. This patch should rectify these problems.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: Ieb072440d4f1806d4833a676683b4f42f431f3df
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When running specific networks containing LeakyReLU operators, Vela would crash when cloning an ofm of a LeakyReLU operator.
In this procedure a deepcopy usage would try to copy an OperatorInfo object, which caused an error.
This was fixed by replacing the deepcopy usage with a copy and then manually referencing new instances of sensitive variables.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: I46917858896fbdf52245dac6c6d9c18bc7ecdd0d
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Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
Change-Id: I7899263ff5bb3d0de00681ee8351a02eecff1553
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Fix avoid cascading for spilling.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: If86189bd1566eaa14387dfc2c02e3324ea6c184e
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Removed SplitSliceRead from subgraph during
graph optimisation.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I9315d4c2a6767828dd2b4e66823d73b10ebee99c
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-Removed ConcatSliceWrite from the optimised graph.
Always executed as avgpool, which is equivalent with
before the patch.
-Added copy op to enable more removal of reshapes.
Sg input/outputs need to remain. When Reshape input and
outut, are sg input/outputs a copy op is needed to
be inserted, in order to remove the reshape.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Id7be9966673ae34499e8518a5544104493fe326b
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Fix check for NHCWB16 for modifying FC input.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ie50c32ca079afadd0af9b7b909820794ceee373c
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Fixed two issues:
- Cmd stream can be out of order in Ifmstreaming
- In H32, LUT could be corrupted if blockdep is not 0
Change-Id: I2edd84429b93d83b2794f14937ce3fd279fd4a24
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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Updated tflite loader and mappings from tensorflow 2.3 to tensorflow 2.4
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I55884000ee139baf639bb0377008e0534f72fe94
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- Removed requirement for cloning shapes when unique values required
by forcing top-level immutability. This alleviates issues with Shapes
being unintentionally shared and then mutated as if value-types.
- Shape4D fields can no longer be assigned without replication.
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: Ic0dbfa349eb0215eabefb4f4e2cf99f12d83699c
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Removed fixup_act_reorder from graph optimisation.
As Reshape ops has been removed this optimization
should not be needed.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I2c375ee7787bf15f66c1e16514ed62727934d869
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Featuremaps were never moved to fast storage when tensor
is set to not use NHCWB16.
This patch enables the evaluation of feature maps to
be moved fast storage, also when tensor use NHWC.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I6367c975e7af8739c774cb7c34b43fb9a6776c8c
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- Squeeze is no longer listed as supported operator
- Added missing doc-string for a Pad constraint
Change-Id: Ifd5e493acb0eb28bc4f104df74b3491589db8c29
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Consider reshaping in pass packing, when desiding if
operators can be packed.
For the cases where there is a reshape between ops
they cannot be fused.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I8f2833b3fff156e9633ce0189d1d0df9109a6622
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Added supported operator check that 32-bit fused activation functions
are not supported.
Change-Id: I01fdafeff8fdb13c71eae4f63be7e6f81b9223df
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Change-Id: I06feeb98fb48badf06097f377a9504e6f4eeae91
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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Fixed the scaling for the Abs operator.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I9c198547de18f1268bfc2cb2f3d79cb30de4f43e
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- Added checks for unsupported pad sizes in PAD operator
- Bug fix right pad/bottom pad calculation when replacing PAD operator
by hardware padding
Change-Id: Ib84be711277d987052f14352ab386e0e0b774987
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Change-Id: If49abc31f093f1bd3393bee86f821fd35972086f
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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When FC input is fixed by changing ifm_shape,
avoid_NHCWB16 must be set to ifm.
-Fixed issue with ResizeBilinear
-Changed to post order for concat ops in graph optimisation
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ie0c6a86637c210c0833ae9b2f8e7c494c5d4f66e
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unfuse_activation_function moved into rewrite_concat_ops
Need to be handled before converting ConcatTFlite to
ConcatSliceWrite.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ieeaed4d28b38de3a8dcacaf708962b9d8161a161
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-Removed reshapes in the original graph
-Removed the addition of reshapes to the
optimized graph
-Reshapes with different ifm/ofm quantisation will remain
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I94862be53dac0d7434815e2aee5ca678228495f8
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Fixed assertion when reading back in an ethos-u custom op.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I275ec9187ffead1e96f2522ecbd658328fa4ef69
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- Removed unnecessary casts
- Added more error handling
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Change-Id: I30cc37a2fb1e855b9f67599c280c1f383f0b059e
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- Fixed bug with multiple 3rd party custom operators not inserting the
correct custom_code.
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I470a964867e60d4d71f01592dd33d4ad1aa2d441
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- Removed unnecessary casts
- Added more error handling
Change-Id: Ic822877544f67452339a20dca4addddc050d195c
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Bug fixes for 16-bit leaky relu with different quantizations for IFM/OFM:
- Overflow error occurred for alpha == 0
- The identity multiplication overwrote the result of the alpha
multiplication
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Change-Id: I18f8d121f6e7c598b721c472b476b9285eeff543
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Vector index could become negative in search allocator.
Change-Id: I3b77474a86fd5f4227d8b2a825d11ec8ec0fb073
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Placeholder type annotations have been replaced to their corresponding types.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: I017b87174ceefbfa40c53b2bd450d7404b9f4f30
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Fixed a bug where PAD having no consumers would result in a crash.
Now the constraint doesn't crash and thus the intended error message is shown, resulting in easier debugging.
Change-Id: I1e4403d47a6152e7adbf7bc065db86d4217d39cc
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
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Added RescaleAdd operation to avoid non-standard attribute
"rescale" for Add operation. Also changed ResizeBilinear
in the same way.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I1d286f63890585c06b8a161df1ff77e3f844a4b9
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- Also removed the original bit_per_element
Change-Id: I51bfbd28e14f316aae2d542bb610a3ed57b8b53b
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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- Added operator check that OFM scale > smallest float32 number
- Generalized the restriction that IFM/OFM scale must not be infinite
Change-Id: I918f5ea3d8fdec6e8f6bd6780ed13a19d1234ed6
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Fix for split/concat ops
- set correct ifm_shapes in pass packing
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I7373b1743e4511b6c1dfaa398b927fbb1b454f60
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Change-Id: I464528510d6646ac685a31c1b3355252f44d2692
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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Add missing check for npu_op
Op ifm ofm shapes only valid for npu_ops.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I73624c8e122fee510ab8320172b8b3a648a6f070
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- Fixed bug which stopped DRAM being selected for Ethos-U55
- Fixed type of default values used by burst length and latency
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: Ic1ae36586e3b4ffe8af8fea1fd23501d434b7731
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Added op.set_ifm_ofm_shapes to the convertion functions
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I727d4cf34395bc0997863df1ac89537f84f9c7c8
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Sets IFM's resampling mode for transpose convolutions.
Change-Id: I11744a932aea7c11fa70036c43a7ed01ea4b2929
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Added handling of input tensors with constant string data.
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Change-Id: Ieb5164a9d56d580ad08ea834bf2cbb7288cd9539
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Constraints and unit tests were added to check the new pad operator.
Change-Id: Id6d4cf2c4da486928c8f46ba1fa124eec66895a6
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
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Replaces the PAD operator by hardware padding when possible.
Change-Id: I9dce0885e51a4a73715824d7368637222e39b2b3
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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- Reshape/rearrange IFM and weight tensor for better HW utilization
- Update estimator to cover this case
Change-Id: I4be70a69fa600a1951bf1c247f9973e6cc9b03f4
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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Fix converting axis to 4D axis.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I83501494738f402b374efd8a369e5001f17b8152
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