Age | Commit message (Collapse) | Author |
|
Added the theoretically minimum max memory usage and
the allocator overhead to the Vela summary.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: If373dfeaac50d6f8b56554d435bf22af2c3acda3
|
|
This commit fixes a bug where the OFM zero point
would assume values outside of [0, 255] due to it's
usage as a stand-in for a bias when emulating the
TensorFlow Lite implementation of MEAN.
The solution is to adjust for the bias using an
ADD operator with the bias value as an int16 const
tensor. The 16-bit integer is needed as the bias
is 32 bits in the original implementation but can
effectively assume values in the range [-255, 255].
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
Change-Id: I84df48ea89bb559954f1b2c289b65e08a6418274
|
|
Added special handling of power-of-two input scales for
16-bit tanh/sigmoid to align with the reference.
Change-Id: I87831bcd587623d7db7100e768905355c2c98e9d
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Added checks during command stream generation to make sure
that address boundaries are respected.
Change-Id: I4dbc693b42d54e35c8fcc785e8be88059e409eec
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
If the command stream size exceeds a certain threshold,
a VelaError will now be raised.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: I9b9383f4c298a778b160cd527374e9244e4cae26
|
|
- The architecture supports address extensions wider than 32b via the cmd1.param
Change-Id: I7a01b4596f7a54f6be05b8e2c454494e6751757b
Signed-off-by: Mauricio Briceno <mauricio.briceno@arm.com>
|
|
This commit adds support for emulating the behavior
of the QuantizedMeanOrSum implementation of MEAN in
TensorFlow Lite.
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
Change-Id: Ifd24e0e678e2f85cd66ab82deeaaf010d5351b1e
|
|
- Added full support for PAD operator
- Hardware padding is still used whenever possible
- Bug fix Pad followed by max pool if IFM contains negative values
Change-Id: Ifc64d1943737d94466f5e2821009dab12a49a965
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
LeakyReLU IFMs will now have unique addresses
and the alpha tensor will have correct scaling.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: If94fa91a0b61175309ac450bf6b38a63362780ab
|
|
Change-Id: I05216cebe785a3669032a3f021a9b496c44c4d66
Signed-off-by: Henrik G Olsson <henrik.olsson@arm.com>
|
|
This commit adds support for the MEAN operator,
with some caveats.
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
Change-Id: I165cb26cb5aefd68e70d2cfc68291ccf7b778921
|
|
Previously the keep_dims or keep_num_dims attribute was not supported for Sum and Fully Connected operators and would thus crash for certain tests. With this update, the attribute is extracted correctly and saved to the optimised tflite file.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: If33487f6d299bb99788bb3d13332b842ba961641
|
|
All files which have been updated in 2021 and contain a copyright header have had their headers updated.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: Ia682111a719d16e690433398ccfb69c7e93c1cd1
|
|
PAD followed by max/average pool is run on NPU if NPU
padding can be used. Average pool is converted to depthwise.
Change-Id: Icc3652e6d9ecff5ac3dc7d92080313d90c245404
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Fixed pass through of LSTM operator.
Change-Id: I23140c69ab6cdc83f6bb8129256b4cc6a7c5ffac
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
|
|
Fix read_offset at create_primary_op
The read_offset need to be copied when adding
avg pool as primary operator.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I6f168517a0e22543455b623b6b4f59237e8d530a
|
|
Made HillClimb allocation results reproducible between runs.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I0535947e9cd9c6e0cf896e81b127d93cab54ebc8
|
|
Made the same correction in OPTIONS.md
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
Change-Id: If79ee5c4c7464b40a72bbe6871b52a9eb0b308e1
|
|
- Straight port of the C++ implementation to python.
- Renamed the allocator from "Search" to "HillClimb"
Change-Id: I50797d541f326d0264daf79bf7866aef32350a60
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Previously the debug database lost some operators in the debug database outputs when multiple custom operators were generated by Vela.
Also, the file offsets for command streams were always 0, even for a single custom operator. This patch should rectify these problems.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: Ieb072440d4f1806d4833a676683b4f42f431f3df
|
|
When running specific networks containing LeakyReLU operators, Vela would crash when cloning an ofm of a LeakyReLU operator.
In this procedure a deepcopy usage would try to copy an OperatorInfo object, which caused an error.
This was fixed by replacing the deepcopy usage with a copy and then manually referencing new instances of sensitive variables.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: I46917858896fbdf52245dac6c6d9c18bc7ecdd0d
|
|
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
Change-Id: I7899263ff5bb3d0de00681ee8351a02eecff1553
|
|
Fix avoid cascading for spilling.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: If86189bd1566eaa14387dfc2c02e3324ea6c184e
|
|
Removed SplitSliceRead from subgraph during
graph optimisation.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I9315d4c2a6767828dd2b4e66823d73b10ebee99c
|
|
-Removed ConcatSliceWrite from the optimised graph.
Always executed as avgpool, which is equivalent with
before the patch.
-Added copy op to enable more removal of reshapes.
Sg input/outputs need to remain. When Reshape input and
outut, are sg input/outputs a copy op is needed to
be inserted, in order to remove the reshape.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Id7be9966673ae34499e8518a5544104493fe326b
|
|
Fix check for NHCWB16 for modifying FC input.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ie50c32ca079afadd0af9b7b909820794ceee373c
|
|
Fixed two issues:
- Cmd stream can be out of order in Ifmstreaming
- In H32, LUT could be corrupted if blockdep is not 0
Change-Id: I2edd84429b93d83b2794f14937ce3fd279fd4a24
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
|
|
Updated tflite loader and mappings from tensorflow 2.3 to tensorflow 2.4
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I55884000ee139baf639bb0377008e0534f72fe94
|
|
- Removed requirement for cloning shapes when unique values required
by forcing top-level immutability. This alleviates issues with Shapes
being unintentionally shared and then mutated as if value-types.
- Shape4D fields can no longer be assigned without replication.
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: Ic0dbfa349eb0215eabefb4f4e2cf99f12d83699c
|
|
Removed fixup_act_reorder from graph optimisation.
As Reshape ops has been removed this optimization
should not be needed.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I2c375ee7787bf15f66c1e16514ed62727934d869
|
|
Featuremaps were never moved to fast storage when tensor
is set to not use NHCWB16.
This patch enables the evaluation of feature maps to
be moved fast storage, also when tensor use NHWC.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I6367c975e7af8739c774cb7c34b43fb9a6776c8c
|
|
- Squeeze is no longer listed as supported operator
- Added missing doc-string for a Pad constraint
Change-Id: Ifd5e493acb0eb28bc4f104df74b3491589db8c29
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Consider reshaping in pass packing, when desiding if
operators can be packed.
For the cases where there is a reshape between ops
they cannot be fused.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I8f2833b3fff156e9633ce0189d1d0df9109a6622
|
|
Added supported operator check that 32-bit fused activation functions
are not supported.
Change-Id: I01fdafeff8fdb13c71eae4f63be7e6f81b9223df
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Change-Id: I06feeb98fb48badf06097f377a9504e6f4eeae91
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
|
|
Fixed the scaling for the Abs operator.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I9c198547de18f1268bfc2cb2f3d79cb30de4f43e
|
|
- Added checks for unsupported pad sizes in PAD operator
- Bug fix right pad/bottom pad calculation when replacing PAD operator
by hardware padding
Change-Id: Ib84be711277d987052f14352ab386e0e0b774987
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Change-Id: If49abc31f093f1bd3393bee86f821fd35972086f
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
|
|
When FC input is fixed by changing ifm_shape,
avoid_NHCWB16 must be set to ifm.
-Fixed issue with ResizeBilinear
-Changed to post order for concat ops in graph optimisation
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ie0c6a86637c210c0833ae9b2f8e7c494c5d4f66e
|
|
unfuse_activation_function moved into rewrite_concat_ops
Need to be handled before converting ConcatTFlite to
ConcatSliceWrite.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ieeaed4d28b38de3a8dcacaf708962b9d8161a161
|
|
-Removed reshapes in the original graph
-Removed the addition of reshapes to the
optimized graph
-Reshapes with different ifm/ofm quantisation will remain
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I94862be53dac0d7434815e2aee5ca678228495f8
|
|
Fixed assertion when reading back in an ethos-u custom op.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I275ec9187ffead1e96f2522ecbd658328fa4ef69
|
|
- Removed unnecessary casts
- Added more error handling
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Change-Id: I30cc37a2fb1e855b9f67599c280c1f383f0b059e
|
|
- Fixed bug with multiple 3rd party custom operators not inserting the
correct custom_code.
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I470a964867e60d4d71f01592dd33d4ad1aa2d441
|
|
- Removed unnecessary casts
- Added more error handling
Change-Id: Ic822877544f67452339a20dca4addddc050d195c
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Bug fixes for 16-bit leaky relu with different quantizations for IFM/OFM:
- Overflow error occurred for alpha == 0
- The identity multiplication overwrote the result of the alpha
multiplication
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Change-Id: I18f8d121f6e7c598b721c472b476b9285eeff543
|
|
Vector index could become negative in search allocator.
Change-Id: I3b77474a86fd5f4227d8b2a825d11ec8ec0fb073
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
|
|
Placeholder type annotations have been replaced to their corresponding types.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: I017b87174ceefbfa40c53b2bd450d7404b9f4f30
|
|
Fixed a bug where PAD having no consumers would result in a crash.
Now the constraint doesn't crash and thus the intended error message is shown, resulting in easier debugging.
Change-Id: I1e4403d47a6152e7adbf7bc065db86d4217d39cc
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
|
|
Added RescaleAdd operation to avoid non-standard attribute
"rescale" for Add operation. Also changed ResizeBilinear
in the same way.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I1d286f63890585c06b8a161df1ff77e3f844a4b9
|