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Changes in strides and rounding for int16 and NHCWB16
Change-Id: I195890215b55ee7a4eab2e6ce4da95fb41587acb
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
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-Added support for new_axis_mask
-Added support for more than 1 bit set in new/shrink_axis mask
-Added checks for strided slice in supported operator check
-Added assert if nothing has been put on NPU
Change-Id: I66e2d04784f14d7ad82371f5d649a455d576a818
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
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This patch adds support for strides of size 3.
It removes some obsolete code for a corner case that
no longer exists.
It also changes the setting of the bitfield in
NPU_SET_KERNEL_STRIDE so that it matches the specification.
Change-Id: I7dabcf72b7826ca0b3c98e9d23209027204079a8
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
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- Added missing prelu op to tflite mapping
Change-Id: I1cb846fc044f0a5a78651569383a552d1cccbb52
Signed-off-by: Tim Hall <tim.hall@arm.com>
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- Dict was returning a str rather than the tuple (str, options)
Change-Id: Ia4359653d05897b2fd123a21c818dc51d831ed79
Signed-off-by: Tim Hall <tim.hall@arm.com>
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- Fix weight encoder palette allocation
Change-Id: If79655f65cfb4820bf0f8ba6472b3df940b1e44b
Signed-off-by: Tim Hall <tim.hall@arm.com>
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Updated scaling for advanced add/sub.
Change-Id: I89eaff0cf5c33dcc94e8a3eeed4187771e0d8d63
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
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In order to support constant IFM and IFM2, i.e. predefined inputs placed
in Flash, the REGION commands had to be updated to be emitted for every
op. They are emitted based on the 'mem_area' field of the Tensor.
Change-Id: I434e8efc915af4119fa2ce37a05240a151593141
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
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Added support for using NHCWB16 between cascaded passes.
(For Reshape format is kept to NHWC)
Change-Id: I0ef1631984fec89fe09999b64ae69563e2aefc9b
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
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Add support for end_mask != begin_mask
Change-Id: I6775696de4e2365e0a7cdcbcdbc64a7bd4858fb5
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
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Change-Id: I8f109cd148aaa17c18a97068fad52419c8d9d12e
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
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Enabled int16 support quantization to match the reference.
Change-Id: Ib369640241a9a491f2b0bc52d7f6cb025e30344b
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
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Change-Id: I897bea10ae744162fd285838ee2b2c018695a278
(cherry picked from commit d5ac9b55faa899ac686433e79900cadd321b71bf)
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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Change-Id: Ic67319b05616c8f51e03f4e9d9a2bb59a6aa3218
(cherry picked from commit 18bf223614cabce934e9548a00e85da7fac81c01)
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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- Added modules ethosu.vela and ethosu.mlw_codec.
- Added README and various configuration files.
Change-Id: I3690f8c8f5966306ecddaeb2793c30ca9c6e2eee
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