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path: root/ethosu/vela/weight_compressor.py
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2020-12-14MLBEDSW-2066 Improve Exception messagesMichael McGeagh
Minor refactoring to use fstrings. Improve Error classes to correctly inherit the base class. Use existing exception classes instead of plain exceptions where it makes sense. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I0941c04e91010da1db77299517a8e2d896371e77
2020-12-08MLBEDSW-2836 Change sets to tuplesMichael McGeagh
Replace conditional checks against sets with tuples. If not requiring uniqueness, or complex set operations, it is quicker to use tuples instead. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ie8732c8d46067244963936c53f0ec81adda50372
2020-11-23MLBEDSW-3424: Expose API through separate fileLouis Verhaard
All external APIs are now exposed by api.py. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I33f480e424692ac30e9c7d791f583199f31164a7
2020-11-20vela: Rename Yoda to Ethos-U65Tim Hall
- Also changed to use Ethos-U where appropriate Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ie45ba2bb3935b305abe897b78b498681296cb7c1
2020-11-13MLBEDSW-839: Code generation using external API2.0.0.rc1Louis Verhaard
Added external API to generate register command streams. Existing code generation has been refactored to make use of this API. Change-Id: Ibb4c2b167809869f16470b14da24f08a65c82b7b Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-11MLBEDSW-3222: Bias tensors in fast storageAndreas Nevalainen
For IFM streamed cascades bias tensors are read several times. Moves these tensors to fast storage and add DMA commands. Change-Id: I630f6275986c1b5e3f126c925b11e22500fb1128 Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-10-08MLBEDSW-3148: Refactor OperationLouis Verhaard
- op.type is now an enum instead of a string - Removed unused operator codes - Refactored some attributes like npu_block_type, fused_activation_function - Refactored operator index calculation - Refactored a number of operator sets Change-Id: I641f65ee375794b7aec42abc0664251ae37d78e8 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-10-02MLBEDSW-3060 Adjust check if weights fit in sramPatrik Gustavsson
When deciding if weights fit sram: A compression of the weights has been added when a weight compression test limit makes it impossible to fit weights in a double buffer in sram. The worst compression ratio from compression, is used to decide if weights can be fit in sram. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I9458769866b3f9fc15659185aae09658ed10fb38
2020-09-23MLBEDSW-3070: Fix addressing of weightsLouis Verhaard
Assign different equivalence ids to weights with same values but different compression, to ensure correct addressing. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I13aabad71520e4f4a78fb2d6a81740bdd4d1256c
2020-09-08MLBEDSW-2935: LUT fusing with preceding operatorLouis Verhaard
Allows fusing of LUT with a preceding operator regardless of input/output scale. Change-Id: Ia378adbb3fe61d71299feb085f7313377e0efa39 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-08-31MLBEDSW-2804: Removed invalid assert for shift rangeJacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I857aeb7aeb34f4b8ea47e6ac954cead268335e32
2020-08-18MLBEDSW-2589: Skip weight compression for CPU opsDwight Lidman
This commit fixes a bug where CPU ops were getting passed on as NPU ops in weight_compressor.py due to Operation.find_npu_op() incorrectly returning any op with an 'npu_block_type' attribute (which every op has) as an NPU op. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I7a758f8d1b1237907816bc1be7b77aff765ae688
2020-08-12[MLBEDSW-2749] removed the decorator for typecheckManupa Karunaratne
*the decorator is causing the verification tests to fail when using TF 2.1, but not with TF 2.2, hence removing it for now. Change-Id: I07357c0fef383d9a65278fe99ad8e4d3f7dc6d9b Signed-off-by: Manupa Karunaratne <manupa.karunaratne@arm.com>
2020-08-12MLBEDSW-2684: Fix weight compression scale calculations for FCJacob Bohlin
Fixed an issue with Fully Connected weights' shape used for compression scale calculations causing incorrect performance estimates. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Id3a5c187ad3e942b8e3d4c690b3dbba3c6fda922
2020-08-06[EXTAPI] exposing encode of biases to be consumed by an external APIManupa Karunaratne
*Renamed pack_bias_and_scale to encode_bias to be consumed externally *added unit test for the API Change-Id: I71829f3fcb390c475795848f0be3d132d3e158ee Signed-off-by: Manupa Karunaratne <manupa.karunaratne@arm.com>
2020-07-27[EXTAPI] refactor weight compression to be used by an external consumerManupa Karunaratne
*lint *added unit tests *added typecheck *added docstring for the api Change-Id: Ibd4bc40d4381ac40ad2ea3d500b26c4ec565ab07 Signed-off-by: Manupa Karunaratne <manupa.karunaratne@arm.com>
2020-07-10MLBEDSW-2634 Avoid encoding empty weights streamPatrik Gustavsson
Avoid encoding empty weights stream. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I120ede14f19705e169c5f03ed344036a58b5f84f
2020-07-08MLBEDSW-2625 Alignment of tensor for bias and scalePatrik Gustavsson
Fix for alignment of tensor for bias and scale Change-Id: I303a225a536f169909cec9ba4d5cee088110bb94 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-07-07MLBEDSW-2615: MLCE: Ethos-U55 Flash usage increases due to Yoda BetaTim Hall
- Fixed bug with the size of the scale and bias tensor Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I4d267d4c918a5c834ebdff82de4f021717e95203
2020-07-07MLBEDSW-2548: Fix for Double Buffer size estimateJacob Bohlin
This will give a worst case estimate of the Double Buffer size in the Scheduler and it will no longer be able to choose strategies that end up with a buffer that doesn't fit in SRAM. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I763731f63c7672679f3b8cd6db65dad03b946ae5
2020-06-25MLBEDSW-2556: Odd core/block depth weight interleaving updateTim Hall
- If blockdepth or core count resulted in empty or non-existent substreams, the command generator generated an error. This commit changes the command stream generator to only program cores that have streams and are enabled for the configuration. Change-Id: I4e724b19de14d3a12e886ec6b17d0038593dfb59 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-25vela: MLBEDSW-828 weight/scale stream interleavingTim Hall
- Multicore weight and scale stream interleaving for multicore hardware architecture. Change-Id: Ic82850463391c629d90d08c26cf0c48dd438286d Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18MLBEDSW-2528: MLCE-219: Custom operator pass throughTim Hall
- Fixed custom operator pass through - Added error printing functions for operators and tensor - Minor cleanup of custom exception handling Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Idf295df1e4c544381dc480244d880c32fb285e38
2020-06-18Code clean-up using black and flake8Tim Hall
- No functional change Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I5ab1198b9d092cd041fa9b85b2dee9900d299bfc
2020-06-18MLBEDSW-1716: Transpose Convolution supportJacob Bohlin
Change-Id: Ie6d8d6de9f3447f19ba06aafa9fa480fc96a973b Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
2020-06-18MLBEDSW-2420: Improved support for dilated convolutionLouis Verhaard
- Dilation added to SET_KERNEL_STRIDE instruction - Kernel height/width adjusted for dilation - Updated padding calculation - Updated weight compression Change-Id: I0c8190223e223b039a305aba0f37896ae1de2b80 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-1941: Bug fix shared weightsLouis Verhaard
If same weight tensor was used with different block configs, errors would occur. Fixed by always cloning weight tensors, using a global weight compression cache and modifying the linear allocator to detect multiple usage of same weight compression. Change-Id: I91ca59176e1c59c66e0ac7a4227f2b5f0b47053f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-2067: added custom exceptionsLouis Verhaard
Added custom exceptions to handle different types of input errors. Also performed minor formatting changes using flake8/black. Change-Id: Ie5b05361507d5e569aff045757aec0a4a755ae98 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18Add reorder-python-import pre-commit hookDiego Russo
Also updated README.md Change-Id: I118309c61f4d00e8508d6b888c606995490fba39 Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add pre-commit support for sanity checksDiego Russo
Use pre-commit framework [1] to run black and flake8 before the commit. black and flake8 are managed by the pre-commit framework and they can be run manually by the user using `pre-commit run` command. Fix the code base with the help of black and flake8. Fix import statements according to PEP8 guidelines [1] Both tools have the following settings (specified in the pre-commit configuration file): * line length: 120 characters * directory to exclude: ethosu/vela/tflite/ and ethosu/vela/ethos_u55_regs Updated README.md on how to install pre-commit and how to run sanity checks. Pipenv files have been updated including new dependencies for pre-commit. [1]: https://www.python.org/dev/peps/pep-0008/#imports [2]: https://github.com/pre-commit/pre-commit Change-Id: I304d9fffdf019d390ffa396a529c8a7c2437f63d Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18MLBEDSW-819: make int16 changesFredrik Svedberg
Enabled int16 support quantization to match the reference. Change-Id: Ib369640241a9a491f2b0bc52d7f6cb025e30344b Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2020-04-29Add Vela codebase0.1.0Tim Hall
- Added modules ethosu.vela and ethosu.mlw_codec. - Added README and various configuration files. Change-Id: I3690f8c8f5966306ecddaeb2793c30ca9c6e2eee
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