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Change-Id: I3c13118e14195a5fb8e522a38b205b75fb07b74b
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
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- Added semantic checks for Transpose
- Added unit tests for semantic checks
- Updated SUPPORTED_OPS.md
Change-Id: I3fcf13120f4b6811f8de27711996cdb9c19c9847
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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- Added graph optimiser function to convert TRANSPOSE op
into an AvgPool op with swapped stride for height and width
- Added TRANSPOSE supported op check
- Added unit tests for TRANSPOSE supported op check
- Updated SUPPORTED_OPS.md
- Fixed problem in pass packing when optimizing the pass list.
Old problem, but now seen when moving TRANSPOSE from cpu.
Change-Id: I0a0ef420b0fb8241090c2e2434622881105cde15
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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- Added SQUARED_DIFFERENCE support
- Updated SUPPORTED_OPS.md
Change-Id: Id83d9d92129e645390c7979759dfdeff7a14c2ee
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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- now only converts array directly if ndim==0
Signed-off-by: William Isaksson <william.isaksson@arm.com>
Change-Id: Id23e419bc7dd717f9694013180d4609819fd2f56
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PAD input tensor shape plus paddings must equal output tensor shape.
Change-Id: Icc5dea9bf6a8f6e1c8402f4d9af4d9796e8ef1aa
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
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- Added graph optimiser function to convert convolution groups into
a split followed by separate convolutions and then a concat
- Added semantic check for convolution groups
- Added unit tests for convolution groups semantic checks
- Fixed a minor typing issue with test_constraint_stride_range
Change-Id: I78ade408aa23469a79c9f517c4751da8619b77a9
Signed-off-by: Tim Hall <tim.hall@arm.com>
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If any of H,W axes have shape 1, the IFM can be reshaped to support
reduction over the depth axis.
Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com>
Change-Id: I432ff1c399b7cee4ca5f0a8f4461e9c0a936d804
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- Add support for batch and depth channels when shape is 1
- Refactor reshaping in convert_mean_to_depthwise_conv
Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com>
Change-Id: If663395934ab58c76ba92b6ebaaf484a389ae699
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- The problem is that the axis value can be either a scalar or an
array containing a single element
- The solution is to check the length of the shape because the size
attribute returns the same value for both cases
- This did not show up before because pytest warnings were not being
treated as errors
- Removed pre-commit pytest option that caused tests to be searched for
from the root directory
- Updated pyproject.toml pytest options to explicitly specify the test
directories, and to treat warnings as errors
Change-Id: I037054768e5c34f253b6062eadba1c3419ff65e4
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- Added int8 and int16 Exp support, implemented as LUT.
- Added generic 8bit and 16bit LUT table functions following
the implementation in the latest reference. If new ops are added
by the reference, they can easily be implemented in Vela using
the generic functions.
- Moved convert_to_lut to lut.py to have all LUT related code in
one file.
- Updated SUPPORTED_OPS.md
Change-Id: I388e76ea4b39162313599a5341cfb9bad71a782c
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: Iaeb8f2cea0d3b576a6b138e64a882c701ac88ccb
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- Added checking and reporting of missing operator attributes when
reading and writing TFLite file
- Added a TFLite semantic check to ensure that all required attribute
fields of builtin operators are read
- Added some sanity checks for RESHAPE operators that run on the
Ethos-U
- Stopped CPU operators from having their attributes modified
Change-Id: I05700681acdb09554f5945819717c08a9457295c
Signed-off-by: Tim Hall <tim.hall@arm.com>
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Added int8 and int16 UNIDIRECTIONAL_SEQUENCE_LSTM support.
The implementation does not include support for:
* CIFG
* Peephole
* Projection
* Normalisation
This change also:
* Removed unused Op.BlockLSTM operation type.
* Removed the only one consumer limitation on putting the SplitSliceRead
on the tensor consumer(s), if all consumers fullfills the requirements
* Added Op.VariableTensorWrite as a Operation.memory_function to make
sure writes to variable tensors:
* Always use linear mode
* Are not moved to fast scratch
* Are not fused with other elementwise operation tensor ranges
Change-Id: Ief831738924ac3d1f2ba6d41f10bd6dc969911f3
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
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- Added 64-bit support for ArgMax
- Updated constraints for ArgMax and regenerated SUPPORTED_OPS.md
Change-Id: I4ef7d2e6fccab0088b87757f6afe40a006c77bbd
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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- Add support for ArgMax along depth dimension with a depth limit of 127.
- Only supports 8-bit input and 32-bit output
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I5f6f0503135bebabbb1ca637f9729587b7c60740
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Adding constraint for faulty reshape operators. Number of elements
for IFM and OFM must be the same.
Change-Id: I2e31e9d1e39b5aa3a0c595032a66e14374a0719e
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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shrinking an axis
- The problem was that the end values of STRIDED_SLICE operators
were not taking the shrink_axis_mask into account
- The fix is simply to ignore the end value set on the operator
and calculate one based upon shrinking the axis
Change-Id: I2e5f2d3c9b08035dfd9b1629c775408f2356d1cf
Signed-off-by: Tim Hall <tim.hall@arm.com>
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- An assert in Vela is triggered when the number of splits does
not evenly divide the input.shape[axis] value and the split offsets
are calculated wrongly.
- The fix is to add the same constraints as in the reference kernel
and only run the Split op on the NPU when the criterias are fulfilled.
- Modified test to reflect the new constraints
- Updated SUPPORTED_OPS.md
Change-Id: I4103ff4a3fdf9a813f5fcb7f51081b859e611100
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
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- Update copyright notices to use SPDX format and add OSS mail as contact.
- Update years on files where it had been missed.
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I7e9715ea4e17b76252728c708e46df12ad67ab1f
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- Added graph optimisation pass to support dilations greater than 2
in either dimension
- Removed supported operators restrictions
- Removed erroneous dilation on TRANSPOSE_CONV
- Updated unit tests and documentation
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: Ide302374b0d5eff25c20501383a63f6aa7625c52
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Removed duplicate code and moved constraint to
the correct file.
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
Change-Id: I2da3c5b88e1af351751c481217b8183b5948f0f8
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Added support for int16 LeakyRelu for negative alpha and alpha
greater than one.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I7f522ebfe014786d0a1d96172e75c7d9bdd76921
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Added SHAPE operator to the supported operators report.
Updated the constraints for QUANTIZE and SHAPE operator.
Also fixed RESHAPE consuming statically optimised shape.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I1d964d602d3f361a0f16dae8133197280dd84c48
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*Quantise op becomes constant if input is known at compile time
*Quantised values calculated if input of op is const and float
*Const inputs to quant op that are int are requantized
Change-Id: Ic94a72a392af709fe6a640d7dacbb5dc2334f16f
Signed-off-by: Ayaan Masood <Ayaan.Masood@arm.com>
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*Shape OP value is available at compile time hence
it can be optimised
*Disconnected shape OP at compile time from parent
tensor
*Transformed shape OP tensor into constant
Change-Id: I0a024269e2b592c6146dd72e62d7a41951fb727a
Signed-off-by: Ayaan Masood <Ayaan.Masood@arm.com>
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Removing constraint for negative alpha value in ReLu
for int8 and uint8.
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
Change-Id: Id7a3a30bf5d1f0a591f990bd04cd0dbbad5819c6
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*Added generic function which checks if underlying shape of
FullyConnected operation is 2D and performs shape reduction
*Fully connected operation >2 dimensions now run on NPU if the above
case is satisfied
*constraint_fc_output_2d and rewrite_fully_connected_input refactored
*Added unit test to confirm this functionality
Signed-off-by: Ayaan Masood <Ayaan.Masood@arm.com>
Change-Id: I0e29c767e5b84841eb53bbc44464b36a454f7b38
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Update version of Black to 22.3.0 due to updated dependencies.
Updates to fix reported issues due to new version.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: I60056aae452093ce8dcea1f499ecced22b25eef1
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Fixed a crash caused by loading a network containing
operators with empty constant tensors.
This could occur when a branched network is split
before said branches have converged.
We now put the affected operator on the CPU.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: I63e9cd13cecf86d976c5750c727e218c334c32b5
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- The failing tests contain operations with dynamic tensors which
are not supported and therefore they should be placed on the CPU.
However, a bug in the removal of RESHAPEs which contain a dynamic
shape prevented this happening.
- This change adds a check to make sure that RESHAPE ops with a
dynamic shape tensor are not removed and instead are placed on the
CPU.
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I2d7481f7f80f99a0f01df100d956933777e6875a
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This commit fixes a number of bugs where per-axis
quantization would make Vela crash and would not
be properly recognized.
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
Change-Id: I50a461d200274b43ec76f3a7357bf66db6d49964
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Memory only operators such as Reshape, Squeeze and ExpandDims are
removed in the graph optimiser step.
- Added semantic check that memory only operators have same
quantisation parameters on ifm/ofm.
- Added support for the ExpandDims operator.
- Addition and cleanup of related unit tests.
- Removed TOSA from the generated SUPPORTED_OPS.md documentation.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: If848d8afc58c18806e10997ed94e4dae83f30879
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Refactor supported operators by breaking out model semantics
into its own class. Model semantics checked right after model
read.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: If442b189efcd91dda01af60b2b3adedfacdf2fad
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