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2022-04-21MLBEDSW-5384 FC layers run on NPU if underlying shape is 2DAyaan Masood
*Added generic function which checks if underlying shape of FullyConnected operation is 2D and performs shape reduction *Fully connected operation >2 dimensions now run on NPU if the above case is satisfied *constraint_fc_output_2d and rewrite_fully_connected_input refactored *Added unit test to confirm this functionality Signed-off-by: Ayaan Masood <Ayaan.Masood@arm.com> Change-Id: I0e29c767e5b84841eb53bbc44464b36a454f7b38
2022-03-30Update version of Black to 22.3.0Jonas Ohlsson
Update version of Black to 22.3.0 due to updated dependencies. Updates to fix reported issues due to new version. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: I60056aae452093ce8dcea1f499ecced22b25eef1
2021-11-12MLBEDSW-5383 npu_find_block_configs() differs between v2.1.1 and v3.1.03.2.0.rc1James Ward
* 1D optimised block_config was incorrectly beign set to the ArchitectureBlockConfig in try_block_config() * Write external API test for the reduced block height case (on H256) Signed-off-by: James Ward <james.ward@arm.com> Change-Id: I9ced7eb31b23730e4423aabbaf769bc72fac8fc9
2021-10-29MLBEDSW-4925: Fix resize bilinear attribute checkerik.andersson@arm.com
Previously we did not check if half_pixel_centers was set. Since we do not support it, these cases should not run on the NPU. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: I9d2675f760424d5cfb67e5d581dd1861ad165b85
2021-10-14MLBEDSW-5162 MLCE: Vela [3.1.0] falling to run with yolov4_int8.tfliteJames Ward
* fix indices for tflite mapping of EXP operator * fix indices for tflite mapping of Transpose operator * ensure read offset after slice is aligned to 16 bytes for NHCWB16 or force linear format * add unit test to ensure mapping of indices is consistent across TFLite, TOSA and NNG Signed-off-by: James Ward <james.ward@arm.com> Change-Id: I17b6e44bc06853325d5eea62a558418ee1ebefe8
2021-09-15MLBEDSW-5102 Update removal of memory only operatorsJonas Ohlsson
Memory only operators such as Reshape, Squeeze and ExpandDims are removed in the graph optimiser step. - Added semantic check that memory only operators have same quantisation parameters on ifm/ofm. - Added support for the ExpandDims operator. - Addition and cleanup of related unit tests. - Removed TOSA from the generated SUPPORTED_OPS.md documentation. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: If848d8afc58c18806e10997ed94e4dae83f30879
2021-08-25Handle sg input and output for Squeeze operator3.1.0.rc2Jonas Ohlsson
Update to handle the case when the Squeeze Op ifm/ofm are the subgraph ifm/ofm, to facilitate the removal of the Squeeze Op. Adding NOP to maintain the original tensors. Updated pytests for squeeze operator. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: I623cae05e696fb16ccf29dedc42fd822601e9fd9
2021-08-11vela: Fix Ethos-U65 maximum address rangeTim Hall
- Changed Ethos-65 AXI port address width from 48 to 40-bits - Fixed the use of arena_cache_size in mem_type_size() to cover the arena as well as the cache memory area Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I826462a0cbd0c061cccbc7c83dde446778a2b1ca
2021-07-27MLBEDSW-4853: Refactor supported operatorsJonas Ohlsson
Refactor supported operators by breaking out model semantics into its own class. Model semantics checked right after model read. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: If442b189efcd91dda01af60b2b3adedfacdf2fad
2021-07-26MLBEDSW-4892: Fix crash affecting biases without quantization.James Peet
Remove quant_values attribute from Tensor class. It only needs a single values attribute, holding either quantized or unquantized values as appropriate. Change-Id: Ie96f80ac58061b6077e0f7048dc60209fdfbcafa Signed-off-by: James Peet <james.peet@arm.com>
2021-07-09MLBEDSW-4840 Move setting of input indices to tflite readerPatrik Gustavsson
Mapping to internal input indexing has been added to tflite_reader.py and tosa_reader.py. And the other way around in tflite_writer.py. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I4d8596e747cfa7c4203884c4e785eb1977e2bcc1
2021-07-08MLBEDSW-4838 Added basic TOSA support.Patrik Gustavsson
Added basic TOSA support, enabling Vela to read and compile a .tosa file corresponding to CONV2D + Rescale + Clamp, and writing it to an optimized .tflite file. The optimized .tflite file, will in this case, hold a commandstream where the Rescale and Clamp has been fused into the CONV2D. The optimized tflite file is not output from Vela. -Added support to read .tosa file into Vela internal structure. - Added tosa_reader.py, tosa_mapper.py and helper files stored under tosa/ - Support for this limited to ~10 ops -Added reader_util.py for functions common for TOSA and TFLite -Added tosa_graph_optimiser.py -Added support to fuse Rescale into convolution -Modified handling for padding -Added support to fuse Clamp to previous op -Added graph_optimiser_util.py -Moved functions common for TOSA/TFLite graph optimization to this file. -Renamed graph_optimiser.py to tflite_graph_optmiser.py -Added separate tosa_supported_operators.py -Added supported_operator_util.py -For functions in common for TOSA/TFLite Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ic3c540504ec8c5eb4771397fdc6882050ecf33ab
2021-06-17Block config optimisation for 256/512 configurationsTim Hall
- 256 and 512 configuration variants execute 1D convolutions in an optimised manner compared to their 2x2 microblock dimensions. This commit takes this into account to improve Conv1D throughput on these configurations. Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I6ecdf6e4a219e356327b22f8393f50ee8817af23
2021-05-27MLBEDSW-4034: New Scheduler Size or Performance OptimisationTim Hall
- Merged dev/scheduler at 83639f90e8c828f70de6e29142355a940224959b Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I0050529d4b42da93768c7264296434dd877fb5b4
2021-04-29MLBEDSW-4501: Support MEAN single axis variationDwight Lidman
When a MEAN operator with a single reduction axis specifies the axis index attribute as an array with a single element rather than a scalar index, the operator is placed on the CPU even though it is technically supported. This commit fixes this issue and also adds some new tests for the axis constraints. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Ia287f3b9cc80a805e972cd4b2962e52526a8dc16
2021-04-08MLBEDSW-4334 Non-linear format decision in graph opt.Patrik Gustavsson
Check if non linear tensor format can be used is refactored. -Flag avoid_NHCWB16 replaced with needs_linear_format -Checking restrictions located to one function in graph optimiser. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Iec5c7996a1a6039cad052197f1ae56f7c0290440
2021-04-07MEAN implementation changed to Average PoolDwight Lidman
This is a small commit which changes one of the four MEAN implementations to a simpler one, using an AvgPool instead of a DepthwiseConv. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I9e8af071e8b820796577ee4792b4812a1212602b
2021-03-31MLBEDSW-3502: Bug fix addresses >= 32 bitLouis Verhaard
Bug fix in generation of register command offsets that do not fit in 32 bit. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Iabb99cf6536c0f77b934691f8744df61f1eab3ed
2021-03-30Performance improvement in tensor allocationLouis Verhaard
- Tensor allocation verification was O(N^2), is now closer to O(N) - Removed a sort in HillClimb allocator Change-Id: I286a269881490c485cc2b0eeab3b1ecffa8f3df0 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-03-22MLBEDSW-3502: Add address checksLouis Verhaard
Added checks during command stream generation to make sure that address boundaries are respected. Change-Id: I4dbc693b42d54e35c8fcc785e8be88059e409eec Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-03-16MLBEDSW-4215: Add support for MEAN to match QuantizedMeanOrSum implementationDwight Lidman
This commit adds support for emulating the behavior of the QuantizedMeanOrSum implementation of MEAN in TensorFlow Lite. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Ifd24e0e678e2f85cd66ab82deeaaf010d5351b1e
2021-03-16MLBEDSW-4223: Full support for PAD operatorLouis Verhaard
- Added full support for PAD operator - Hardware padding is still used whenever possible - Bug fix Pad followed by max pool if IFM contains negative values Change-Id: Ifc64d1943737d94466f5e2821009dab12a49a965 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-25MLBEDSW-1499: Add MEAN operatorDwight Lidman
This commit adds support for the MEAN operator, with some caveats. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I165cb26cb5aefd68e70d2cfc68291ccf7b778921
2021-02-25MLBEDSW-3571: Sum and FC should not crash when asking for keep_dims.erik.andersson@arm.com
Previously the keep_dims or keep_num_dims attribute was not supported for Sum and Fully Connected operators and would thus crash for certain tests. With this update, the attribute is extracted correctly and saved to the optimised tflite file. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: If33487f6d299bb99788bb3d13332b842ba961641
2021-02-25MLBEDSW-4064: Update copyright headerserik.andersson@arm.com
All files which have been updated in 2021 and contain a copyright header have had their headers updated. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: Ia682111a719d16e690433398ccfb69c7e93c1cd1
2021-02-17MLBEDSW-4022: support PAD followed by pool operatorLouis Verhaard
PAD followed by max/average pool is run on NPU if NPU padding can be used. Average pool is converted to depthwise. Change-Id: Icc3652e6d9ecff5ac3dc7d92080313d90c245404 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-12MLBEDSW-3808: Ported search allocator to python2.1.0.rc1Louis Verhaard
- Straight port of the C++ implementation to python. - Renamed the allocator from "Search" to "HillClimb" Change-Id: I50797d541f326d0264daf79bf7866aef32350a60 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-09MLBEDSW-3774 Removed ConcatSliceWritePatrik Gustavsson
-Removed ConcatSliceWrite from the optimised graph. Always executed as avgpool, which is equivalent with before the patch. -Added copy op to enable more removal of reshapes. Sg input/outputs need to remain. When Reshape input and outut, are sg input/outputs a copy op is needed to be inserted, in order to remove the reshape. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Id7be9966673ae34499e8518a5544104493fe326b
2021-02-03MLBEDSW-3572: Fused activations must not be int32Louis Verhaard
Added supported operator check that 32-bit fused activation functions are not supported. Change-Id: I01fdafeff8fdb13c71eae4f63be7e6f81b9223df Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-01MLBEDSW-3903: Bug fix PAD operatorLouis Verhaard
- Added checks for unsupported pad sizes in PAD operator - Bug fix right pad/bottom pad calculation when replacing PAD operator by hardware padding Change-Id: Ib84be711277d987052f14352ab386e0e0b774987 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-01-29MLBEDSW-3224: Support HardSwishDiqing Zhong
Change-Id: If49abc31f093f1bd3393bee86f821fd35972086f Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2021-01-29MLBEDSW-3772 Fix FC with changed inp shapePatrik Gustavsson
When FC input is fixed by changing ifm_shape, avoid_NHCWB16 must be set to ifm. -Fixed issue with ResizeBilinear -Changed to post order for concat ops in graph optimisation Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ie0c6a86637c210c0833ae9b2f8e7c494c5d4f66e
2021-01-28MLBEDSW-3772 Reshape removalPatrik Gustavsson
-Removed reshapes in the original graph -Removed the addition of reshapes to the optimized graph -Reshapes with different ifm/ofm quantisation will remain Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I94862be53dac0d7434815e2aee5ca678228495f8
2021-01-22MLBEDSW-3858: Incorrect PAD usage bugerik.andersson@arm.com
Fixed a bug where PAD having no consumers would result in a crash. Now the constraint doesn't crash and thus the intended error message is shown, resulting in easier debugging. Change-Id: I1e4403d47a6152e7adbf7bc065db86d4217d39cc Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
2021-01-19MLBEDSW-3418: More operator checks for infinityLouis Verhaard
- Added operator check that OFM scale > smallest float32 number - Generalized the restriction that IFM/OFM scale must not be infinite Change-Id: I918f5ea3d8fdec6e8f6bd6780ed13a19d1234ed6 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-22MLBEDSW-3561: Support const STRING input tensorsLouis Verhaard
Added handling of input tensors with constant string data. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Ieb5164a9d56d580ad08ea834bf2cbb7288cd9539
2020-12-22MLBEDSW-3711: Added operator checks for PAD.Erik Andersson
Constraints and unit tests were added to check the new pad operator. Change-Id: Id6d4cf2c4da486928c8f46ba1fa124eec66895a6 Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
2020-12-22MLBEDSW-3499: Support for PAD operatorLouis Verhaard
Replaces the PAD operator by hardware padding when possible. Change-Id: I9dce0885e51a4a73715824d7368637222e39b2b3 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-21Revert "Revert "MLBEDSW-3645 4D class for op ifm/ofm shapes""patrik.gustavsson
This reverts commit df0a5905177f3a1b836076bc3f9f39b2e86f1794. Reason for revert: <INSERT REASONING HERE> Change-Id: I891c66fb29db9d25e942947e8d1c29a10610de51
2020-12-21Revert "MLBEDSW-3645 4D class for op ifm/ofm shapes"patrik.gustavsson
This reverts commit bf31d647dc5df47410ee577b12427ddf076d816b. Reason for revert: <INSERT REASONING HERE> Change-Id: I7b6c585b7658f94dbaa916c2b6bfe9fb463b8d37
2020-12-21MLBEDSW-3645 4D class for op ifm/ofm shapesPatrik Gustavsson
Add 4D shape class for op Ifm/ofm shapes Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ic0a98da9d2f9d085605e39a9ab5a26bad6e702a3
2020-12-18MLBEDSW-3654 Add/use op ifm/ofm shapesPatrik Gustavsson
Add ifm/ofm shapes to op Changed to rely on these shapes Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I571535a1dcadc2bdb04a3c727a8e1c49703b174d
2020-12-17MLBEDSW-3694 Replace padding with enumMichael McGeagh
Use an Enum instead of a bytestring to specify VALID or SAME padding Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4e87f8c32b3bfac176d822a68de061e85a558fce
2020-12-14Revert "Revert "MLMBED-3450: Do not convert batched fully connected to conv""Diqing Zhong
- We have combined estimates for conv and fc, add the fix back Change-Id: I49a29c716189b37b387df4b46efab5f4e6125994 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-07MLBEDSW-3685 Fix dangerous default value usageMichael McGeagh
Pylint W0102: When a mutable value as list or dictionary is detected in a default value for an argument. Replace detected instances with None, and upon checking for None, sets the default accordingly Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4eb73d07d01d4cdefa586eb71b9c76746eee3b11
2020-12-07MLBEDSW-3643: Refactor blockdep calculationLouis Verhaard
Moved blockdep calculation and other helper functions for code generation to a separate file. Change-Id: I2f8ccea478654272ebf42217fc5c1800e9ad177a Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3562: Improve blockdep calculationLouis Verhaard
Blockdep calculation can now handle different sized IFM/OFM. Change-Id: I898a3c1c3a6778916802f3dbfa658328e5093096 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3558: Put FC on CPU when OFM != 2DDwight Lidman
This commit adds a constraint to FullyConnected ops in supported_operators.py that puts any such op on the CPU if tensor dimensions of the output(s) are not 2D. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I8c898a780b40fc4a1383c09213f0696ea6699b7d
2020-11-26MLBEDSW-3599: Added API for finding block configsLouis Verhaard
Added public API function npu_find_block_configs. Change-Id: Ib0925a62d7c5d19a9b9fbd8d808943c2ea2df02f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-25MLBEDSW-3424: Added API.mdLouis Verhaard
- Added API.md that describes the external APIs. - Renamed npu_get_api_version Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I6e6e6103a889da656b4e00c3cce3eee60dfa844a
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-27 18:50:44 +0000