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path: root/ethosu/vela/supported_operators.py
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2021-07-27MLBEDSW-4853: Refactor supported operatorsJonas Ohlsson
Refactor supported operators by breaking out model semantics into its own class. Model semantics checked right after model read. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: If442b189efcd91dda01af60b2b3adedfacdf2fad
2021-07-26MLBEDSW-4892: Fix crash affecting biases without quantization.James Peet
Remove quant_values attribute from Tensor class. It only needs a single values attribute, holding either quantized or unquantized values as appropriate. Change-Id: Ie96f80ac58061b6077e0f7048dc60209fdfbcafa Signed-off-by: James Peet <james.peet@arm.com>
2021-07-08MLBEDSW-4838 Added basic TOSA support.Patrik Gustavsson
Added basic TOSA support, enabling Vela to read and compile a .tosa file corresponding to CONV2D + Rescale + Clamp, and writing it to an optimized .tflite file. The optimized .tflite file, will in this case, hold a commandstream where the Rescale and Clamp has been fused into the CONV2D. The optimized tflite file is not output from Vela. -Added support to read .tosa file into Vela internal structure. - Added tosa_reader.py, tosa_mapper.py and helper files stored under tosa/ - Support for this limited to ~10 ops -Added reader_util.py for functions common for TOSA and TFLite -Added tosa_graph_optimiser.py -Added support to fuse Rescale into convolution -Modified handling for padding -Added support to fuse Clamp to previous op -Added graph_optimiser_util.py -Moved functions common for TOSA/TFLite graph optimization to this file. -Renamed graph_optimiser.py to tflite_graph_optmiser.py -Added separate tosa_supported_operators.py -Added supported_operator_util.py -For functions in common for TOSA/TFLite Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ic3c540504ec8c5eb4771397fdc6882050ecf33ab
2021-04-29MLBEDSW-4501: Support MEAN single axis variationDwight Lidman
When a MEAN operator with a single reduction axis specifies the axis index attribute as an array with a single element rather than a scalar index, the operator is placed on the CPU even though it is technically supported. This commit fixes this issue and also adds some new tests for the axis constraints. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Ia287f3b9cc80a805e972cd4b2962e52526a8dc16
2021-04-07MEAN implementation changed to Average PoolDwight Lidman
This is a small commit which changes one of the four MEAN implementations to a simpler one, using an AvgPool instead of a DepthwiseConv. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I9e8af071e8b820796577ee4792b4812a1212602b
2021-03-16MLBEDSW-4215: Add support for MEAN to match QuantizedMeanOrSum implementationDwight Lidman
This commit adds support for emulating the behavior of the QuantizedMeanOrSum implementation of MEAN in TensorFlow Lite. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Ifd24e0e678e2f85cd66ab82deeaaf010d5351b1e
2021-03-16MLBEDSW-4223: Full support for PAD operatorLouis Verhaard
- Added full support for PAD operator - Hardware padding is still used whenever possible - Bug fix Pad followed by max pool if IFM contains negative values Change-Id: Ifc64d1943737d94466f5e2821009dab12a49a965 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-25MLBEDSW-1499: Add MEAN operatorDwight Lidman
This commit adds support for the MEAN operator, with some caveats. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I165cb26cb5aefd68e70d2cfc68291ccf7b778921
2021-02-25MLBEDSW-3571: Sum and FC should not crash when asking for keep_dims.erik.andersson@arm.com
Previously the keep_dims or keep_num_dims attribute was not supported for Sum and Fully Connected operators and would thus crash for certain tests. With this update, the attribute is extracted correctly and saved to the optimised tflite file. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: If33487f6d299bb99788bb3d13332b842ba961641
2021-02-17MLBEDSW-4022: support PAD followed by pool operatorLouis Verhaard
PAD followed by max/average pool is run on NPU if NPU padding can be used. Average pool is converted to depthwise. Change-Id: Icc3652e6d9ecff5ac3dc7d92080313d90c245404 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-04MLBEDSW-3932: Remove Squeeze from supported operatorsLouis Verhaard
- Squeeze is no longer listed as supported operator - Added missing doc-string for a Pad constraint Change-Id: Ifd5e493acb0eb28bc4f104df74b3491589db8c29 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-03MLBEDSW-3572: Fused activations must not be int32Louis Verhaard
Added supported operator check that 32-bit fused activation functions are not supported. Change-Id: I01fdafeff8fdb13c71eae4f63be7e6f81b9223df Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-02-01MLBEDSW-3903: Bug fix PAD operatorLouis Verhaard
- Added checks for unsupported pad sizes in PAD operator - Bug fix right pad/bottom pad calculation when replacing PAD operator by hardware padding Change-Id: Ib84be711277d987052f14352ab386e0e0b774987 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-01-29MLBEDSW-3224: Support HardSwishDiqing Zhong
Change-Id: If49abc31f093f1bd3393bee86f821fd35972086f Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2021-01-22MLBEDSW-3858: Incorrect PAD usage bugerik.andersson@arm.com
Fixed a bug where PAD having no consumers would result in a crash. Now the constraint doesn't crash and thus the intended error message is shown, resulting in easier debugging. Change-Id: I1e4403d47a6152e7adbf7bc065db86d4217d39cc Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
2021-01-19MLBEDSW-3418: More operator checks for infinityLouis Verhaard
- Added operator check that OFM scale > smallest float32 number - Generalized the restriction that IFM/OFM scale must not be infinite Change-Id: I918f5ea3d8fdec6e8f6bd6780ed13a19d1234ed6 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-22MLBEDSW-3711: Added operator checks for PAD.Erik Andersson
Constraints and unit tests were added to check the new pad operator. Change-Id: Id6d4cf2c4da486928c8f46ba1fa124eec66895a6 Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
2020-12-17MLBEDSW-3694 Replace padding with enumMichael McGeagh
Use an Enum instead of a bytestring to specify VALID or SAME padding Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4e87f8c32b3bfac176d822a68de061e85a558fce
2020-11-27MLBEDSW-3633: SplitV incorrectly placed on CPUJacob Bohlin
Minor fix in SPLITV tensor indexing for supported operators check. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: If8fa702bfbb25a4a7e5bdb136a19ef72eec7e1c2
2020-11-26MLBEDSW-3558: Put FC on CPU when OFM != 2DDwight Lidman
This commit adds a constraint to FullyConnected ops in supported_operators.py that puts any such op on the CPU if tensor dimensions of the output(s) are not 2D. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I8c898a780b40fc4a1383c09213f0696ea6699b7d
2020-11-25vela: Improve printing of setsMichael McGeagh
When printing a set in the docstrings for the SUPPORTED_OPS.md file, the order is random. Reuse existing sorted string repr for the operator list and apply to other printed sets (data types) Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I2ac12ea91c2637219e5c24f9a863aa0fc2086e77
2020-11-20MLBEDSW-3157: Add test for broadcast shapesAndreas Nevalainen
Change-Id: Ifbd6c053ac618bedce0f56fe5c4c647a71d9cc46 Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-11-20MLBEDSW-3302: Reject per-channel scaling for unsupported opsDwight Lidman
Vela only supports per-channel scaling for convolution ops. This commit adds a check that puts ops with per-channel scaling on the CPU. A caveat worth mentioning is that neither TensorFlow Lite or TensorFlow Lite Micro support per-channel scaling for the CPU placed op, however the problem is moved away from Vela. This commit also changes a small utility function in supported_operators.py used for docstring formatting. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I9ed090592f1d05dd4566d3e54dba1ef405299383
2020-11-19[MLBEDSW-3300] Fix DepthwiseConv2D fails when bias tensor quant_values are NoneFredrik Svedberg
Fixed DepthwiseConv2D fails when bias tensor quant_values are None. Also fixed DepthwiseConv2D fails with implicit depth multiplier. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I799a565eefa498ccf7ac626fcd472b8cbd908931
2020-11-18vela: Remove ExpandDims from supported ops listMichael McGeagh
EXPAND_DIMS is not yet supported by vela, and so should not be in the list of supported ops. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I5eca13eb52eb9b40ecc6592cda978614c71db99d
2020-11-17MLBEDSW-3403 Generate supported op reportMichael McGeagh
A new CLI has been added that allows the generation of a report containing a summary table of all TFLite ops that can be placed on the NPU, and what the constraints are for that operator to be successfully scheduled on the NPU. This option will generate a new file, SUPPORTED_OPS.md containing this information, in the current working directory. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I6a7e2a49f251b76b2ea1168fff78e00da1910b25
2020-11-16MLBEDSW-3350 Put softmax on CPU if beta < 0Patrik Gustavsson
Put softmax on CPU if beta < 0 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I4ec866dd44d14e2737c4cd96474e54bb770bfb3e
2020-11-13MLBEDSW-839: Code generation using external API2.0.0.rc1Louis Verhaard
Added external API to generate register command streams. Existing code generation has been refactored to make use of this API. Change-Id: Ibb4c2b167809869f16470b14da24f08a65c82b7b Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-10MLBEDSW-3377: fixup_stridedslice_output may silently change CPU opsDwight Lidman
This commit removes the constraint on all tensor shapes matching the OFM shape. The motivation is that this constraint essentially only checks that the fixup function has run. This means that it removes the possibility for the fixup function to run after the supported operator check and this effectively means that any StridedSlice operator that would be placed on the CPU is still modified by the fixup function. Because the fixup function is moved to after the supported operators check, some unreachable cases are removed from the fixup function. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I7a82126b7de73bd67873b4e6daf53a6767e33d16
2020-11-09MLBEDSW-3402 SupportedOp now returns external nameMichael McGeagh
Previously the internal operator type was printed when checking the supported operator checks. This now converts that back to the external type name. Additionally removed dead code and changed the message for cpu-only ops Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ib2b0cbcb49fdf63edb835828e266b079e63bae37
2020-11-04MLBEDSW-2412 All constraints have been refactoredMichael McGeagh
All existing constraints have now been refactored using the new framework. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ic9ba0d7040cb9f114b959a949bfdf777f86752c7
2020-11-04MLBEDSW-3275: Added infinity check for Relu scaling valuesJacob Bohlin
Added a supported_operators check for Relu activation functions. If the scaling value overflows to infinity, it will be placed on the CPU. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I66b7bec062599609aadcbb7531caebbc45a7451f Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
2020-10-21vela: Improve the scaling is equal checkTim Hall
- Fixed and documented both tensor and quant params scaling checks - Added quant params validity check and tensor quantisation check - Added valid tensor checks to some graph optimisation functions Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I8d6e8f03a603d28886dde511672c8399c85b794c
2020-10-19MLBEDSW-2412 Refactor constraints for conv opsMichael McGeagh
Using a new system to report constraints, replaced existing functionality for checking conv-like ops. This new system will allow reporting of all constraints regardless of any input network. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: If81177deca2a3b57c9dd9a3a08868cbc9cef0c23
2020-10-15MLBEDSW-3219: Suppress CPU info Const/PlaceholderLouis Verhaard
Suppress info print that Const/Placeholder/SubgraphInput are not supported on the NPU. Change-Id: I6f323b64185b01b619b584c1473ae61d010ab3a4 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-10-14Revert "MLBEDSW-3219: Suppress CPU info for Const/Placeholder"patrik.gustavsson
This reverts commit 04986c0016e59993563490fe67052371fc0e1ad2. Reason for revert: Merged by mistake Change-Id: I150ad9ba7074ad1e80f21180aeba56a454d9f748
2020-10-14MLBEDSW-3219: Suppress CPU info for Const/PlaceholderLouis Verhaard
Suppress info print that Const/Placeholder/SubgraphInput are not supported on the NPU. Change-Id: I689d25481df0cd10487484c9f639e4253df081ee Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-10-13vela: Improve extra info in constraint checksMichael McGeagh
Keeping the constraint functions consistent with each other Added specific tensor names in the extra info Added operator name to the warning generated This should help easily identify specific problematic nodes in a graph and give a good enough explanation as to why they are placed on the CPU Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ie5bbdd31e5e75fe37e3d8bb8fee1d260080bce83
2020-10-13MLBEDSW-3219 Added info print for unsupported operatorPatrik Gustavsson
Added info print for unsupported operator Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I1002d1c2249661bff17ef86d9500d1aeb2a1e38e
2020-10-12MLBEDSW-3230 Remove restriction of batching 16 for FCPatrik Gustavsson
Vela supports batching of FC, restriction removed. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ica56738f1b2676628644fc44f2039a24807f5ccb
2020-10-12MLBEDSW-3061: Update supported_operators.pyDwight Lidman
This commit changes and amends some parts of the restriction functions in order to make sure operators are correctly placed. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I336cf33a874c9078a5bbf81ce129ff917dbc5e9a
2020-10-08MLBEDSW-3148: Refactor OperationLouis Verhaard
- op.type is now an enum instead of a string - Removed unused operator codes - Refactored some attributes like npu_block_type, fused_activation_function - Refactored operator index calculation - Refactored a number of operator sets Change-Id: I641f65ee375794b7aec42abc0664251ae37d78e8 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-10-07MLBEDSW-3154 Fix issue for checking axis in concatPatrik Gustavsson
Fix issue for checking axis in concat, now allowing 0. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I85a5fc3dacdfc66dc01b0e05048dd100254fddff
2020-10-05MLBEDSW-2412 Replace generic restrictionsMichael McGeagh
A new mechanism to report generic restrictions/constraints for operators has been implemented. Each check is its own defined function, and has a general reason for the constraint defined as its docstring. This allows us to query all reasons up front and report this without having to run through real data to trigger the checks. This is part of a larger refactoring and the specific restrictions will be replaced by a similar mechanism. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Id3fb2639f91cfac5fc5b8c14f7620de1a85972b2
2020-10-05vela: SupportedOperators promote to class instanceMichael McGeagh
Part of larger refactoring. The sets of operators do not need to be instance attributes and are not expected to be modified at runtime. This in turn allows almost all functions to become class methods. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I7dc24d65cdd6c4bda641b3d6133b3134302a552f
2020-09-30MLBEDSW-3001 Fix Min Max OPs not properly checkedPatrik Gustavsson
Min and max operations was not passed through the checking of elementwize OPs in the supported operator checking. Changed so they are passed through this check as well. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I358a121de33882802415d97d9ed5dbee53233f77
2020-09-30[MLBEDSW-2802] Fix 5D tensor crashFredrik Svedberg
Fixed crash in networks with 5D tensors. Fixed crash for (int32) tensors without quantization. Added validity checks for concatenation. Moved unfusing of activation function from tflite_reader to graph_optimiser. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Ib9ba8891dc95ef5491e15d0feedef44331a26393
2020-09-28MLBEDSW-2885: Fix overflow from inf numberAndreas Nevalainen
Added check for inf numbers for all scales. Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com> Change-Id: I84fcae429be4869d8489f66bef26863c254104cd
2020-09-28MLBEDSW-3035: Updated StridedSlice checksLouis Verhaard
Updated supported operator checks for StridedSlice: - allow negative indices in begin/end values - added more checks on shapes Change-Id: I3ac76bfa6b313f0e2250f0749f152fb0e3aa033c Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-24MLBEDSW-2788 Fix crash on non-constant weight tensorsAndreas Nevalainen
Change-Id: I750ec63a0e37b38feaf4cbdcc883fdbef92bccdf Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
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