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2024-01-30MLBEDSW-8569: MLCE: Reported number of CPU ops are wrongJohan Alfven
- A Pack op is implemented by several AvgPool ops. Depending on number of CPU ops and graph topology this could result in that the AvgPool ops ended up in different nodes. One of these node had the Pack output referenced to it but the other node did not. As a result the full graph was not traversed when calculating CPU ops. - The compiled network works as intended but the number of reported CPU was wrong. - Added new method that extracts the ops using the passes in the sub graphs which fix the problem. Change-Id: Ie88ebd4669783559258ae763737a4c7f86c905f8 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2022-11-16MLBEDSW-6620: Update copyright notice and yearsRickard Bolin
- Update copyright notices to use SPDX format and add OSS mail as contact. - Update years on files where it had been missed. Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I7e9715ea4e17b76252728c708e46df12ad67ab1f
2022-11-14MLBEDSW-6415: Summary csv generation errorwilisa01
- Removed unused variable total_npu_weights to fix summary csv error Change-Id: Id3c94166a787d2bb094ac6c6612fc866811515c2 Signed-off-by: wilisa01 <william.isaksson@arm.com>
2022-08-25MLBEDSW-6879: TFLG pass-through test crash3.5.0.rc43.5.0Tim Hall
- The optimisation of the SHAPE operator resulted in a divide by zero when printing the percentage of npu/cpu operators in the final output summary - The fix is to detect when there are no operators in the output tflite and then avoid the division Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I5bd2342335e9468a8b7028e6e2291a03960e2e55
2022-03-30Update version of Black to 22.3.0Jonas Ohlsson
Update version of Black to 22.3.0 due to updated dependencies. Updates to fix reported issues due to new version. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: I60056aae452093ce8dcea1f499ecced22b25eef1
2022-02-22MLBEDSW-5880 Fixed Vela verbose weight flagAyaan Masood
*Original weights and encoded NPU weight now report correct size instead of zero when running vela with --verbose-weights flag (Code to update the aforementioned attributes was missing) *Removed print references to unencoded NPU weight size Change-Id: I6d3e41c04cc46d24eeb54cab89818a35e5df27be Signed-off-by: Ayaan Masood <Ayaan.Masood@arm.com>
2021-11-25MLBEDSW-5507: Fix vela summary for passesTim Hall
- Removed the passes information as this was no longer correct or useful - Fixed the reporting of the number of CPU operators Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I80bf3f023de7d470af9aa5c6fe7bcb58c60ccd0b
2021-05-27MLBEDSW-4034: New Scheduler Size or Performance OptimisationTim Hall
- Merged dev/scheduler at 83639f90e8c828f70de6e29142355a940224959b Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I0050529d4b42da93768c7264296434dd877fb5b4
2021-05-21MLBEDSW-4219: Add tensor allocation info to summaryTim Hall
- Moved new tensor allocation info under --verbose-allocation flag - Tidied up and added histogram to --verbose--allocation print Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I76fb5187319aedf86f599f57b766220cafc17326
2021-05-06[MLBEDSW-4254] Improve weight information in summaryFredrik Svedberg
Improved weight information showed in summary if --verbose-weights option is used. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Iac142f2a813bf1c05aa9da3f8a384466e2914d06
2021-04-08Fix stats_writer.py exceptionFredrik Svedberg
Fixed exception in stats_writer.py. Change-Id: I625390aec185345cadd0d8fa5edb66907b9be242 Signed-off-by: Fredrik Svedberg <Fredrik.Svedberg@arm.com>
2021-03-31Handle absent weights_compression_ration when printingHenrik G Olsson
Change-Id: Iafb31af73d80adcc901b241c34dda78be360bc14 Signed-off-by: Henrik G Olsson <henrik.olsson@arm.com>
2021-03-30MLBEDSW-4219: Add tensor allocation info to summaryerik.andersson@arm.com
Added the theoretically minimum max memory usage and the allocator overhead to the Vela summary. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: If373dfeaac50d6f8b56554d435bf22af2c3acda3
2021-02-25MLBEDSW-4064: Update copyright headerserik.andersson@arm.com
All files which have been updated in 2021 and contain a copyright header have had their headers updated. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: Ia682111a719d16e690433398ccfb69c7e93c1cd1
2021-01-19MLBEDSW-3144: Add weights compression ratioDiqing Zhong
- Also removed the original bit_per_element Change-Id: I51bfbd28e14f316aae2d542bb610a3ed57b8b53b Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2021-01-12MLBEDSW-3769: Fix print errorDiqing Zhong
Change-Id: I464528510d6646ac685a31c1b3355252f44d2692 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-09Vela: bandwidth calculation improvementsDiqing Zhong
- Combine conv and vector_product calculation - Remove internal bandwidth - Remove blocks and hw_macs from report - Use scaled_bws for cycle estimation Related to: MLBEDSW-3598 Change-Id: I1927a8311ec563f68115e0f2ed077806b86fd717 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-07MLBEDSW-3685 Fix dangerous default value usageMichael McGeagh
Pylint W0102: When a mutable value as list or dictionary is detected in a default value for an argument. Replace detected instances with None, and upon checking for None, sets the default accordingly Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4eb73d07d01d4cdefa586eb71b9c76746eee3b11
2020-11-20MLBEDSW-3249: Vela config file examplesTim Hall
- Added sample vela.ini config file - Changed vela config format, split into system config and memory mode - Removed unused CPU cycle performance estimation - Added new CLI options for --memory-mode and --verbose-config - Changed CLI option --config to take multiple files - Removed CLI option --global-memory-clock-scales - Changed error helper functions to raise a VelaError exception - Refactored to create a new is_spilling_enabled function Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I27c41577e37a3859edb9524cd99784be10ef0a0d
2020-11-11MLBEDSW-3146: memory transfers cycle estimationDiqing Zhong
- DMA ops cycle estimation for the first pass - fix a bug in ifm_blk_depth calculation - fix a bug in sram bandwidth calculation - merge dpu and elementwise cycles into npu cycles - use str.format() in performance print Change-Id: I78895416f47fc3c652743c5da13fc45630322371 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com> (cherry picked from commit 5245e97a62c2fe54250f99b06e778f3e0c6dc376) (cherry picked from commit 16e415677403fc04a90b1a7ec554761d38315640)
2020-10-08MLBEDSW-3148: Refactor OperationLouis Verhaard
- op.type is now an enum instead of a string - Removed unused operator codes - Refactored some attributes like npu_block_type, fused_activation_function - Refactored operator index calculation - Refactored a number of operator sets Change-Id: I641f65ee375794b7aec42abc0664251ae37d78e8 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-30MLBEDSW-3025: Remove SHRAM from reportsLouis Verhaard
SHRAM is removed from performance reports, as the SHRAM numbers only include LUT usage. Change-Id: I5d92bb3be9c8e38dad26ac8ef97c84ecb0aff2fa Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-08-04vela: Protect against divide by zeroMichael McGeagh
If the total cycle count is zero (for whatever reason), then a divide by zero can occur when calculating the midpoint_fps. This change protects against that by detecting when that is the case and instead setting the midpoint_fps to nan. Further calculations using that variable is safe and results in nan throughout. Change-Id: I2d29545d331a6eb5b27b6d9c931587c15f877e74 Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com>
2020-06-25MLBEDSW-2306 Added more supported mem-cfgsPatrik Gustavsson
Additional supported memory configurations: -Permanent_storage = DRAM -Tensor arena either in DRAM or SRAM Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I20beb7151e306bfdba540e7c0b2a7b478b4d94e1
2020-06-18Add reorder-python-import pre-commit hookDiego Russo
Also updated README.md Change-Id: I118309c61f4d00e8508d6b888c606995490fba39 Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add pre-commit support for sanity checksDiego Russo
Use pre-commit framework [1] to run black and flake8 before the commit. black and flake8 are managed by the pre-commit framework and they can be run manually by the user using `pre-commit run` command. Fix the code base with the help of black and flake8. Fix import statements according to PEP8 guidelines [1] Both tools have the following settings (specified in the pre-commit configuration file): * line length: 120 characters * directory to exclude: ethosu/vela/tflite/ and ethosu/vela/ethos_u55_regs Updated README.md on how to install pre-commit and how to run sanity checks. Pipenv files have been updated including new dependencies for pre-commit. [1]: https://www.python.org/dev/peps/pep-0008/#imports [2]: https://github.com/pre-commit/pre-commit Change-Id: I304d9fffdf019d390ffa396a529c8a7c2437f63d Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-04-29Add Vela codebase0.1.0Tim Hall
- Added modules ethosu.vela and ethosu.mlw_codec. - Added README and various configuration files. Change-Id: I3690f8c8f5966306ecddaeb2793c30ca9c6e2eee