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path: root/ethosu/vela/operation.py
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2020-12-18MLBEDSW-3654 Add/use op ifm/ofm shapesPatrik Gustavsson
Add ifm/ofm shapes to op Changed to rely on these shapes Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I571535a1dcadc2bdb04a3c727a8e1c49703b174d
2020-12-18vela: Move special error casesMichael McGeagh
Due to an issue with potential cyclical imports, especially when running individual parts of vela standalone for example with pytest, the specialised error functions are moved out of errors.py to their respective locations. The use of getattr over isinstance prevents the need to import the tensor/operator class causing the cyclical import issue. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: If8cee4b1a2562660c6a47e1c7aeb5d7fd4dd1fca
2020-12-17MLBEDSW-3694 Replace padding with enumMichael McGeagh
Use an Enum instead of a bytestring to specify VALID or SAME padding Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4e87f8c32b3bfac176d822a68de061e85a558fce
2020-12-14MLBEDSW-3653: Fix type errors in annotated filesDwight Lidman
This commit corrects a number of type errors reported by mypy and refactors some parts of the code which are no longer necessary after making adjustments to satisfy mypy. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I16b880b228e57f2a92fb8936f53e94886e0f9f44
2020-12-08[MLBEDSW-3690] Refactor SoftmaxFredrik Svedberg
Move operator generation code to common functions. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I02e185fd793a96ae435fa7d235c9d1e97f388a03
2020-11-27MLBEDSW-3633: SplitV incorrectly placed on CPUJacob Bohlin
Minor fix in SPLITV tensor indexing for supported operators check. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: If8fa702bfbb25a4a7e5bdb136a19ef72eec7e1c2
2020-11-13MLBEDSW-839: Code generation using external API2.0.0.rc1Louis Verhaard
Added external API to generate register command streams. Existing code generation has been refactored to make use of this API. Change-Id: Ibb4c2b167809869f16470b14da24f08a65c82b7b Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-04MLBEDSW-2412 All constraints have been refactoredMichael McGeagh
All existing constraints have now been refactored using the new framework. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ic9ba0d7040cb9f114b959a949bfdf777f86752c7
2020-10-21vela: Refactor operators to use Kernel objectsTim Hall
- Normalise kernel availability by requiring all operators offer a kernel describing how much data they consume from the source, per OFM element, regardless of whether kernels are relevant to the operation. Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Idbcff64879fc2eccf292b6208a7d2038eb388017
2020-10-16MLBEDSW-3004: UnpackReshaped can't be serialisedDwight Lidman
This commit fixes a bug where a rewritten Unpack operator is placed on the CPU and crashes Vela during serialisation due to the type having changed and there not being a mapping for the modified op type. The solution is to move the fixup_unpack_output function to the graph optimisation pass B, allowing the supported op check to run before it. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Ic6bd4c70a478fd61adf377cb487f5b9253130314
2020-10-14Revert "MLBEDSW-3219: Suppress CPU info for Const/Placeholder"patrik.gustavsson
This reverts commit 04986c0016e59993563490fe67052371fc0e1ad2. Reason for revert: Merged by mistake Change-Id: I150ad9ba7074ad1e80f21180aeba56a454d9f748
2020-10-14MLBEDSW-3219: Suppress CPU info for Const/PlaceholderLouis Verhaard
Suppress info print that Const/Placeholder/SubgraphInput are not supported on the NPU. Change-Id: I689d25481df0cd10487484c9f639e4253df081ee Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-10-09MLBEDSW-3218: Added operator indices Quantize/DequantizeLouis Verhaard
Change-Id: Idcf1665f95ddecc2a12ff0e714f645263981d501 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-10-08MLBEDSW-3148: Refactor OperationLouis Verhaard
- op.type is now an enum instead of a string - Removed unused operator codes - Refactored some attributes like npu_block_type, fused_activation_function - Refactored operator index calculation - Refactored a number of operator sets Change-Id: I641f65ee375794b7aec42abc0664251ae37d78e8 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-29MLBEDSW-2031: LUT support tanh/sigmoidLouis Verhaard
Uses LUT for int8/uint8 based tanh/sigmoid. Change-Id: Ib6ac5a5c958ab9a17e47f620b22c3e22d8d60321 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-28MLBEDSW-3035: Updated StridedSlice checksLouis Verhaard
Updated supported operator checks for StridedSlice: - allow negative indices in begin/end values - added more checks on shapes Change-Id: I3ac76bfa6b313f0e2250f0749f152fb0e3aa033c Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-11MLBEDSW-2745 Support relus with differing scalesMichael McGeagh
In the event we have a relu op with different input and output scales, we need to fuse it with a nop avgpool. Also refactor the existing avgpool nop code to a common function. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Iedf4513e7595ee4ee1777ba0b1eb38a8df8aed5e
2020-09-08MLBEDSW-2935: LUT fusing with preceding operatorLouis Verhaard
Allows fusing of LUT with a preceding operator regardless of input/output scale. Change-Id: Ia378adbb3fe61d71299feb085f7313377e0efa39 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-03MLBEDSW-2814 Add support for inferred size in SplitVPatrik Gustavsson
For SplitV sizesplit can contain one -1 indicating that dimension is to be inferred. Support added to handle this. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ib9fc8dd2ee1749e81a978d85f2d4a016698bb441
2020-08-28MLBEDSW-2804: Added bias data type checkJacob Bohlin
Allows int64 data type to be used as long as all values can be packed into a int40 value. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I0e25ec482e3ea765a5fd00bcf7e212a9e65a1461
2020-08-27Small fix for Softmax regressionJacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I287c24725126c169afec779b921e43c3ab26f739
2020-08-21MLBEDSW-2663: Handle optional tensorsJacob Bohlin
Includes a number of changes: * Handle non-existing optional inputs * Handle disabled optional inputs (-1 indexed) * Added unit tests for parsing operators * Add bias tensor to the different Convolutions + FullyConnected if it's missing. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Ib88d2b610314b1c886fc0aef4f9da87430ce6ae5
2020-08-19vela: Minor refactor of operation classTim Hall
- Removed some of the clutter Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I9a12f681247befd44dbbc9d7fbd135f0603d2fbd
2020-08-12MLBEDSW-2637 Utilise new tensor and operator funcsMichael McGeagh
add_input_tensor, set_output_tensor, create_const_tensor and create_reshape_tensor have recently been added. This replaces all found existing instances with these new helper functions Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: If33be8dbf237b2087b562b03cdeb51da1f99a786
2020-08-12MLBEDSW-2637 Refactor util funcs out of softmax.pyMichael McGeagh
There were a number of "TensorUtil" functions defined in softmax.py These have been moved to their respective classes for Tensor and Operator respectively. Two of the functions were not a simple tensor/op function. These helper functions have been moved to tensor.py for the simple fact that they return Tensor's Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I17d39c4e11f0837b7867b4a54da2e4a56383e095
2020-08-05[MLBEDSW-2335] SoftMax int16Fredrik Svedberg
Added graph rewrite of Softmax for int16. Change-Id: Id7885af6056a23e8b8362fb61ae94283251eb398 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2020-06-18MLBEDSW-2528: MLCE-219: Custom operator pass throughTim Hall
- Fixed custom operator pass through - Added error printing functions for operators and tensor - Minor cleanup of custom exception handling Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Idf295df1e4c544381dc480244d880c32fb285e38
2020-06-18MLBEDSW-1716: Transpose Convolution supportJacob Bohlin
Change-Id: Ie6d8d6de9f3447f19ba06aafa9fa480fc96a973b Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
2020-06-18MLBEDSW-2420: Improved support for dilated convolutionLouis Verhaard
- Dilation added to SET_KERNEL_STRIDE instruction - Kernel height/width adjusted for dilation - Updated padding calculation - Updated weight compression Change-Id: I0c8190223e223b039a305aba0f37896ae1de2b80 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-2303: Bug fix SplitLouis Verhaard
Usage of the Split operator caused assert failure. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Ibe09b9021f768b86731bdc361f9a0875c4379e4b
2020-06-18MLBEDSW-1649: Add size splits for Split opCharles Xu
The tensor is split into len(size_splits) along the dimension axis with the sizes specified in the size_splits array. Change-Id: I2ce98fa10e2e26f16cfd86a775aee94a308509ea Signed-off-by: Charles Xu <charles.xu@arm.com>
2020-06-18Add reorder-python-import pre-commit hookDiego Russo
Also updated README.md Change-Id: I118309c61f4d00e8508d6b888c606995490fba39 Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18MLBEDSW-1998: Add support for new_axis_maskPatrik Gustavsson
-Added support for new_axis_mask -Added support for more than 1 bit set in new/shrink_axis mask -Added checks for strided slice in supported operator check -Added assert if nothing has been put on NPU Change-Id: I66e2d04784f14d7ad82371f5d649a455d576a818 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-06-18MLBEDSW-1998: Add more support for Strided_slicePatrik Gustavsson
Add support for end_mask != begin_mask Change-Id: I6775696de4e2365e0a7cdcbcdbc64a7bd4858fb5 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-04-29Add Vela codebase0.1.0Tim Hall
- Added modules ethosu.vela and ethosu.mlw_codec. - Added README and various configuration files. Change-Id: I3690f8c8f5966306ecddaeb2793c30ca9c6e2eee
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