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2022-11-22MLBEDSW-7008: Update RELEASES.md, SUPPORTED_OPS.md and setup.py3.6.0.rc33.6.0Rickard Bolin
- Update SUPPORTED_OPS.md with release version - Update setup.py with release version - Update RELEASES.md with release notes and comments Change-Id: If5cd5525d8a52a13245940bfbb262db8c9e13003 Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2022-11-22MLBEDSW-3573: Document CSV fileswilisa01
Added references to performance CSVs and documented per-layer performance. Also removed a space that caused black in pre-commit to fail. Change-Id: Ia20cb381654cc6344c68bcaad0a7dfc517d55e63 Signed-off-by: wilisa01 <william.isaksson@arm.com>
2022-11-17MLBEDSW-6915: MLCE - Missing operators in Debug DB3.6.0.rc2wilisa01
- Adds missing operators and type conversion recording to DebugDB Change-Id: If76b0b430bbe73ae1469024c3160ecf0eea26abe Signed-off-by: wilisa01 <william.isaksson@arm.com>
2022-11-16MLBEDSW-6620: Update copyright notice and yearsRickard Bolin
- Update copyright notices to use SPDX format and add OSS mail as contact. - Update years on files where it had been missed. Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I7e9715ea4e17b76252728c708e46df12ad67ab1f
2022-11-15MLBEDSW-6905: Add dilation greater than 2 supportTim Hall
- Added graph optimisation pass to support dilations greater than 2 in either dimension - Removed supported operators restrictions - Removed erroneous dilation on TRANSPOSE_CONV - Updated unit tests and documentation Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ide302374b0d5eff25c20501383a63f6aa7625c52
2022-11-15MLBEDSW-7120: Update pre-commit tool repo locationRickard Bolin
Change-Id: If871b0fe4dde2ec8f44c356fc6d5f4c1132fc142 Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2022-11-14MLBEDSW-6415: Summary csv generation errorwilisa01
- Removed unused variable total_npu_weights to fix summary csv error Change-Id: Id3c94166a787d2bb094ac6c6612fc866811515c2 Signed-off-by: wilisa01 <william.isaksson@arm.com>
2022-11-14MLBEDSW-7040: verbose-performance doesn't report the original opTim Hall
- Fixed the reporting of the input network operator to correctly report the original operator type rather than the current one - Fixed a divide by zero bug when calculating percentages - Refactored the verbose-performance code so that console and csv outputs use a single definition of the header and data Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ibd3fa99b65f0602dcdcff696f2d565ac13453306
2022-11-09MLBEDSW-6881 SHAPE single op network is optimised to nothing3.6.0.rc1Fredrik Svedberg
Fixed by adding an operation to copy the statically optimised data to the subgraph output. Change-Id: Ica757e37d5460237973444ffd39c7d2850f319e3 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2022-11-03MLBEDSW-7074: Updated reference kernel for the MEAN opJohan Alfvén
The reference kernel for the MEAN operator has changed. As a result, the mean implementation can be simplified and the constraint for mean int8 can be removed. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I318e9b495eefea99e7ac4aea4b8c436c83753405
2022-11-03MLBEDSW-7082: Weight tensor shape is incorrectTim Hall
- A bug was introduced by using the original_shape attribute that causes CPU CONV2D ops to fail to run due to an incorrect weight tensor shape - This was due to the original_shape not being modified when a transpose was performed on the weight tensor - The fix was to transpose the original_shape just like the current shape Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ied72316463d26c502cf931b9dd5784041c42ab66
2022-11-01MLBEDSW-7077: Store original tensor shape in optimized fileJohan Alfvén
- CPU side always needs to work we the original tensor shape. Due to a bypass memory optimization the IFM, produced by CPU, was stored with the wrong shape in the optimized file. - Store the original tensor shape so it can be correctly written to the optimized file. Change-Id: I666dbcb0acd806ad208c0f925a51dfc25421688b Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2022-10-28MLBEDSW-6975: Updated bypass functionalityJohan Alfvén
- The previous patch the always replaced ifm with ofm introduced unnecessary avg pool ops for some cases. That patch has been reverted and this is a new solution. - Replace ifm with ofm for the following condition: a) Ops that are dependent that the original ifm tensor shape is not changed by the bypass memory op function. b) When the memory op has different IFM and OFM rank. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I16a023e169ae64c5db46f6f88516a5e1ca7ed7ef
2022-10-28Revert "MLBEDSW-6961: Bypass functionality for memory ops"Johan Alfvén
This reverts commit 5060ff53f5ac2382e04a68d7772bd71a36f63845. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I8dd7e9ed8325fd2e8c17509fd9757292706f5ee7
2022-10-27MLBEDSW-7060: Bias tensor should be in 1D shapeJohan Alfvén
Always make sure the bias is a 1D tensor. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: Ic0cb85d4fb9d2e07b4d1b7ac6059bffa432e28a3
2022-10-26MLBEDSW-7063: Fix output diff for networks with split opsJohan Alfvén
- Due to a SPLIT op the following ADD op did get an IFM shape that is bigger than its original shape but that is handled by read_offset and read_shapes. The problem was that the IFM was considered not be primary and an erroneously swap was done. - Make it even more clear when the swap is allowed. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I0aefa04234f66c935f269267ae8ed1d77da64c81
2022-10-26MLBEDSW-7059: Updated offset calculation for SliceJohan Alfvén
Corrected offset calculation for operator Slice. All values in tensor begin and tensor size must be used to calculate the offset range in order to read the correct data. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: Ic463d8f72a2167f8129109b8dcf005f034cce6ed
2022-10-26MLBEDSW-6984: Optimize fast storage for feature mapsJohan Alfvén
- Remove very long live ranges that are standing out compared to its neighbors. This can be seen on large networks with complex structure. If they are chosen instead of shorter live ranges, it will be difficult for the HillClimb Allocator to find a perfect fit in the final allocation. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I6cf23adfdc06c1e93e12e9cf816453d940ff31f7
2022-10-25MLBEDSW-7028: Fix compiler assert for elementwise opJohan Alfvén
- Refactored erroneously if statement that allowed illegal swapping between ifm1 and ifm2 for elementwise operators. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: Iec571f710824432edac9104d960f199f33a1b241
2022-10-21MLBEDSW-6840: New stripe algo for optimize sub scheduleJohan Alfvén
- The algorithm for trying out different stripes in order to optimize a sub schedule/cascade, have a problem that it can split the initial cascade into several smaller cascades. The problem with this is that it will increase IFM/OFM DRAM bandwith and performance will drop. - Changed the stripe algorithm to prefer long cascades. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I4f38b381597b7094819e9dd463aa1876e4e6bc62
2022-10-20MLBEDSW-7019: Update to elementwise cascadingJohan Alfvén
- The cascade builder is using the ifm_ifm2_correct_order function in order to decide if the operator is cascadable or not. The problem is that this function expects a full shape or no shape and the cascade builder did not provide that, so the operator was reported to be non cascadable. - The fix is to provide a full 4D shape, also refactoring ifm_ifm2_correct_order to use 4D shape to avoid confusion in the future. - Refactoring code so that the scheduler can perform a correct ifm and ifm2 swap. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I9a86c4690612f332afa428456a07e67698852495
2022-10-20MLBEDSW-6931: Refactoring merge elementwise opsJohan Alfvén
Change code in cascade builder to instead use common functionality in live range. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I7bbd7ea3d1e7e085813e9d93256a54e6bab2267b
2022-10-19MLBEDSW-6880: Add support for multiple subgraphsJohan Alfvén
- Vela failed to compile networks with multiple subgraphs because only cascaded passes in the root subgraph were used when extracting the live ranges. The fix is to extract the subgraph range live on Ops that have connected subgraphs. - The tf_writer did not handle multiple subgraphs in a correct way resulting in corrupt buffer data in the optimized tflite file. The buffer index must be unique for every tensor. -Added support to handle multiple subgraphs for the OfflineMemoryAllocation meta data. The change will not change behavior for single graphs. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I2328dfc1f07e2e4faf43a75423ea95423096ffa3
2022-10-19MLBEDSW-7020: TRANSPOSE_CONV stride documentation is confusingTim Hall
- The op contained supported operator checks for both the stride being in the range 1 to 3, and being equal to 2. Whilst both are correct, only the later is needed - Removed the stride in the range 1 to 3 check for TRANSPOSE_CONV - Regenerated the documentation Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I9789cdbd3ed65ce310f1529036abbac62296d2ca
2022-10-18MLBEDSW-7018: Update CONTRIBUTIONS docJohan Alfvén
In order to be able to add your SSH key there must exist a valid email address in your account. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I60c70e63ea6ad015d5a10d8e9efec6d61d56cbad
2022-10-18MLBEDSW-6941: Set correct OFM shape for fc opJohan Alfvén
If IFM operator shape is rewritten so that batching is greater than one for fully connect, the OFM batch must also be calculated. This change will fix output diffs for networks that have fully connect OFM with rank greater than 2. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I5009edc647a1449a02c8116b45808c1c68beffe6
2022-10-18MLBEDSW-6794: ResizeNearestNeighbor with HPCJohan Alfvén
- Removed half pixel centers constraint for resize nearest neightbor. - Supported scale 2x, 4x and 8x. - Removed test_constraint_resize_half_pixel_centers - Regenerated SUPPORTED_OPS.md Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: Ic3e02e9c2b2034d537c9a9841b8fb4ee433c96dc
2022-10-12MLBEDSW-6971 Fix output diff when cascading elementwise operatorsFredrik Svedberg
Fixed output diff when cascading elementwise operators with reversed operand order. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Iac2e28cfb53037b929459af213f4fa7715b3e6de
2022-10-12MLBEDSW-6987 Regressions after removing RescaleAdd/RescaleMulFredrik Svedberg
The problem was that the updated conditions for elementwise cascading was to permissive after the RescaleAdd removal. Conditions for elementwise updated and transpose convolution removed from cascading since it does have issues. Change-Id: I0151256c4e3905fad39152941eec44bc76035d30 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2022-10-11MLBEDSW-6626: Initialize lut_val in mlw_codecJohan Alfvén
The palette variable located on the stack was not properly initialized and could potentially overwrite the stack memory when palette size was increased to 2. Make sure lut value is initialized. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I9fecfe218dc39c0157d1af015e725d1e4becf2f0
2022-10-04MLBEDSW-6969 Remove RescaleAdd and RescaleMul operatorsFredrik Svedberg
Removed RescaleAdd and RescaleMul operators in favour of Operation.explicit_scale and removed Operation.rescale. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Idccd8851731d4bb8d4e84970e0fd6b409d7d4e45
2022-10-03MLBEDSW-6979: Installing on aarch64 with Python 3.8 failsTim Hall
- The issue is due to the numpy version needed when installing on aarch64 with Python 3.8 and TensorFlow - The fix is to use the python_version variable when specifing the numpy version Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I6134b6dbccefc3be0b87feb17e3176b7f42641b3
2022-10-03MLBEDSW-6955: Update to TensorFlow 2.10erik.andersson@arm.com
- Updated to TensorFlow 2.10 and FlatBuffers 2.0.7 - Changed absolute to relative imports in the auto-generated code - Updated Vela's TFLite writer to support FlatBuffer builder's internal number of elements count - Removed use of deprecated numElems argument to FlatBuffer builder's EndVector() Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: If447778134db81ae0ac374c7397e1140082372fd
2022-10-03MLBEDSW-2723 Handle int16 multiplier overflow test caseFredrik Svedberg
Added unit tests for scaling including saturated multiplier test. Change-Id: I87bb3a4bed8f62f5ef5cf3851b97f09ce42bf2b6 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2022-09-27MLBEDSW-6708 Check the bias tensor in graph optimiser mean opFredrik Svedberg
Cleaned up bias tensor use in graph optimiser for Mean operator. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Ibcbfa010a4de67d97181df664b420168d6883d1e
2022-09-27MLBEDSW-6961: Bypass functionality for memory opsJohan Alfvén
- In order to solve output diffs, the Reshape op was pushed to the CPU. The problem was that the Mean op ifm shape was replaced by the Reshape op ifm shape. - This limitation is now removed. Changed implementation how memory only ops are bypassed. Always replace the memory only op ifm tensor with its ofm tensor. By doing this the ifm tensor for the operator that is after the memory only op is never changed. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: Ibcdebf33fd9b7a37f90984a129500b5dac52e5ea
2022-09-27MLBEDSW-6962: MEAN height is greater than max kernel heightJohan Alfvén
Fixed bug when height is greater than max kernel height. The shape of the weight must match the ifm shape. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I901a8af2edd5858bb15d53d85ef8e2389049ada7
2022-09-27MLBEDSW-6933: Clean up address_for_coordinate functionRickard Bolin
Make the address_for_coordinate function a bit easier to read Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I854e1643a39108edc8b1de95198d30a1891fdfd1
2022-09-26MLBEDSW-4075 PACK axis 0 + tanh fails with output diffFredrik Svedberg
The test failed since the tanh had batch size > 1. Added checks for batch size for all supported operators. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I3570352740c40eb96bd9db965dfa3c91c81ff2ad
2022-09-26MLBEDSW-6932 LeakyRelu missing from supported ops activationsFredrik Svedberg
Added LeakyRelu to supported activation ops. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Icca27730946d02ec16159f988782567be716b594
2022-09-23MLBEDSW-6928: Add int16 support for Resize Bilinear HPCRickard Bolin
Setting bias tensor dtype to DataType.int32 solves rounding issues for RB HPC int16. Removing the input data type check also solves the issue of resize nearest neighbor int16 ops incorrectly getting placed on the CPU. Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: Iee352bcb78e581c0cde3c203dfbe866f1f6fae18
2022-09-23MLBEDSW-6686: Resize bilinear HPC with tile paddingRickard Bolin
- Added support for Resize Bilinear with half pixel centers for int8 and uint8. - Utilizes the new "TILE" padding mode. - Utilizes ofm stride multipliers and modified tile base offsets to write OFMs interleaved. Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I37fa77c022a368f05fda0ead75d8696c9205f833
2022-09-21MLBEDSW-4338 Randomized int16 PAD output diffFredrik Svedberg
The issue was that the AveragePool in these test cases were translated to DepthwiseConv2DBias and int16 convolutions always runs with reduced scale. Fixed so that reduced scale is not used in this case. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Ice956eabbb37c8aa1991464870006971c6ecec43
2022-09-16MLBEDSW-6938 Fix PReLU optimisationFredrik Svedberg
Fixed PReLU optimisation to LeakyReLU with negative alpha. Added optimisation of LeakyReLU to ReLU when alpha is zero. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I5e66f79b29908fffd95b6115799021138ebb401a
2022-09-15MLBEDSW-6927: Add ofm_stride_multiplier attribute to operationRickard Bolin
Allow sparse writing of OFM by multiplying H/W/C of the OFM with the values of ofm_stride_multiplier Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I65d742ad36ad3154e9914cdd22e2da928ad1f095
2022-09-13MLBEDSW-6929 Fix LeakyReLU int16 regressionsFredrik Svedberg
Fixed LeakyReLU regressions for int16 due to scaling introduced for handling negative alpha. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I84a494fedf54bd4b47c4632645ded7d6cda445f8
2022-09-12MLBEDSW-6863: Cleanup the constraint for concatJohan Alfvén
Removed duplicate code and moved constraint to the correct file. Signed-off-by: Johan Alfven <johan.alfven@arm.com> Change-Id: I2da3c5b88e1af351751c481217b8183b5948f0f8
2022-09-12MLBEDSW-6424: Remove Pipfile supportRickard Bolin
Remove Pipfile support due to lack of testing and maintenance. Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I93786cdbf22bfa2130601291d23cead177bd8f81
2022-09-12MLBEDSW-6869 Improve LeakyRelu supportFredrik Svedberg
Added support for int16 LeakyRelu for negative alpha and alpha greater than one. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I7f522ebfe014786d0a1d96172e75c7d9bdd76921
2022-09-12MLBEDSW-6613: Implement tile paddingRickard Bolin
Implement new padding mode which pads two edges of the IFM with the current values of those edges Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I8523e0cabdac80b48710703859003e33050cc150
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-01 12:15:51 +0000