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2023-11-16MLBEDSW-8109: Update release notes3.10.0.rc23.10.0Tim Hall
- Added release information - Modified SUPPORTED_OPS.md version info Change-Id: I3ead55db45c84821c426645e488dfb765166d20f Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-11-16MLBEDSW-8240: Document reference comparison pointTim Hall
- Updated TensorFlow Support section Change-Id: Ic2551f44e7dfa996a5dcc8840d480b7985415a0a Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-11-16MLBEDSW-8280: Update PyPI homepage linkTim Hall
- Changed homepage link from cgit to gittiles - Clarified tensor alignment is in Bytes Change-Id: I9fd912c17d61f9add11493e031bbb620271c68eb Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-11-16Vela: Update from using deprecated pkg_resourcesTim Hall
- Changed deprecated method of getting package version info - Updated pylint version to be Python 3.11 compatible Change-Id: I68aae2155098c834653d404c78acf8df86eb88f8 Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-11-15MLBEDSW-8336: MLCE: Update example for CPU Tensor AlignmentJohan Alfven
- Updated example to --cpu-tensor-alignment in OPTIONS.md Change-Id: Id0b74a9aac4dd4384a4b7c74eea743c29c3c8e5e Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-11-15MLBEDSW-8326: MLCE: Update constraint message for AVERAGE_POOL_2DJohan Alfven
- Added missing constraint message for stride height by adding the constraint_stride_width_no_upper_limit to AVERAGE_POOL_2D Change-Id: Ib716fb19e44cb8735b52270b557998d4cbf5cb1c Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-11-13MLBEDSW-8317: Add semantic checks for TransposeJohan Alfven
- Added semantic checks for Transpose - Added unit tests for semantic checks - Updated SUPPORTED_OPS.md Change-Id: I3fcf13120f4b6811f8de27711996cdb9c19c9847 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-11-09MLBEDSW-8290: MLCE: Add TRANSPOSE support3.10.0.rc1Johan Alfven
- Added graph optimiser function to convert TRANSPOSE op into an AvgPool op with swapped stride for height and width - Added TRANSPOSE supported op check - Added unit tests for TRANSPOSE supported op check - Updated SUPPORTED_OPS.md - Fixed problem in pass packing when optimizing the pass list. Old problem, but now seen when moving TRANSPOSE from cpu. Change-Id: I0a0ef420b0fb8241090c2e2434622881105cde15 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-11-06MLBEDSW-8261: Fix regression on AvgPoolJohan Alfven
- When adding extended stride support for CONV_2D a regression was introduced for AvgPool causing an output diff for a particular test case. - The reason was that the logic for forcing the zero point to zero when generating the cmd stream did not have a check for explicit padding. - Updated logic to also include check for explicit padding. Change-Id: Iee4893a83a05279e592fe230f4d66d9c9ddb3e05 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-11-02MLBEDSW-8117: Incorrect stride check for IFM/IFM2 and OFMBjörn Davidsson
The constraint check for the IFM/IFM2/OFM strides were coded according to an incorrect version of the specification. Changed the check to verify that the strides are a multiple of 16 bytes. Also changed the wording in the exception message to clarify if it is a stride or value violating the constraint. Test case had two stride settings violating the constraint, after this change one of them still fails the check, so no change to tests, except in comments clarifying what is being tested. Change-Id: I93815d8bb08303b5f747c947c0bbd461b12895e3 Signed-off-by: Björn Davidsson <bjoern.davidsson@arm.com>
2023-10-31MLBEDSW-8219: Activation can not be fused with dma operationJohan Alfven
- A reshape followed by an activation function was converted to a Memcpy with fused activation. The problem is that Memcpy does not support activation so no activation was executed. - Added logic to prevent activation functions to be fused with the Memcpy. Change-Id: Ibc7d985e5037146dd1f6cb2601407d0f8b865ac6 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-10-31MLBEDSW-8201: [MLCE] Extended stride support for CONV_2DJohan Alfven
- Added support for stride_h > 3 when ofm height is 1 - Added support for stride_w > 3 when ofm width is 1 - Updated constraints - Updated tests - Updated SUPPORTED_OPS.md Change-Id: I8f89909b05a0f052df5f03702966cee50da61cfc Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-10-30MLBEDSW-8156: Update max_outstanding_kernels to 2Rickard Bolin
Update max_outstanding_kernels to 2 and remove unit tests expecting values of 2 or 3. Change-Id: Ib8a3a88d3378d3ce84427935c91c7a46f04bc9ab Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2023-10-11MLBEDSW-8111: Update to TensorFlow 2.14Rickard Bolin
- Update to TensorFlow 2.14 and minimum required Python version to 3.9. - Update version pins on NumPy and FlatBuffers. - Add constraint to Offset attribute of StridedSlice operator Change-Id: I8c7122def963202e5f47e92b62be607935ed05cf Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2023-10-10MLBEDSW-7853: Missing options for RANDOM_UNIFORM operatorRickard Bolin
The operator mapping for the RANDOM_UNIFORM operator was missing the seed and seed 2 options which resulted in those options being removed when the operator was passed through Vela. Change-Id: I8469c239ec1d20d775c31a52e4954baf159643f2 Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2023-10-05MLBEDSW-8064: Update Markdown URLsJohan Gunnarsson
Markdown's git reporitory has moved to different location. Change-Id: Iae401c1d283d937347cbce546836470647333201 Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
2023-10-03MLBEDSW-8102: Fix regression on Argmax int64Johan Alfven
- Fixed a regression where DepthWiseConv used in argmax int64 had the wrong shape. - The error was introduced when adding support for a new operator that changed the weight shape for the cast utility function. That change only worked because reorder_depthwise_weights was called later. Since argmax is converted after reorder_depthwise_weights the cast operator in argmax got the wrong shape. - The fix is to set the correct weight shape in the cast operator and then mark that the weights already have been transposed correctly. Change-Id: I61f5694f078cfcaf0d46d43faead6eb7e0a23ade Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-09-18MLBEDSW-8052: Update FlatBuffers version pin in pyproject.tomlWilliam Isaksson
Update to 23.1.21 Change-Id: I2a9aaa7cbb725c2f417b87577a1f8d6ad4697d76 Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-09-18MLBEDSW-8042: MLCE: Add SQUARED_DIFFERENCE supportJohan Alfven
- Added SQUARED_DIFFERENCE support - Updated SUPPORTED_OPS.md Change-Id: Id83d9d92129e645390c7979759dfdeff7a14c2ee Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-09-14MLBEDSW-8010: Refine fixup_pool_strides to also check strideJohan Gunnarsson
Only set stride to (1, 1) if kernel, stride and IFM shape all are equal. And also set padding to VALID to handle ops with SAME padding. Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: Id3cc34686f09667ea21541fac432351555344e3d
2023-09-14MLBEDSW-8003: Limit fixup_pool_strides to AvgPool and MaxPoolJohan Gunnarsson
This fixup is not relevant for Resize ops. Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: I81b9d3c8a6dd820b1e5d747d754100282b93c641
2023-09-13MLBEDSW-8035: Update to TensorFlow 2.13William Isaksson
- Adds 3 ops: Bitcast, BitcastXor, RightShift Change-Id: Ia9721c69d4f3da0deba7526addb95a9a54e63adf Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-09-12MLBEDSW-7997: [MLCE] Extended stride support for TRANSPOSE CONVJohan Alfven
- Support for stride WxH 1x1 - Support for stride WxH 2x1 when IFM and KERNEL is 1D shape with height 1 - Added test to supported operators - Updated SUPPORTED_OPS.md Change-Id: Ic1abead8399a5e14a78d962f8aded0d3b3dbfcc4 Signed-off-by: Johan Alfven <johan.alfven@arm.com>X
2023-09-06MLBEDSW-7541: Extend error message when reaching maximum recursion depthRickard Bolin
Extend the error message of RecursionError when reaching default recursion depth with instructions to use the "--recursion-limit" option in Vela. Change-Id: I5c92d49b99203268c4b988f421afe7013ac3511a Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2023-09-05MLBEDSW-7968: Add fixup for strides when kernel size equals IFM shapeJohan Gunnarsson
There are networks out there with Pool ops with filter (W, H) equals IFM (W, H) equals stride (W, H). The stride is technically too large for the NPU, but we can actually run these ops in the NPU since the filter is large enough the window doesn't slide. To support these ops we need to fix the stride so later checks don't put this op on CPU. Change-Id: I8f0a46b26fb94ee76c33748589536cc5ba07ea59 Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
2023-08-29MLBEDSW-7881: Convert Quantize op to Avgpool op in graph optimiserJohan Gunnarsson
This convert is already done in the pass packing stage, but doing it in the graph optimiser stage is better. Change-Id: Ib9baa98d115cf88491ce39936972a93467a378ce Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
2023-08-22MLBEDSW-7949: [MLCE] Remove duplicate cpu tensorsJohan Alfven
- If a npu op is followed by a convolution op than runs on the cpu, the optimized file ends up containing a duplicated tensor called _cpu. Functionality wise not a problem but the graph will look strange in a graph viewer. - This error was introduced when removing duplicate weights tensors but the above use case was not considered in that patch. - The fix is to make sure that only the weight and bias tensor are modified. Change-Id: I576f13650f1f9d3d50a421ab7100fc8b5ab62657 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-08-21Moving Vela to use TOSA v0.80.0 specificationRob Elliott
* Using serialization_lib main branch to update statically copied files sha 5f920211ac23393a7b98a0d358bfbfc3232d5c8f (v0.80.0) * All files within the ethosu/vela/tosa are copied from that revision * Note: hope to move to serialization_lib as a pip module in future * Modified the ethosu/vela/{tosa_mapping,tosa_reader}.py to use v0.80.0 TOSA FlatBuffers implementation * These are the additional changes made to support this new version, with changes in the format of the FlatBuffers file and where various values are stored. Either changing from input to attribute, or moving to different attributes. Signed-off-by: Rob Elliott <robert.elliott@arm.com> Change-Id: I5e1fcc2a9964148619be3477adf1e88e84cbae2d
2023-08-21MLBEDSW-7702: Update release notes3.9.0Rickard Bolin
- Added release information - Modified SUPPORTED_OPS.md version info - Update README.md and classifiers in pyproject.toml to specify Python 3.10 as recommended and tested version Change-Id: I78e5752846f261d4713b89c8efe447bcb9c095dd Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
2023-08-16MLBEDSW-7884: Fix crash for RSQRT3.9.0.rc2Johan Alfven
- RSQRT is only defined for positive numbers and therefore the zeropoint and actual input value will have an impact - Clamp the range to avoid crashing. As long as the actual input is within valid range everything works. If the input is not valid the reference will crash and not generating any output Change-Id: I1082b508d9cd85ad4b017e7b786cfff730585172 Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-08-10MLBEDSW-7832: test_tflite_model_semantic converting array to scalarWilliam Isaksson
- now only converts array directly if ndim==0 Signed-off-by: William Isaksson <william.isaksson@arm.com> Change-Id: Id23e419bc7dd717f9694013180d4609819fd2f56
2023-08-09MLBEDSW-7754: Performance estimator is not using write/read shapes3.9.0.rc1William Isaksson
- npu_performance now uses write/read shapes instead of using ifm/ofms for memory cycle estimations. - also fixes a would be bug in the tflite_graph_optimiser, where one read shape is not Shape4D. Change-Id: I2067069a713d2cf9e65a5cc227e803de79940fff Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-08-09MLBEDSW-7626: Add constraint for PAD op paddingsJohan Gunnarsson
PAD input tensor shape plus paddings must equal output tensor shape. Change-Id: Icc5dea9bf6a8f6e1c8402f4d9af4d9796e8ef1aa Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
2023-08-08MLBEDSW-7689: Document verbose command stream optionsTim Hall
- Documented High-Level and register-Level command stream options - Changed High-Level command stream display to show the name of the command - Fixed an issue with some operators not being displayed by the CLI option --verbose-operators - Changed an unneeded print in pass packing to a more useful assertion Change-Id: I9d53f19f4e32d0478209bc964724c27c935f66d6 Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-08-08MLBEDSW-7656: Update Python versions in READMETim Hall
- Added Python support information - Clarified TensorFlow support information - Updated Requires-Python version to 3.8 Change-Id: Iab38a2f4480e58a1bd36d5055342c4bf7379dd09 Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-08-07MLBEDSW-7865: Vela duplicates outputsWilliam Isaksson
We now don't rewrite tensors if the tensor is already an output tensor of the current subgraph Signed-off-by: William Isaksson <william.isaksson@arm.com> Change-Id: I9cb36d830616a69d35180326437ff53bcaa62d71
2023-08-04MLBEDSW-7681: Add Vela version to output fileWilliam Isaksson
Adds Vela version to description and metadata Change-Id: I75fccd1a05a396612a249b8ec1662d8cae940ee6 Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-07-31MLBEDSW-7846: Number of CPU Ops reported is wrongWilliam Isaksson
- Added support for multiple npu subgraphs to have the same cpu output tensor Change-Id: I2e787306dd64af9b03cdf2bacb4c9ff7119f6c49 Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-07-31MLBEDSW-7397: Wrong mem_area used in schedulerwilisa01
Performance estimation now uses the parent_tensor mem_area instead of the scheduler_op mem_area, because the mem_area is only set on the parent_tensor by the scheduler. Signed-off-by: wilisa01 <william.isaksson@arm.com> Change-Id: I11f73686bfbd6958a8920c5e264a5f95cc3f23d1
2023-07-31MLBEDSW-7718: Add cmd1 payload legality checksWilliam Isaksson
- checks that cmd1 payloads are legal in register_command_stream_generator, - adds unit tests Change-Id: I2bc23147f60fe090c71703f08d9cbaa279fac86e Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-07-24MLBEDSW-7165: Update to TensorFlow 2.12William Isaksson
- Updated FlatBuffers files using TensorFlow 2.12.0 schema - Added restriction for UnidirectionalSequenceLSTM to have 2D recurrent weights to handle that diagonal_recurrent_tensors attr is not currently supported. Change-Id: I104fd1f52485b9b83d644772dbcdeea2d17585f0 Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-07-12MLBEDSW-7756: MLCE: Grouped convolutions runtime problemTim Hall
- Added graph optimiser function to convert convolution groups into a split followed by separate convolutions and then a concat - Added semantic check for convolution groups - Added unit tests for convolution groups semantic checks - Fixed a minor typing issue with test_constraint_stride_range Change-Id: I78ade408aa23469a79c9f517c4751da8619b77a9 Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-07-11MLBEDSW-7653: Extend Mean support for depth axisAlexander Hansson
If any of H,W axes have shape 1, the IFM can be reshaped to support reduction over the depth axis. Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com> Change-Id: I432ff1c399b7cee4ca5f0a8f4461e9c0a936d804
2023-07-11MLBEDSW-7652: Add mean support for batch and channel when shape is 1Alexander Hansson
- Add support for batch and depth channels when shape is 1 - Refactor reshaping in convert_mean_to_depthwise_conv Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com> Change-Id: If663395934ab58c76ba92b6ebaaf484a389ae699
2023-07-11MLBEDSW-7728: Fix DMA_WAITs in register_command_stream_generatorAlexander Hansson
* Fix bug in register_command_stream_generator where certain high-level command streams resulted in missing DMA_WAIT commands * Add unit-tests for DMA_WAIT and KERNEL_WAIT commands Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com> Change-Id: Iabb3ea3e95fa1ef933c50356d047b6b3f5aeafe3
2023-07-10MLBEDSW-7833: MLCE: Fixed output diff for reshape opJohan Alfven
- In order to reduce memory usage, the live range mechanism have logic to check if the ifm tensor can be reused for the ofm tensor for certain operators - In this failing test case, the input to the reshape/memcpy operator has more than one consumer and this results in a faulty memory overwrite since there are missing logic that should check the ifm consumers for the memcpy operator - The fix is to add the missing logic that ifm can only have one consumer Change-Id: I2184c0f905b554f648c9732734098509e23b537c Signed-off-by: Johan Alfven <johan.alfven@arm.com>
2023-07-10MLBEDSW-7752: setting query shapes to Shape4D(0)William Isaksson
Changes query initialization shapes to Shape4D(0,0,0,0) = [0,0,0,0] instead of Shape4D(0) = [0,1,1,1]. The [0,1,1,1] tensors would affect performance estimates and are not real. Change-Id: Ic83b6f6a70c0c904b500f62756e1e125c99856c6 Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-07-06MLBEDSW-7832: test_tflite_model_semantic converting array to scalarTim Hall
- The problem is that the axis value can be either a scalar or an array containing a single element - The solution is to check the length of the shape because the size attribute returns the same value for both cases - This did not show up before because pytest warnings were not being treated as errors - Removed pre-commit pytest option that caused tests to be searched for from the root directory - Updated pyproject.toml pytest options to explicitly specify the test directories, and to treat warnings as errors Change-Id: I037054768e5c34f253b6062eadba1c3419ff65e4
2023-06-28MLBEDSW-7716: Improve register level unit testsAlexander Hansson
* Improve check_cmd functions to return position of the checked commands. * Update existing unit-tests to validate ordering of commands. Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com> Change-Id: I492487d768e1e80f6ea366e29f2f99441e4f9797
2023-06-20MLBEDSW-7449: Add function description and type annotationsRaul Farkas
Add function description and type annotations to the optimization functions missing them. Fix type annotation issue when re-assigning variable value to a different type. Change-Id: I1ee442ff7a29cc07708fdd013430131eff599dd5 Signed-off-by: Raul Farkas <raul.farkas@arm.com>
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