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authorTim Hall <tim.hall@arm.com>2020-08-28 18:33:38 +0100
committerTim Hall <tim.hall@arm.com>2020-08-28 19:10:29 +0100
commitd775e37669061824b1e7b9976611cf8cd1d0cf9e (patch)
tree0317c3d02fdc5645b559d6da90e0c203a4d103c3 /ethosu/vela/softmax.py
parent237d72d80259d2e94f36e952eb0776fc5785f6f8 (diff)
downloadethos-u-vela-d775e37669061824b1e7b9976611cf8cd1d0cf9e.tar.gz
MLBEDSW-2900: softmax output diff on FPGA
- Corrected the rounding mode for softmax Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: If136491c7668e85fba1e2c56c8cff11aa32db328
Diffstat (limited to 'ethosu/vela/softmax.py')
-rw-r--r--ethosu/vela/softmax.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/ethosu/vela/softmax.py b/ethosu/vela/softmax.py
index 7c23f472..2834f8c2 100644
--- a/ethosu/vela/softmax.py
+++ b/ethosu/vela/softmax.py
@@ -257,6 +257,7 @@ class SoftMax:
# PASS 2 - SHR
shr2_op = Operation("SHR", self.op.name + "_shr2")
+ shr2_op.attrs["rounding_mode"] = b"NATURAL"
shr2_op.add_input_tensor(ifm_exp)
shr2_op.add_input_tensor(
create_const_tensor(
@@ -454,6 +455,7 @@ class SoftMax:
# PASS 30 - SHR
shr30_op = Operation("SHR", self.op.name + "_shr30")
+ shr30_op.attrs["rounding_mode"] = b"NATURAL"
shr30_op.add_input_tensor(scaled_exp)
shr30_op.add_input_tensor(right_shift)
shr30_op.set_output_tensor(ofm)