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authorFredrik Svedberg <fredrik.svedberg@arm.com>2020-08-18 13:19:18 +0200
committertim.hall <tim.hall@arm.com>2020-08-21 15:22:05 +0000
commit1575b9413de2569de25bb2520b898a91f24ad3b0 (patch)
tree13ecfc66b104d135c8c58b0236ee1aca17c9f109 /ethosu/vela/register_command_stream_generator.py
parent1cdc4675bab71c8a8d15b1687790954dab42ddd1 (diff)
downloadethos-u-vela-1575b9413de2569de25bb2520b898a91f24ad3b0.tar.gz
[MLBEDSW-2730] Implement LUT generation for softmax uint8/int8
Implemented LUT generation for softmax uint8/int8 to match the reference. Change-Id: Ib9acaa295ee1066591e800023d75f364520b44c1 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Diffstat (limited to 'ethosu/vela/register_command_stream_generator.py')
-rw-r--r--ethosu/vela/register_command_stream_generator.py3
1 files changed, 1 insertions, 2 deletions
diff --git a/ethosu/vela/register_command_stream_generator.py b/ethosu/vela/register_command_stream_generator.py
index 013128b4..7b1e9a69 100644
--- a/ethosu/vela/register_command_stream_generator.py
+++ b/ethosu/vela/register_command_stream_generator.py
@@ -50,7 +50,6 @@ from .numeric_util import quantise_float32
from .numeric_util import round_away_zero
from .numeric_util import round_up_to_int
from .operation import NpuBlockType
-from .shared_buffer_allocation import SharedBufferAllocation
from .tensor import MemType
from .tensor import TensorBlockTraversal
from .tensor import TensorFormat
@@ -837,7 +836,7 @@ def generate_register_command_stream(nng, sg, arch, verbose=False):
lut_index = int(activation.LUT_START.value) + primary_op.attrs.get("lut_index", -1)
assert activation.LUT_START.value <= lut_index <= activation.LUT_END.value, "LUT index out of range."
if cmd.ofm_tensor.dtype == DataType.int32:
- lut_index |= (3 << 12) # Force I8 range
+ lut_index |= 3 << 12 # Force I8 range
emit.cmd0_with_param(cmd0.NPU_SET_ACTIVATION, lut_index)
faf_min = ofm_quant_qmin
faf_max = ofm_quant_qmax