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author | Tim Hall <tim.hall@arm.com> | 2022-03-16 16:31:57 +0000 |
---|---|---|
committer | tim.hall <tim.hall@arm.com> | 2022-03-21 18:50:48 +0000 |
commit | 3c5cfe9e110b402f60fa7e1cdd5aa5e1c31bd511 (patch) | |
tree | c5db3f145a097293cacaaee4112cc30be3670b4c /ethosu/vela/high_level_command_to_npu_op.py | |
parent | 845e23200d471e44f274940846e400d170b5ff37 (diff) | |
download | ethos-u-vela-3c5cfe9e110b402f60fa7e1cdd5aa5e1c31bd511.tar.gz |
MLBEDSW-6298: MLCE: Unable to find a valid block config
- Fixed a bug due to ResizeBilinear modifying the attributes of a
shared IFM
- The ifm_resampling_mode is now an attribute of an operator rather
than a tensor
- Changed all calls to try_block_config() to use the attribute rather
than recalculating it in multiple places
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I4641e9cd6b049bd4186776d98e3e751c5e5bcc06
Diffstat (limited to 'ethosu/vela/high_level_command_to_npu_op.py')
-rw-r--r-- | ethosu/vela/high_level_command_to_npu_op.py | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/ethosu/vela/high_level_command_to_npu_op.py b/ethosu/vela/high_level_command_to_npu_op.py index f7c91aa2..c8221320 100644 --- a/ethosu/vela/high_level_command_to_npu_op.py +++ b/ethosu/vela/high_level_command_to_npu_op.py @@ -49,6 +49,7 @@ from .architecture_features import ArchitectureFeatures from .data_type import DataType from .debug_database import DebugDatabase from .errors import UnsupportedFeatureError +from .ethos_u55_regs.ethos_u55_regs import resampling_mode from .high_level_command_stream import Box from .high_level_command_stream import Command from .high_level_command_stream import DMA @@ -104,6 +105,14 @@ elementwise_op_map = { } +# inverse of the resampling_mode_map in the register command stream generator +resampling_mode_inv_map = { + resampling_mode.NONE: NpuResamplingMode.NONE, + resampling_mode.NEAREST: NpuResamplingMode.NEAREST, + resampling_mode.TRANSPOSE: NpuResamplingMode.TRANSPOSE, +} + + def ifm_ifm2_correct_order(ifm_shape: List[int], ifm2_shape: List[int]) -> bool: if ifm_shape == []: # Scalar needs to be in IFM2 @@ -193,17 +202,6 @@ def get_mem_limits_for_regions(arch: ArchitectureFeatures) -> Dict[int, int]: return mem_limits -def get_upscale(op: Operation) -> NpuResamplingMode: - upscale = NpuResamplingMode.NONE - if op.type == Op.ResizeBilinear: - # perform nearest neighbor upscale - upscale = NpuResamplingMode.NEAREST - elif op.type == Op.Conv2DBackpropInputSwitchedBias: - # perform insert zero upscale - upscale = NpuResamplingMode.TRANSPOSE - return upscale - - def get_double_buffer_offset(arch: ArchitectureFeatures, range_index: int, core: int) -> int: """Returns 0 if the first half of a double buffer should be used, 1 if the second half should be used""" return ((range_index - core) // arch.ncores) % 2 @@ -409,7 +407,7 @@ def set_common_op_fields(npu_op: NpuBlockOperation, cmd: NpuStripe, arch: Archit if not op.type.is_elementwise_op(): npu_op.padding = create_padding(cmd, op) npu_op.kernel = to_npu_kernel(op.kernel) - npu_op.ifm_upscale = get_upscale(op) + npu_op.ifm_upscale = resampling_mode_inv_map[op.ifm_resampling_mode] return npu_op |