From e87446c9ce7f6cbefcd7bbaff324eebdca10687e Mon Sep 17 00:00:00 2001 From: Mikael Olsson Date: Fri, 15 Dec 2023 17:17:06 +0100 Subject: Change PMU event counter values to use 64-bit The PMU event counter value is an accumulation of 32-bit values during the inference and to ensure the total value fits in the rpmsg message and UAPI, the variable holding the value has been changed to 64-bit. The driver library, Python wrapper and inference runner have been changed accordingly to support the 64-bit values. Change-Id: I09a8e45eb75800c8a787f83abff5a3693148cc15 Signed-off-by: Mikael Olsson --- kernel/ethosu_core_rpmsg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'kernel/ethosu_core_rpmsg.h') diff --git a/kernel/ethosu_core_rpmsg.h b/kernel/ethosu_core_rpmsg.h index 8d2c51d..0b7feab 100644 --- a/kernel/ethosu_core_rpmsg.h +++ b/kernel/ethosu_core_rpmsg.h @@ -135,7 +135,7 @@ struct ethosu_core_msg_inference_rsp { uint32_t ofm_size[ETHOSU_CORE_BUFFER_MAX]; uint32_t status; uint8_t pmu_event_config[ETHOSU_CORE_PMU_MAX]; - uint32_t pmu_event_count[ETHOSU_CORE_PMU_MAX]; + uint64_t pmu_event_count[ETHOSU_CORE_PMU_MAX]; uint32_t pmu_cycle_counter_enable; uint64_t pmu_cycle_counter_count; }; -- cgit v1.2.1