From f521be94ac5017dc6be02e6344aef2bd68dc8343 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jonny=20Sv=C3=A4rd?= <jonny.svaerd@arm.com>
Date: Mon, 1 Mar 2021 14:35:49 +0100
Subject: Rename .bss.NoInit section to .bss.tensor_arena

Change-Id: I660cd5d2bc73eaf589598c4f0570f5e9293de28d
---
 targets/corstone-300/platform.ld      | 6 +++---
 targets/corstone-300/platform.scatter | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

(limited to 'targets')

diff --git a/targets/corstone-300/platform.ld b/targets/corstone-300/platform.ld
index 9365756..a1cdb0e 100644
--- a/targets/corstone-300/platform.ld
+++ b/targets/corstone-300/platform.ld
@@ -253,7 +253,7 @@ SECTIONS
   .sram :
   {
     . = ALIGN(16);
-    *(.bss.NoInit)
+    *(.bss.tensor_arena)
     . = ALIGN(16);
   } > SRAM AT > SRAM
 #else
@@ -264,10 +264,10 @@ SECTIONS
     . = ALIGN(16);
   } > SRAM AT > SRAM
 
-  .bss.NoInit :
+  .bss.tensor_arena :
   {
     . = ALIGN(16);
-    *(.bss.NoInit)
+    *(.bss.tensor_arena)
     . = ALIGN(16);
   } > DDR AT > DDR
 #endif
diff --git a/targets/corstone-300/platform.scatter b/targets/corstone-300/platform.scatter
index b8d5495..dc8f57b 100644
--- a/targets/corstone-300/platform.scatter
+++ b/targets/corstone-300/platform.scatter
@@ -1,7 +1,7 @@
 #! cpp
 
 /*
- * Copyright (c) 2019-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -113,7 +113,7 @@ APP_IMAGE LR_START LR_SIZE
     {
 #ifndef ETHOSU_FAST_MEMORY_SIZE
         ; Place tensor arena in SRAM if we do not have a fast memory area
-        * (.bss.NoInit) ; Tensor Arena
+        * (.bss.tensor_arena)
 #else
         * (.bss.ethosu_scratch)
 #endif
@@ -148,7 +148,7 @@ LOAD_REGION_1 DDR_START DDR_SIZE
     ; Place tensor arena in DRAM if we have a fast memory area
     ARENA +0 UNINIT ALIGN 16
     {
-        * (.bss.NoInit) ; Tensor Arena
+        * (.bss.tensor_arena)
     }
 #endif
 #endif
-- 
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