From 991af2bd8fb6c79dfb317837353857f34a727b17 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonny=20Sv=C3=A4rd?= Date: Thu, 15 Apr 2021 17:31:01 +0200 Subject: Enable MPU and CPU cache for Corstone-300 - Enable CPU instruction- and data cache by default. - Add a CMake option to turn CPU cache on/off. - Add basic MPU configuration for memory areas. Make the code segment RO (NS address' are reachable from secure state, hence MPU config entries for both S and NS address of ITCM). - Target latest NPU API version Change-Id: Ie9bf2f02e5ad534375d146804fdc66b9f2f6770f Change-Id: I9def430d1e61d18e521798db4f48ed0a8c58380e --- targets/corstone-300/CMakeLists.txt | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'targets/corstone-300/CMakeLists.txt') diff --git a/targets/corstone-300/CMakeLists.txt b/targets/corstone-300/CMakeLists.txt index 538a978..e791cfd 100644 --- a/targets/corstone-300/CMakeLists.txt +++ b/targets/corstone-300/CMakeLists.txt @@ -28,6 +28,8 @@ endif() set(ETHOSU_COMMAND_DEFAULT ${CMAKE_CURRENT_SOURCE_DIR}/../../scripts/run_ctest.py -t corstone-300) +option(CPU_CACHE_ENABLE "Enable CPU instruction- and data cache" ON) + ############################################################################# # Project ############################################################################# @@ -59,6 +61,11 @@ target_compile_definitions(ethosu_target_common INTERFACE ETHOSU_NPU_TA_COUNT=${ETHOSU_TARGET_NPU_TA_COUNT} ETHOSU_NPU_COUNT=${ETHOSU_TARGET_NPU_COUNT}) +if (CPU_CACHE_ENABLE) + target_compile_definitions(ethosu_target_common INTERFACE + CPU_CACHE_ENABLE) +endif() + # Linker script ethosu_target_link_options(ethosu_target_link INTERFACE LINK_FILE platform @@ -68,7 +75,8 @@ ethosu_target_link_options(ethosu_target_link INTERFACE target_sources(ethosu_target_startup INTERFACE retarget.c uart.c - target.cpp) + target.cpp + mpu.cpp) target_compile_definitions(ethosu_core_driver PUBLIC ETHOSU) target_link_libraries(ethosu_target_startup INTERFACE ethosu_core_driver timing_adapter) -- cgit v1.2.1