From 01c32d4768d8176a32c193f44069da1f43fbf513 Mon Sep 17 00:00:00 2001
From: Kristofer Jonsson <kristofer.jonsson@arm.com>
Date: Tue, 18 Oct 2022 11:34:23 +0200
Subject: Configure write-through caching for Corstone-310 BRAM

Change-Id: I5e0fc2ecbbf416ca07be6b9d65e989c1c116b219
---
 drivers/mpu/include/mpu.hpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'drivers/mpu/include/mpu.hpp')

diff --git a/drivers/mpu/include/mpu.hpp b/drivers/mpu/include/mpu.hpp
index dff73b6..9f85788 100644
--- a/drivers/mpu/include/mpu.hpp
+++ b/drivers/mpu/include/mpu.hpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2020-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,7 +29,7 @@
 namespace EthosU {
 namespace Mpu {
 
-enum { WTRA_index, WBWARA_index };
+enum { WTRA_index, WBWARA_index, WTWARA_index };
 
 /**
  * Dump the MPU tables.
-- 
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