From d188e902d7002ec748a3ac963db8b3b195fce499 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Johan=20Alfv=C3=A9n?= <johan.alfven@arm.com>
Date: Thu, 3 Mar 2022 09:07:51 +0100
Subject: Update ld script for corstone-300

Make sure that BRAM data is stored with correct aligment in DDR.
The BRAM data is copied from DDR by the .copy.table and if alignment
is not correct the BRAM data will be corrupt.

Change-Id: I0e8cd9d1ebdc9e8428ddcc9c842411ca40724740
---
 targets/corstone-300/platform.ld | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/targets/corstone-300/platform.ld b/targets/corstone-300/platform.ld
index d373970..76cb29c 100644
--- a/targets/corstone-300/platform.ld
+++ b/targets/corstone-300/platform.ld
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2022 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -278,9 +278,10 @@ SECTIONS
     *(network_model_sec)
 #endif
     * (expected_output_data_sec)
+    . = ALIGN(4);
   } > DDR :rom_dram
 
-  __eddr_data = ALIGN (16) ;
+  __eddr_data = ALIGN (4) ;
   .sram.data : {
     __sram_data_start__ = .;
     *(.sram.data)
-- 
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