diff options
| -rw-r--r-- | targets/corstone-300/target.cpp | 4 | ||||
| -rw-r--r-- | targets/corstone-310/target.cpp | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/targets/corstone-300/target.cpp b/targets/corstone-300/target.cpp index 8f8db83..f186ddf 100644 --- a/targets/corstone-300/target.cpp +++ b/targets/corstone-300/target.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021 Arm Limited. All rights reserved. + * SPDX-FileCopyrightText: Copyright 2020-2021, 2023 Arm Limited and/or its affiliates <open-source-office@arm.com> * * SPDX-License-Identifier: Apache-2.0 * @@ -43,6 +43,7 @@ using namespace EthosU; #define ETHOSU_BASE_ADDRESS 0x48102000 #define ETHOSU_IRQ 56 +#define ETHOSU_IRQ_PRIORITY 5 #define ETHOSU0_TA0_BASE_ADDRESS 0x48103000 #define ETHOSU0_TA1_BASE_ADDRESS 0x48103200 @@ -312,6 +313,7 @@ void targetSetup() { // Assumes SCB->VTOR point to RW memory NVIC_SetVector(static_cast<IRQn_Type>(ETHOSU_IRQ), (uint32_t)ðosuIrqHandler); + NVIC_SetPriority(static_cast<IRQn_Type>(ETHOSU_IRQ), ETHOSU_IRQ_PRIORITY); NVIC_EnableIRQ(static_cast<IRQn_Type>(ETHOSU_IRQ)); #endif diff --git a/targets/corstone-310/target.cpp b/targets/corstone-310/target.cpp index a91bc67..915ba0d 100644 --- a/targets/corstone-310/target.cpp +++ b/targets/corstone-310/target.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022 Arm Limited. All rights reserved. + * SPDX-FileCopyrightText: Copyright 2020-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> * * SPDX-License-Identifier: Apache-2.0 * @@ -43,6 +43,7 @@ using namespace EthosU; #define ETHOSU_BASE_ADDRESS 0x50004000 #define ETHOSU_IRQ 16 +#define ETHOSU_IRQ_PRIORITY 5 #define ETHOSU0_TA0_BASE_ADDRESS 0x58103000 #define ETHOSU0_TA1_BASE_ADDRESS 0x58103200 @@ -316,6 +317,7 @@ void targetSetup() { // Assumes SCB->VTOR point to RW memory NVIC_SetVector(static_cast<IRQn_Type>(ETHOSU_IRQ), (uint32_t)ðosuIrqHandler); + NVIC_SetPriority(static_cast<IRQn_Type>(ETHOSU_IRQ), ETHOSU_IRQ_PRIORITY); NVIC_EnableIRQ(static_cast<IRQn_Type>(ETHOSU_IRQ)); #endif |