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author | Johan Alfvén <johan.alfven@arm.com> | 2022-03-03 09:07:51 +0100 |
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committer | Johan Alfvén <johan.alfven@arm.com> | 2022-03-03 09:44:47 +0100 |
commit | d188e902d7002ec748a3ac963db8b3b195fce499 (patch) | |
tree | c182d4f96c41832069efac4415968986be0864c9 /targets | |
parent | 456dbb742d1b04c346047b18c993b5e7cd699aba (diff) | |
download | ethos-u-core-platform-d188e902d7002ec748a3ac963db8b3b195fce499.tar.gz |
Update ld script for corstone-300
Make sure that BRAM data is stored with correct aligment in DDR.
The BRAM data is copied from DDR by the .copy.table and if alignment
is not correct the BRAM data will be corrupt.
Change-Id: I0e8cd9d1ebdc9e8428ddcc9c842411ca40724740
Diffstat (limited to 'targets')
-rw-r--r-- | targets/corstone-300/platform.ld | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/targets/corstone-300/platform.ld b/targets/corstone-300/platform.ld index d373970..76cb29c 100644 --- a/targets/corstone-300/platform.ld +++ b/targets/corstone-300/platform.ld @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. + * Copyright (c) 2009-2022 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -278,9 +278,10 @@ SECTIONS *(network_model_sec) #endif * (expected_output_data_sec) + . = ALIGN(4); } > DDR :rom_dram - __eddr_data = ALIGN (16) ; + __eddr_data = ALIGN (4) ; .sram.data : { __sram_data_start__ = .; *(.sram.data) |