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author | Ledion Daja <ledion.daja@arm.com> | 2023-08-15 13:32:07 +0200 |
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committer | Ledion Daja <ledion.daja@arm.com> | 2023-09-25 11:37:14 +0000 |
commit | 204210b1074071532627da9dc69950d058a809f4 (patch) | |
tree | 9be7873a5e090ee506da867f9b194dfb2d9ea987 /targets/corstone-300/target.cpp | |
parent | ca4c342dc38385b081c1e4aeee3880ea1aaaf3b5 (diff) | |
download | ethos-u-core-platform-204210b1074071532627da9dc69950d058a809f4.tar.gz |
Fix minor typos and naming in comments
Change-Id: Ie0c57c520d591016855239a502eaf74d23b418fe
Signed-off-by: Ledion Daja <ledion.daja@arm.com>
Diffstat (limited to 'targets/corstone-300/target.cpp')
-rw-r--r-- | targets/corstone-300/target.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/targets/corstone-300/target.cpp b/targets/corstone-300/target.cpp index f186ddf..f52a5db 100644 --- a/targets/corstone-300/target.cpp +++ b/targets/corstone-300/target.cpp @@ -252,7 +252,7 @@ void HardFault_Handler() { struct ExcContext *e; uint32_t sp; - asm volatile("mrs %0, ipsr \n" // Read IPSR (Exceptio number) + asm volatile("mrs %0, ipsr \n" // Read IPSR (Exception number) "sub %0, #16 \n" // Get it into IRQn_Type range "tst lr, #4 \n" // Select the stack which was in use "ite eq \n" |