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author | Jonny Svärd <jonny.svaerd@arm.com> | 2021-08-27 17:54:54 +0200 |
---|---|---|
committer | Kristofer Jonsson <kristofer.jonsson@arm.com> | 2021-09-07 09:23:20 +0000 |
commit | ce05c41cec3ec68460f377dd63b567b60f070527 (patch) | |
tree | 4818b9b70e49da569ca365b98da1122426d247f5 /applications/trustzone_inference | |
parent | 4756bf12f9dbe6502b3831808d7e4f217586980a (diff) | |
download | ethos-u-core-platform-ce05c41cec3ec68460f377dd63b567b60f070527.tar.gz |
Remove designated initializers
Designated initializer support only arrived in C++20
standard. While most compilers will support it through
extensions, remove them to increase portability.
Change-Id: I31d885597b0d29a3cf67d5450d988805016a0d2d
Diffstat (limited to 'applications/trustzone_inference')
-rw-r--r-- | applications/trustzone_inference/secure/main_secure.cpp | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/applications/trustzone_inference/secure/main_secure.cpp b/applications/trustzone_inference/secure/main_secure.cpp index 09e1638..df22929 100644 --- a/applications/trustzone_inference/secure/main_secure.cpp +++ b/applications/trustzone_inference/secure/main_secure.cpp @@ -69,22 +69,22 @@ static int setup_sram0_mpc(const uint32_t baseaddr_s, /* Secure base address */ const char *mem_name = "SRAM0"; /* Secure range */ - const struct mpc_sie_memory_range_t mpc_range_s = {.base = SRAM0_BASE_S, - .limit = SRAM0_BASE_S + SRAM0_SIZE - 1, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE}; + const struct mpc_sie_memory_range_t mpc_range_s = {/* base */ SRAM0_BASE_S, + /* limit */ SRAM0_BASE_S + SRAM0_SIZE - 1, + /* range_offset */ 0, + /* attr */ MPC_SIE_SEC_ATTR_SECURE}; /* Non secure range */ - const struct mpc_sie_memory_range_t mpc_range_ns = {.base = SRAM0_BASE_NS, - .limit = SRAM0_BASE_NS + SRAM0_SIZE - 1, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE}; + const struct mpc_sie_memory_range_t mpc_range_ns = {/* base */ SRAM0_BASE_NS, + /* limit */ SRAM0_BASE_NS + SRAM0_SIZE - 1, + /* range_offset */ 0, + /* attr */ MPC_SIE_SEC_ATTR_NONSECURE}; /* Consolidated ranges */ const struct mpc_sie_memory_range_t *mpc_range_list[N_MEM_RANGES] = {&mpc_range_s, &mpc_range_ns}; /* MPC device configuration controller */ - const struct mpc_sie_dev_cfg_t mpc_dev_cfg = {.base = SRAM0_MPC}; + const struct mpc_sie_dev_cfg_t mpc_dev_cfg = {SRAM0_MPC}; /* MPC device data */ struct mpc_sie_dev_data_t mpc_dev_data = {0}; @@ -136,22 +136,22 @@ static int setup_bram_mpc(const uint32_t baseaddr_s, /* Secure base address */ const char *mem_name = "BRAM"; /* Secure range */ - const struct mpc_sie_memory_range_t mpc_range_s = {.base = BRAM_BASE_S, - .limit = BRAM_BASE_S + BRAM_TOTAL_SIZE - 1, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE}; + const struct mpc_sie_memory_range_t mpc_range_s = {/* base */ BRAM_BASE_S, + /* limit */ BRAM_BASE_S + BRAM_TOTAL_SIZE - 1, + /* range_offset */ 0, + /* attr */ MPC_SIE_SEC_ATTR_SECURE}; /* Non secure range */ - const struct mpc_sie_memory_range_t mpc_range_ns = {.base = BRAM_BASE_NS, - .limit = BRAM_BASE_NS + BRAM_TOTAL_SIZE - 1, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE}; + const struct mpc_sie_memory_range_t mpc_range_ns = {/* base */ BRAM_BASE_NS, + /* limit */ BRAM_BASE_NS + BRAM_TOTAL_SIZE - 1, + /* range_offset */ 0, + /* attr */ MPC_SIE_SEC_ATTR_NONSECURE}; /* Consolidated ranges */ const struct mpc_sie_memory_range_t *mpc_range_list[N_MEM_RANGES] = {&mpc_range_s, &mpc_range_ns}; /* MPC device configuration controller */ - const struct mpc_sie_dev_cfg_t mpc_dev_cfg = {.base = BRAM_MPC}; + const struct mpc_sie_dev_cfg_t mpc_dev_cfg = {BRAM_MPC}; /* MPC device data */ struct mpc_sie_dev_data_t mpc_dev_data = {0}; |