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authorAnton Moberg <anton.moberg@arm.com>2021-04-08 09:50:57 +0200
committerKristofer Jonsson <kristofer.jonsson@arm.com>2021-04-21 11:52:19 +0000
commit908a07c61db978679a11a0f4ee023dc3c6aabffd (patch)
treef89e7ac6cea84695813783b579be144862886473 /applications/trustzone_inference/corstone-300
parent2faaf409e57254fc0479695319b05f98a3de4821 (diff)
downloadethos-u-core-platform-908a07c61db978679a11a0f4ee023dc3c6aabffd.tar.gz
Fix formatting
Fixed code formatting Change-Id: I12df8da14a7100706f20ffb084ca8477928d0005
Diffstat (limited to 'applications/trustzone_inference/corstone-300')
-rw-r--r--applications/trustzone_inference/corstone-300/partition_ARMCM55.h2
-rw-r--r--applications/trustzone_inference/corstone-300/trustzone.h16
2 files changed, 9 insertions, 9 deletions
diff --git a/applications/trustzone_inference/corstone-300/partition_ARMCM55.h b/applications/trustzone_inference/corstone-300/partition_ARMCM55.h
index 8e5c96b..57016d4 100644
--- a/applications/trustzone_inference/corstone-300/partition_ARMCM55.h
+++ b/applications/trustzone_inference/corstone-300/partition_ARMCM55.h
@@ -1,4 +1,4 @@
-/**************************************************************************//**
+/****************************************************************************
* @file partition_ARMCM55.h
* @brief CMSIS-CORE Initial Setup for Secure / Non-Secure Zones for Armv8.1-M Mainline
* @version V1.0.0
diff --git a/applications/trustzone_inference/corstone-300/trustzone.h b/applications/trustzone_inference/corstone-300/trustzone.h
index 70fe717..9f145c3 100644
--- a/applications/trustzone_inference/corstone-300/trustzone.h
+++ b/applications/trustzone_inference/corstone-300/trustzone.h
@@ -90,14 +90,14 @@
#define BRAM_TOTAL_SIZE 0x00200000
#define BRAM_MPC 0x57000000
-#define SRAM0_BASE_S 0x31000000
-#define SRAM0_BASE_NS 0x21000000
-#define SRAM0_SIZE 0x00200000
-#define SRAM0_MPC 0x50083000
+#define SRAM0_BASE_S 0x31000000
+#define SRAM0_BASE_NS 0x21000000
+#define SRAM0_SIZE 0x00200000
+#define SRAM0_MPC 0x50083000
-#define DDR0_BASE_S 0x70000000
-#define DDR0_BASE_NS 0x60000000
-#define DDR0_SIZE 0x02000000
+#define DDR0_BASE_S 0x70000000
+#define DDR0_BASE_NS 0x60000000
+#define DDR0_SIZE 0x02000000
#ifdef TRUSTZONE_BUILD
#define DDR_START DDR0_BASE_S
@@ -105,7 +105,7 @@
#define DDR_START DDR0_BASE_NS
#endif
/* Separate DDRs for secure and nonsecure */
-#define DDR_SIZE DDR0_SIZE
+#define DDR_SIZE DDR0_SIZE
#if (S_TZ_ITCM_SIZE + TZ_NS_ITCM_SIZE) > ITCM_TOTAL_SIZE
#error Missconfigured ITCM memory