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authorNir Ekhauz <nir.ekhauz@arm.com>2021-10-04 12:21:17 +0300
committerNir Ekhauz <nir.ekhauz@arm.com>2021-10-18 12:21:37 +0300
commita58edd81f99bb0516d7043f61488f579ef89a337 (patch)
tree44db8406bea331fd46a92d334cb85dd524ae967e
parent52fddd00d0eb547d41074046c9f587a3a0679298 (diff)
downloadethos-u-core-platform-a58edd81f99bb0516d7043f61488f579ef89a337.tar.gz
Configure timing adapter in run_platform.py
Change-Id: Ib108298417980a586bed8c8b4e0bb5e57f238316
-rwxr-xr-xscripts/run_platform.py78
-rw-r--r--targets/corstone-300/CMakeLists.txt11
-rw-r--r--targets/corstone-300/target.cpp114
3 files changed, 198 insertions, 5 deletions
diff --git a/scripts/run_platform.py b/scripts/run_platform.py
index bb2f06f..a39de8b 100755
--- a/scripts/run_platform.py
+++ b/scripts/run_platform.py
@@ -39,19 +39,73 @@ def run_cmd(cmd, **kwargs):
print(f"Running command: {cmd_str}")
return subprocess.run(cmd, check=True, **kwargs)
-def build_core_platform(output_folder, target, toolchain, memory_model, memory_arena, pmu):
+def ta_parse_raw(ta_raw):
+ ta_parsed = [-1, -1]
+ if ta_raw:
+ for v in ta_raw:
+ index = v[0]
+ value = v[1]
+ if (index > 1):
+ raise Exception("Illegal index value - Should be '0' or '1'")
+ (ta_parsed)[index] = value
+
+ return ta_parsed
+
+def build_core_platform(output_folder, target, toolchain, memory_model, memory_arena, pmu,
+ ta_maxr, ta_maxw, ta_maxrw, ta_rlatency, ta_wlatency,
+ ta_pulse_on, ta_pulse_off, ta_bwcap, ta_perfctrl, ta_perfcnt,
+ ta_mode, ta_histbin, ta_histcnt):
build_folder = output_folder/"model"/"build"
+ maxr = ta_parse_raw(ta_maxr)
+ maxw = ta_parse_raw(ta_maxw)
+ maxrw = ta_parse_raw(ta_maxrw)
+ rlatency = ta_parse_raw(ta_rlatency)
+ wlatency = ta_parse_raw(ta_wlatency)
+ pulse_on = ta_parse_raw(ta_pulse_on)
+ pulse_off = ta_parse_raw(ta_pulse_off)
+ bwcap = ta_parse_raw(ta_bwcap)
+ perfctrl = ta_parse_raw(ta_perfctrl)
+ perfcnt = ta_parse_raw(ta_perfcnt)
+ mode = ta_parse_raw(ta_mode)
+ histbin = ta_parse_raw(ta_histbin)
+ histcnt = ta_parse_raw(ta_histcnt)
cmake_cmd = ["cmake",
CORE_PLATFORM_PATH/"targets"/target,
f"-B{build_folder}",
f"-DCMAKE_TOOLCHAIN_FILE={CORE_PLATFORM_PATH/'cmake'/'toolchain'/(toolchain + '.cmake')}",
f"-DBAREMETAL_PATH={output_folder}",
f"-DMEMORY_MODEL={memory_model}",
- f"-DMEMORY_ARENA={memory_arena}"]
+ f"-DMEMORY_ARENA={memory_arena}",
+ f"-DETHOSU_TA_MAXR_0={maxr[0]}",
+ f"-DETHOSU_TA_MAXR_1={maxr[1]}",
+ f"-DETHOSU_TA_MAXW_0={maxw[0]}",
+ f"-DETHOSU_TA_MAXW_1={maxw[1]}",
+ f"-DETHOSU_TA_MAXRW_0={maxrw[0]}",
+ f"-DETHOSU_TA_MAXRW_1={maxrw[1]}",
+ f"-DETHOSU_TA_RLATENCY_0={rlatency[0]}",
+ f"-DETHOSU_TA_RLATENCY_1={rlatency[1]}",
+ f"-DETHOSU_TA_WLATENCY_0={wlatency[0]}",
+ f"-DETHOSU_TA_WLATENCY_1={wlatency[1]}",
+ f"-DETHOSU_TA_PULSE_ON_0={pulse_on[0]}",
+ f"-DETHOSU_TA_PULSE_ON_1={pulse_on[1]}",
+ f"-DETHOSU_TA_PULSE_OFF_0={pulse_off[0]}",
+ f"-DETHOSU_TA_PULSE_OFF_1={pulse_off[1]}",
+ f"-DETHOSU_TA_BWCAP_0={bwcap[0]}",
+ f"-DETHOSU_TA_BWCAP_1={bwcap[1]}",
+ f"-DETHOSU_TA_PERFCTRL_0={perfctrl[0]}",
+ f"-DETHOSU_TA_PERFCTRL_1={perfctrl[1]}",
+ f"-DETHOSU_TA_PERFCNT_0={perfcnt[0]}",
+ f"-DETHOSU_TA_PERFCNT_1={perfcnt[1]}",
+ f"-DETHOSU_TA_MODE_0={mode[0]}",
+ f"-DETHOSU_TA_MODE_1={mode[1]}",
+ f"-DETHOSU_TA_HISTBIN_0={histbin[0]}",
+ f"-DETHOSU_TA_HISTBIN_1={histbin[1]}",
+ f"-DETHOSU_TA_HISTCNT_0={histcnt[0]}",
+ f"-DETHOSU_TA_HISTCNT_1={histcnt[1]}"]
+
if pmu:
for i in range(len(pmu)):
cmake_cmd += [f"-DETHOSU_PMU_EVENT_{i}={pmu[i]}"]
-
run_cmd(cmake_cmd)
make_cmd = ["make", "-C", build_folder, f"-j{multiprocessing.cpu_count()}", "baremetal_custom"]
@@ -150,6 +204,19 @@ def main():
parser.add_argument("--pmu", type=int, action='append', help="PMU Event Counters")
parser.add_argument("--custom-input", type=pathlib.Path, help="Custom input to network")
parser.add_argument("--custom-output", type=pathlib.Path, help="Custom expected output data for network")
+ parser.add_argument("--ta-maxr", type=int, nargs=2, action='append', help="Max no. of pending reads")
+ parser.add_argument("--ta-maxw", type=int, nargs=2, action='append', help="Max no. of pending writes")
+ parser.add_argument("--ta-maxrw", type=int, nargs=2, action='append', help="Max no. of pending reads+writes")
+ parser.add_argument("--ta-rlatency", type=int, nargs=2, action='append', help="Minimum latency (clock cycles) from AVALID to RVALID")
+ parser.add_argument("--ta-wlatency", type=int, nargs=2, action='append', help="Minimum latency (clock cycles) from WVALID&WLAST to BVALID")
+ parser.add_argument("--ta-pulse_on", type=int, nargs=2, action='append', help="No. of cycles addresses let through (0-65535)")
+ parser.add_argument("--ta-pulse_off", type=int, nargs=2, action='append', help="No. of cycles addresses blocked (0-65535)")
+ parser.add_argument("--ta-bwcap", type=int, nargs=2, action='append', help="Max no. of 64-bit words transfered per pulse cycle 0=infinite")
+ parser.add_argument("--ta-perfctrl", type=int, nargs=2, action='append', help="selecting an event for event counter 0=default")
+ parser.add_argument("--ta-perfcnt", type=int, nargs=2, action='append', help="event counter")
+ parser.add_argument("--ta-mode", type=int, nargs=2, action='append', help="Max no. of pending reads")
+ parser.add_argument("--ta-histbin", type=int, nargs=2, action='append', help="Controlls which histogram bin (0-15) that should be accessed by HISTCNT")
+ parser.add_argument("--ta-histcnt", type=int, nargs=2, action='append', help="Read/write the selected histogram bin")
args = parser.parse_args()
args.output_folder.mkdir(exist_ok=True)
@@ -157,7 +224,10 @@ def main():
try:
optimize_network(args.output_folder, args.network_path, target_mapping[args.target])
generate_reference_data(args.output_folder, args.network_path, args.custom_input, args.custom_output)
- build_core_platform(args.output_folder, args.target, args.toolchain, args.memory_model, args.memory_arena, args.pmu)
+ build_core_platform(args.output_folder, args.target, args.toolchain, args.memory_model, args.memory_arena, args.pmu,
+ args.ta_maxr, args.ta_maxw, args.ta_maxrw, args.ta_rlatency, args.ta_wlatency,
+ args.ta_pulse_on, args.ta_pulse_off, args.ta_bwcap, args.ta_perfctrl, args.ta_perfcnt,
+ args.ta_mode, args.ta_histbin, args.ta_histcnt)
run_model(args.output_folder)
except subprocess.CalledProcessError as err:
print(f"Command: '{err.cmd}' failed", file=sys.stderr)
diff --git a/targets/corstone-300/CMakeLists.txt b/targets/corstone-300/CMakeLists.txt
index bd73481..12902d3 100644
--- a/targets/corstone-300/CMakeLists.txt
+++ b/targets/corstone-300/CMakeLists.txt
@@ -96,6 +96,17 @@ else()
ETHOSU_ARENA=0)
endif()
+# AXI Timing adaptors
+set(registers MAXR MAXW MAXRW RLATENCY WLATENCY PULSE_ON PULSE_OFF BWCAP PERFCTRL PERFCNT MODE HISTBIN HISTCNT)
+
+foreach(register ${registers})
+ foreach(index RANGE 0 1)
+ set(name ETHOSU_TA_${register}_${index})
+ set(${name} -1 CACHE STRING "${name}")
+ target_compile_definitions(ethosu_target_common INTERFACE ${name}=${${name}})
+ endforeach()
+endforeach()
+
# Linker script
set(LINK_FILE platform CACHE STRING "Link file")
diff --git a/targets/corstone-300/target.cpp b/targets/corstone-300/target.cpp
index 541d4a5..b780c09 100644
--- a/targets/corstone-300/target.cpp
+++ b/targets/corstone-300/target.cpp
@@ -63,10 +63,119 @@ __attribute__((aligned(16), section(".bss.ethosu_scratch"))) uint8_t ethosu_scra
struct ethosu_driver ethosu0_driver;
#endif
+/****************************************************************************
+ * Timing Adapters
+ ****************************************************************************/
+
+#if ETHOSU_TA_MAXR_0 < 0
+#define ETHOSU_TA_MAXR_0 0
+#endif
+#if ETHOSU_TA_MAXW_0 < 0
+#define ETHOSU_TA_MAXW_0 0
+#endif
+#if ETHOSU_TA_MAXRW_0 < 0
+#define ETHOSU_TA_MAXRW_0 0
+#endif
+#if ETHOSU_TA_RLATENCY_0 < 0
+#define ETHOSU_TA_RLATENCY_0 0
+#endif
+#if ETHOSU_TA_WLATENCY_0 < 0
+#define ETHOSU_TA_WLATENCY_0 0
+#endif
+#if ETHOSU_TA_PULSE_ON_0 < 0
+#define ETHOSU_TA_PULSE_ON_0 0
+#endif
+#if ETHOSU_TA_PULSE_OFF_0 < 0
+#define ETHOSU_TA_PULSE_OFF_0 0
+#endif
+#if ETHOSU_TA_BWCAP_0 < 0
+#define ETHOSU_TA_BWCAP_0 0
+#endif
+#if ETHOSU_TA_PERFCTRL_0 < 0
+#define ETHOSU_TA_PERFCTRL_0 0
+#endif
+#if ETHOSU_TA_PERFCNT_0 < 0
+#define ETHOSU_TA_PERFCNT_0 0
+#endif
+#if ETHOSU_TA_MODE_0 < 0
+#define ETHOSU_TA_MODE_0 0
+#endif
+#if ETHOSU_TA_HISTBIN_0 < 0
+#define ETHOSU_TA_HISTBIN_0 0
+#endif
+#if ETHOSU_TA_HISTCNT_0 < 0
+#define ETHOSU_TA_HISTCNT_0 0
+#endif
+
+#if ETHOSU_TA_MAXR_1 < 0
+#define ETHOSU_TA_MAXR_1 0
+#endif
+#if ETHOSU_TA_MAXW_1 < 0
+#define ETHOSU_TA_MAXW_1 0
+#endif
+#if ETHOSU_TA_MAXRW_1 < 0
+#define ETHOSU_TA_MAXRW_1 0
+#endif
+#if ETHOSU_TA_RLATENCY_1 < 0
+#define ETHOSU_TA_RLATENCY_1 0
+#endif
+#if ETHOSU_TA_WLATENCY_1 < 0
+#define ETHOSU_TA_WLATENCY_1 0
+#endif
+#if ETHOSU_TA_PULSE_ON_1 < 0
+#define ETHOSU_TA_PULSE_ON_1 0
+#endif
+#if ETHOSU_TA_PULSE_OFF_1 < 0
+#define ETHOSU_TA_PULSE_OFF_1 0
+#endif
+#if ETHOSU_TA_BWCAP_1 < 0
+#define ETHOSU_TA_BWCAP_1 0
+#endif
+#if ETHOSU_TA_PERFCTRL_1 < 0
+#define ETHOSU_TA_PERFCTRL_1 0
+#endif
+#if ETHOSU_TA_PERFCNT_1 < 0
+#define ETHOSU_TA_PERFCNT_1 0
+#endif
+#if ETHOSU_TA_MODE_1 < 0
+#define ETHOSU_TA_MODE_1 0
+#endif
+#if ETHOSU_TA_HISTBIN_1 < 0
+#define ETHOSU_TA_HISTBIN_1 0
+#endif
+#if ETHOSU_TA_HISTCNT_1 < 0
+#define ETHOSU_TA_HISTCNT_1 0
+#endif
+
static uintptr_t ethosu_ta_base_addrs[ETHOSU_NPU_COUNT][ETHOSU_NPU_TA_COUNT] = {
{ETHOSU0_TA0_BASE_ADDRESS, ETHOSU0_TA1_BASE_ADDRESS}};
struct timing_adapter ethosu_ta[ETHOSU_NPU_COUNT][ETHOSU_NPU_TA_COUNT];
-
+struct timing_adapter_settings ethosu_ta_settings[ETHOSU_NPU_TA_COUNT] = {{ETHOSU_TA_MAXR_0,
+ ETHOSU_TA_MAXW_0,
+ ETHOSU_TA_MAXRW_0,
+ ETHOSU_TA_RLATENCY_0,
+ ETHOSU_TA_WLATENCY_0,
+ ETHOSU_TA_PULSE_ON_0,
+ ETHOSU_TA_PULSE_OFF_0,
+ ETHOSU_TA_BWCAP_0,
+ ETHOSU_TA_PERFCTRL_0,
+ ETHOSU_TA_PERFCNT_0,
+ ETHOSU_TA_MODE_0,
+ ETHOSU_TA_HISTBIN_0,
+ ETHOSU_TA_HISTCNT_0},
+ {ETHOSU_TA_MAXR_1,
+ ETHOSU_TA_MAXW_1,
+ ETHOSU_TA_MAXRW_1,
+ ETHOSU_TA_RLATENCY_1,
+ ETHOSU_TA_WLATENCY_1,
+ ETHOSU_TA_PULSE_ON_1,
+ ETHOSU_TA_PULSE_OFF_1,
+ ETHOSU_TA_BWCAP_1,
+ ETHOSU_TA_PERFCTRL_1,
+ ETHOSU_TA_PERFCNT_1,
+ ETHOSU_TA_MODE_1,
+ ETHOSU_TA_HISTBIN_1,
+ ETHOSU_TA_HISTCNT_1}};
/****************************************************************************
* Cache maintenance
****************************************************************************/
@@ -152,6 +261,9 @@ void targetSetup() {
for (int j = 0; j < ETHOSU_NPU_TA_COUNT; j++) {
if (ta_init(&ethosu_ta[i][j], ethosu_ta_base_addrs[i][j])) {
printf("Failed to initialize timing-adapter %d for NPU %d\n", j, i);
+ } else {
+ // Set the updated configuration
+ ta_set_all(&ethosu_ta[i][j], &ethosu_ta_settings[j]);
}
}
}