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authorPer Åstrand <per.astrand@arm.com>2021-05-06 16:20:34 +0200
committerPer Åstrand <per.astrand@arm.com>2021-05-19 10:25:29 +0200
commit3b9505876b4d7d22c7cb029feba11d120b450857 (patch)
tree5ffa541f1a74ddd622ad23f70b334fa912029bed
parenta08e9d43eee72bb3143c9dad304c966e700be810 (diff)
downloadethos-u-core-platform-3b9505876b4d7d22c7cb029feba11d120b450857.tar.gz
Add documentation for running on MPS3
Change-Id: Ie5afef7bd07456e0fe2eb47c0ab6f979fc9aa5ea
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+++ b/README.md
@@ -45,6 +45,8 @@ regarding building on a Windows system.
### Testing
+#### Fixed Virtual Platform - Corstone-300
+
Assuming that the Corstone-300 FVP has been downloaded, installed and placed in
the PATH variable. Then the software binaries can be tested like this.
@@ -58,6 +60,54 @@ this.
```
$ FVP_Corstone_SSE-300_Ethos-U55 applications/freertos/freertos.elf
```
+#### MPS3 FPGA
+
+The files needed to get started for Corstone-300 can be found on
+[developer.arm.com](https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/download-fpga-images).
+
+Follow the documentation in the downloaded archive to setup the board with the
+Corstone-300 FPGA bit files.
+
+The built files can then be ran by adapting the steps in chapter '10 Software',
+using the extracted binary files from the build process. This is needed for the
+bootloader on the FPGA to be able to load the memories.
+
+1. Copy the binary files for the application in the fw/ folder to the board
+ <MPS3_dir>/Software folder, making sure the filename is max 8.3 characters
+ (i.e. 00000000.bin and 70000000.bin for the freertos application)
+2. Navigate to <MPS3_dir>MB/HBI0309C/AN547 and open the images.txt file in a
+ text editor
+3. Remove the lines under the '[IMAGES]' section and replace it with:
+
+```
+TOTALIMAGES: 2
+
+IMAGE0ADDRESS: 0x02000000
+IMAGE0UPDATE: AUTO
+IMAGE0FILE: \SOFTWARE\10000000.bin; sram binary
+
+IMAGE1ADDRESS: 0x0c000000
+IMAGE1UPDATE: AUTO
+IMAGE1FILE: \SOFTWARE\70000000.bin ; ddr binary
+```
+
+The mapping between the Cortex-M55 memory space and the addresse the FPGA MMC
+bootloader needs is found in section '9.6 MCC Memory mapping' of the
+documentation in the Corstone-300 FPGA archive. A part of the table is shown
+below:
+
+ | Cortex-M55 | MMC Bootloader |
+ |---------------|-----------------|
+ | 0x00000000 | 0x00000000 |
+ | 0x10000000 | 0x01000000 |
+ | 0x60000000 | 0x08000000 |
+ | 0x70000000 | 0x0C000000 |
+
+The binary that the Cortex-M55 CPU expects at address 0x10000000 must therefor
+be written to 0x02000000.
+
+Power up the board with the PBON and the application output will be seen on the
+serial console.
# Multi NPU