From 0a6142904a712a1f1c9ce16bb364c3e9d2434dd2 Mon Sep 17 00:00:00 2001 From: Anton Moberg Date: Wed, 24 Mar 2021 14:08:22 +0100 Subject: Clock request disabled when PMU enabled Currently clock request is enabled, which means NPU will only request clock when working. When NPU is going into idle it will no longer request clock and thus PMU won't be clocked either, and thus affect the cycle counter. Added: enum for request clients (PMU or INFERENCE). Added: clock_request added to driver struct (bit 0: PMU, bit 1: INFERENCE) which keeps track of which client requests clock. Added: power_request added to driver struct (bit 0: PMU, bit 1: INFERENCE) which keeps track of which client requests power. Added set_clock_and_power_request(...) updates clock_request and power_request depending on which client calls it. Sets clock and power if both PMU and INFERENCE requests it. Added: Call set_clock_and_power_request(...) from PMU. Changed: replace ethosu_set_clock_and_power(...) with set_clock_and_power_request(...) in ethosu_init and ethosu_invoke Change-Id: Ie7d8aee639d4abbf879b05e9a82035d7c0d40d40 --- src/ethosu_pmu.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/ethosu_pmu.c') diff --git a/src/ethosu_pmu.c b/src/ethosu_pmu.c index aef3255..a5143e2 100644 --- a/src/ethosu_pmu.c +++ b/src/ethosu_pmu.c @@ -90,6 +90,7 @@ void ETHOSU_PMU_Enable_v2(struct ethosu_driver *drv) struct pmcr_r pmcr; pmcr.word = drv->dev.pmcr; pmcr.cnt_en = 1; + set_clock_and_power_request(drv, ETHOSU_PMU_REQUEST, ETHOSU_CLOCK_Q_DISABLE, ETHOSU_POWER_Q_DISABLE); ethosu_write_reg_shadow(&drv->dev, NPU_REG_PMCR, pmcr.word, &drv->dev.pmcr); } @@ -99,6 +100,7 @@ void ETHOSU_PMU_Disable_v2(struct ethosu_driver *drv) struct pmcr_r pmcr; pmcr.word = drv->dev.pmcr; pmcr.cnt_en = 0; + set_clock_and_power_request(drv, ETHOSU_PMU_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_ENABLE); ethosu_write_reg_shadow(&drv->dev, NPU_REG_PMCR, pmcr.word, &drv->dev.pmcr); } -- cgit v1.2.1