From c6e7a1f7d75342b11093b058e0cf47e7a636f852 Mon Sep 17 00:00:00 2001
From: Kristofer Jonsson <kristofer.jonsson@arm.com>
Date: Tue, 24 Nov 2020 09:20:14 +0100
Subject: Update handling of soft reset

Change-Id: Ia22b2934b4c85e3c480931c8b92608365351a877
---
 src/ethosu_driver.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

(limited to 'src/ethosu_driver.c')

diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c
index 3c9c55b..3b6ebcf 100644
--- a/src/ethosu_driver.c
+++ b/src/ethosu_driver.c
@@ -149,7 +149,7 @@ struct opt_cfg_s
  ******************************************************************************/
 
 struct ethosu_driver ethosu_drv = {
-    .dev = {.base_address = NULL, .reset = 0, .pmccntr = {0}, .pmu_evcntr = {0, 0, 0, 0}, .pmu_evtypr = {0, 0, 0, 0}},
+    .dev = {.base_address = NULL, .proto = 0, .pmccntr = {0}, .pmu_evcntr = {0, 0, 0, 0}, .pmu_evtypr = {0, 0, 0, 0}},
     .abort_inference = false,
     .status_error    = false};
 
@@ -356,13 +356,15 @@ int ethosu_invoke_v2(const void *custom_data_ptr,
         *fast_memory = ethosu_drv.fast_memory;
     }
 
-    if (ethosu_drv.dev.reset != ethosu_read_reg(&ethosu_drv.dev, NPU_REG_PROT))
+    // Only soft reset if securty state or privilege level needs changing
+    if (ethosu_drv.dev.proto != ethosu_read_reg(&ethosu_drv.dev, NPU_REG_PROT))
     {
         if (ETHOSU_SUCCESS != ethosu_soft_reset(&ethosu_drv.dev))
         {
             return -1;
         }
     }
+
     ethosu_drv.status_error = false;
     ethosu_set_clock_and_power(&ethosu_drv.dev, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_DISABLE);
     ethosu_restore_pmu_config(&ethosu_drv.dev);
@@ -575,8 +577,10 @@ static int handle_command_stream(struct ethosu_driver *drv,
                                  const size_t *base_addr_size,
                                  const int num_base_addr)
 {
-    uint32_t qread     = 0;
-    uint32_t cms_bytes = cms_length * BYTES_IN_32_BITS;
+    uint32_t qread           = 0;
+    uint32_t cms_bytes       = cms_length * BYTES_IN_32_BITS;
+    ptrdiff_t cmd_stream_ptr = (ptrdiff_t)cmd_stream;
+
     LOG_INFO("handle_command_stream: cmd_stream=%p, cms_length %d\n", cmd_stream, cms_length);
 
     if (0 != ((ptrdiff_t)cmd_stream & MASK_16_BYTE_ALIGN))
@@ -594,10 +598,12 @@ static int handle_command_stream(struct ethosu_driver *drv,
             base_addr_invalid = true;
         }
     }
+
     if (base_addr_invalid)
     {
         return -1;
     }
+
     npu_axi_init(drv);
 
     /* Flush the cache if available on our CPU.
@@ -608,7 +614,7 @@ static int handle_command_stream(struct ethosu_driver *drv,
 
     if (base_addr_size != NULL)
     {
-        ethosu_flush_dcache((uint32_t *)cmd_stream, cms_bytes);
+        ethosu_flush_dcache((uint32_t *)cmd_stream_ptr, cms_bytes);
         for (int i = 0; i < num_base_addr; i++)
         {
             ethosu_flush_dcache((uint32_t *)base_addr[i], base_addr_size[i]);
-- 
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