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| author | Daniel Anderberg <daniel.anderberg@arm.com> | 2020-11-27 12:08:43 +0100 |
|---|---|---|
| committer | Daniel Anderberg <daniel.anderberg@arm.com> | 2020-12-02 11:16:58 +0100 |
| commit | 906da410f1efd05db8080c8a0a417c2de54518fc (patch) | |
| tree | 5d1bdc6ebce4b7f8f1119b68efd4a11344869fab /src | |
| parent | c6e7a1f7d75342b11093b058e0cf47e7a636f852 (diff) | |
| download | ethos-u-core-driver-906da410f1efd05db8080c8a0a417c2de54518fc.tar.gz | |
Remove CPU build flags from driver
Using a cpu without proper interrupt handling is not really usefull in
this context, so remove that option.
Change-Id: Ie94fd9025c918eef72272e14ad5b0a95ea7dc4a4
Diffstat (limited to 'src')
| -rw-r--r-- | src/ethosu_driver.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c index 3b6ebcf..4d396cf 100644 --- a/src/ethosu_driver.c +++ b/src/ethosu_driver.c @@ -155,8 +155,6 @@ struct ethosu_driver ethosu_drv = { // IRQ static volatile bool irq_triggered = false; -#if defined(CPU_CORTEX_M3) || defined(CPU_CORTEX_M4) || defined(CPU_CORTEX_M7) || defined(CPU_CORTEX_M33) || \ - defined(CPU_CORTEX_M55) void ethosu_irq_handler(void) { uint8_t irq_raised = 0; @@ -200,25 +198,6 @@ static inline void wait_for_irq(struct ethosu_driver *drv) __enable_irq(); } } -#else -// Just polling the status register -static inline void wait_for_irq(struct ethosu_driver *drv) -{ - uint8_t irq_raised = 0; - - for (int i = 0; i < 5000; ++i) - { - (void)ethosu_is_irq_raised(&drv->dev, &irq_raised); - if (1 == irq_raised) - { - break; - } - } - ASSERT(1 == irq_raised); - - irq_triggered = true; -} -#endif static int handle_optimizer_config(struct ethosu_driver *drv, struct opt_cfg_s *opt_cfg_p); static int handle_command_stream(struct ethosu_driver *drv, |