diff options
| author | Kristofer Jonsson <kristofer.jonsson@arm.com> | 2020-08-25 16:32:21 +0200 |
|---|---|---|
| committer | Kristofer Jonsson <kristofer.jonsson@arm.com> | 2020-08-26 11:50:54 +0200 |
| commit | ef387ea3cbff63e06d1d0808047b9f19adf244c9 (patch) | |
| tree | 731748dee197d39c356eaf6aa044d81de533b909 /src/ethosu_device.c | |
| parent | 9716b5e00c10b000067ca3ee1ad91fef4cccbb46 (diff) | |
| download | ethos-u-core-driver-ef387ea3cbff63e06d1d0808047b9f19adf244c9.tar.gz | |
Change-Id: I54a1927fef998bc97f5507f2de9faf7d4a7960f5
Diffstat (limited to 'src/ethosu_device.c')
| -rw-r--r-- | src/ethosu_device.c | 50 |
1 files changed, 37 insertions, 13 deletions
diff --git a/src/ethosu_device.c b/src/ethosu_device.c index 9cb67ce..4729c49 100644 --- a/src/ethosu_device.c +++ b/src/ethosu_device.c @@ -38,6 +38,7 @@ enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev, const void *b { #if !defined(ARM_NPU_STUB) dev->base_address = (uintptr_t)base_address; + ethosu_save_pmu_config(dev); #else UNUSED(dev); UNUSED(base_address); @@ -559,15 +560,26 @@ void ethosu_write_reg(struct ethosu_device *dev, uint32_t address, uint32_t valu enum ethosu_error_codes ethosu_save_pmu_config(struct ethosu_device *dev) { #if !defined(ARM_NPU_STUB) + // Save the PMU control register + dev->pmcr = ethosu_read_reg(dev, NPU_REG_PMCR); + + // Save IRQ control + dev->pmint = ethosu_read_reg(dev, NPU_REG_PMINTSET); + + // Save the enabled events mask + dev->pmcnten = ethosu_read_reg(dev, NPU_REG_PMCNTENSET); + + // Save start and stop event + dev->pmccntr_cfg = ethosu_read_reg(dev, NPU_REG_PMCCNTR_CFG); + + // Save the cycle counter dev->pmccntr = ETHOSU_PMU_Get_CCNTR(); + + // Save the event settings and counters for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++) { - dev->pmu_evcntr[i] = ETHOSU_PMU_Get_EVCNTR(i); - dev->pmu_evtypr[i] = ETHOSU_PMU_Get_EVTYPER(i); - } - if (!dev->restore_pmu_config) - { - dev->restore_pmu_config = true; + dev->pmu_evcntr[i] = ethosu_read_reg(dev, NPU_REG_PMEVCNTR0 + i * sizeof(uint32_t)); + dev->pmu_evtypr[i] = ethosu_read_reg(dev, NPU_REG_PMEVTYPER0 + i * sizeof(uint32_t)); } #else UNUSED(dev); @@ -579,14 +591,26 @@ enum ethosu_error_codes ethosu_save_pmu_config(struct ethosu_device *dev) enum ethosu_error_codes ethosu_restore_pmu_config(struct ethosu_device *dev) { #if !defined(ARM_NPU_STUB) - if (dev->restore_pmu_config) + // Restore PMU control register + ethosu_write_reg(dev, NPU_REG_PMCR, dev->pmcr); + + // Restore IRQ control + ethosu_write_reg(dev, NPU_REG_PMINTSET, dev->pmint); + + // Restore enabled event mask + ethosu_write_reg(dev, NPU_REG_PMCNTENSET, dev->pmcnten); + + // Restore start and stop event + ethosu_write_reg(dev, NPU_REG_PMCCNTR_CFG, dev->pmccntr_cfg); + + // Restore the cycle counter + ETHOSU_PMU_Set_CCNTR(dev->pmccntr); + + // Restore event settings and counters + for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++) { - ETHOSU_PMU_Set_CCNTR(dev->pmccntr); - for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++) - { - ETHOSU_PMU_Set_EVCNTR(i, dev->pmu_evcntr[i]); - ETHOSU_PMU_Set_EVTYPER(i, dev->pmu_evtypr[i]); - } + ethosu_write_reg(dev, NPU_REG_PMEVCNTR0 + i * sizeof(uint32_t), dev->pmu_evcntr[i]); + ethosu_write_reg(dev, NPU_REG_PMEVTYPER0 + i * sizeof(uint32_t), dev->pmu_evtypr[i]); } #else UNUSED(dev); |