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| author | Kristofer Jonsson <kristofer.jonsson@arm.com> | 2020-08-20 16:52:23 +0200 |
|---|---|---|
| committer | Kristofer Jonsson <kristofer.jonsson@arm.com> | 2020-08-24 11:29:32 +0200 |
| commit | 125429a1c089775b05d4d13739ee7fc72285079f (patch) | |
| tree | e24a0310ef37ac93ebd624d2eb31afb0e6f1cab0 /src/ethosu_config.h | |
| parent | e2e70241aa9bb11093222d07b83176ebafeddae1 (diff) | |
| download | ethos-u-core-driver-125429a1c089775b05d4d13739ee7fc72285079f.tar.gz | |
Base pointer offset and soft reset
Allow user to define a base pointer offset, if the CPU and the NPU have
address spaces offseted from each other.
Soft reset NPU before every inference.
Added log prints.
Change-Id: I98a746d20dc780fefa23ad68816f5ba2ba2e6c6e
Diffstat (limited to 'src/ethosu_config.h')
| -rw-r--r-- | src/ethosu_config.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/ethosu_config.h b/src/ethosu_config.h index 07eb824..91fe660 100644 --- a/src/ethosu_config.h +++ b/src/ethosu_config.h @@ -108,6 +108,14 @@ #define AXI_LIMIT3_MAX_OUTSTANDING_WRITES 16 #endif +/* + * Address offset between the CPU and the NPU. The offset is + * applied to the QBASE and BASEP registers. + */ +#ifndef BASE_POINTER_OFFSET +#define BASE_POINTER_OFFSET 0 +#endif + #ifdef PMU_AUTOINIT /* * Register control |