// // Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include #include #include "ClBaseWorkload.hpp" #include #include #include #include namespace armnn { arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const Convolution2dDescriptor& descriptor, const TensorInfo& weights, const Optional& biases, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); class ClConvolution2dWorkload : public ClBaseWorkload { public: ClConvolution2dWorkload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr& memoryManager, const arm_compute::CLCompileContext& clCompileContext, const bool isFastMathEnabled = false); void Execute() const override; arm_compute::ConvolutionMethod GetConvolutionMethod() const; bool SupportsTensorHandleReplacement() const override { // NCHW DataLayout on ACL still uses paddding for alignment on the Conv2d workload so importing is unreliable. if (m_Data.m_Parameters.m_DataLayout == DataLayout::NCHW) { return false; } else { return true; } } protected: void Reconfigure() override; private: mutable arm_compute::CLConvolutionLayer m_ConvolutionLayer; std::unique_ptr m_KernelTensor; std::unique_ptr m_BiasTensor; arm_compute::ConvolutionMethod m_ConvolutionMethod; void FreeUnusedTensors(); std::unique_ptr m_InputProxy; std::unique_ptr m_OutputProxy; }; } //namespace armnn