73 : BaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor,
info)
90 m_BiasTensor = std::make_unique<arm_compute::CLTensor>();
94 const arm_compute::Size2D aclDilationInfo = BuildArmComputeSize2D(
99 std::string name = std::string(
"ClDepthwiseConvolutionWorkload");
102 arm_compute::ICLTensor& input =
static_cast<IClTensorHandle*
>(
m_Data.
m_Inputs[0])->GetTensor();
103 arm_compute::ICLTensor& output =
static_cast<IClTensorHandle*
>(
m_Data.
m_Outputs[0])->GetTensor();
106 input.info()->set_data_layout(aclDataLayout);
107 output.info()->set_data_layout(aclDataLayout);
113 const unsigned int depthMultiplier = weightInfo.
GetShape()[0];
115 arm_compute::PadStrideInfo padStrideInfo = BuildArmComputePadStrideInfo(
m_Data.
m_Parameters);
120 m_KernelTensor.get(),
125 arm_compute::ActivationLayerInfo(),
130 ScopedCpuTensorHandle weightsPermutedHandle(weightPermuted);
bool m_BiasEnabled
Enable/disable bias.
const TensorShape & GetShape() const
armnn::ConstTensor ConvertWeightTensorFromArmnnToAcl(const ConstCpuTensorHandle *weightTensor, DataLayout dataLayout, void *permuteBuffer)
void InitializeArmComputeClTensorData(arm_compute::CLTensor &clTensor, const ConstCpuTensorHandle *handle)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
const ConstCpuTensorHandle * m_Bias
const DepthwiseConvolution2dQueueDescriptor m_Data
unsigned int GetNumBytes() const
std::unique_ptr< arm_compute::IFunction > m_DepthwiseConvolutionLayer
void ValidateInputsOutputs(const std::string &descName, unsigned int numExpectedIn, unsigned int numExpectedOut) const
std::unique_ptr< arm_compute::CLTensor > m_BiasTensor
LayerDescriptor m_Parameters
uint32_t m_DilationY
Dilation factor value for height dimension.
const ConstCpuTensorHandle * m_Weight
uint32_t m_DilationX
Dilation factor value for width dimension.
std::unique_ptr< arm_compute::CLTensor > m_KernelTensor
std::vector< ITensorHandle * > m_Outputs
std::vector< ITensorHandle * > m_Inputs
const TensorInfo & GetTensorInfo() const