23 #include <boost/numeric/conversion/cast.hpp> 32 static std::vector<float> Bias2({0, 2});
34 static std::vector<float> Bias4({1, 2, 3, 4});
36 static std::vector<float> Bias8({1, 2, 3, 4, 1, 2, 3, 4});
39 static std::vector<float> ConvInput3x8x16({
40 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
41 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
42 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
43 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
44 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
45 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
46 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
47 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
48 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
49 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
50 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
51 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
52 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
53 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
54 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
55 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
56 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
57 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
58 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
59 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
60 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
61 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
62 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
63 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
73 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
74 boost::multi_array<T, 1>
GetBias2(
bool biasEnabled,
float qScale)
79 boost::multi_array<T, 1> bias = MakeTensor<T, 1>(biasDesc, QuantizedVector<T>(Bias2, qScale, 0.0f));
84 return boost::multi_array<T, 1>();
89 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
90 boost::multi_array<T, 1>
GetBias4(
bool biasEnabled,
float qScale)
95 boost::multi_array<T, 1> bias = MakeTensor<T, 1>(biasDesc, QuantizedVector<T>(Bias4, qScale, 0.0f));
100 return boost::multi_array<T, 1>();
105 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
106 boost::multi_array<T, 1>
GetBias8(
bool biasEnabled,
float qScale)
110 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(Bias4.size())}, ArmnnType);
111 boost::multi_array<T, 1> bias = MakeTensor<T, 1>(biasDesc, QuantizedVector<T>(Bias8, qScale, 0.0f));
116 return boost::multi_array<T, 1>();
121 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
126 const unsigned int outputChannels = outputInfo.
GetShape()[channelsIndex];
128 switch (outputChannels)
133 return GetBias2<ArmnnType>(biasEnabled, qScale);
137 return GetBias4<ArmnnType>(biasEnabled, qScale);
141 return GetBias8<ArmnnType>(biasEnabled, qScale);
153 struct FullyConnectedBiasTypeForInputType;
156 struct FullyConnectedBiasTypeForInputType<float>
162 struct FullyConnectedBiasTypeForInputType<uint8_t>
164 using Type = int32_t;
168 template<
typename T,
typename B>
169 void ApplyBias(std::vector<T>& v,
float vScale, int32_t vOffset,
170 const std::vector<B>& bias,
float bScale, int32_t bOffset, uint32_t w, uint32_t h)
172 BOOST_ASSERT_MSG((armnn::IsQuantizedType<T>() && vScale != 0.0f) || (!armnn::IsQuantizedType<T>()),
173 "Invalid type and parameter combination.");
174 BOOST_ASSERT_MSG((armnn::IsQuantizedType<B>() && bScale != 0.0f) || (!armnn::IsQuantizedType<B>()),
175 "Invalid type and parameter combination.");
178 for (uint32_t i = 0; i < bias.size(); ++i)
181 for (uint32_t y = 0; y < h; ++y)
183 for (uint32_t x = 0; x < w; ++x)
185 uint32_t offset = (i * h + y) * w + x;
186 BOOST_ASSERT(offset < v.size());
187 T& outRef = v[offset];
189 outRef = SelectiveQuantize<T>(dOutput + dBias, vScale, vOffset);
204 const boost::multi_array<T, 4>& originalInput,
205 const boost::multi_array<T, 4>& originalKernel,
206 const boost::multi_array<B, 1>& bias,
207 const boost::multi_array<T, 4>& originalOutputExpected,
211 uint32_t padLeft = 0,
213 uint32_t padRight = 0,
214 uint32_t padBottom = 0,
215 uint32_t strideX = 1,
216 uint32_t strideY = 1,
217 uint32_t dilationX = 1,
218 uint32_t dilationY = 1)
226 unsigned int outputHeight =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[2]);
227 unsigned int outputWidth =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[3]);
228 unsigned int outputChannels =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[1]);
229 unsigned int outputNum =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[0]);
233 unsigned int kernelChannels =
boost::numeric_cast<
unsigned int>(originalKernel.shape()[1]);
234 unsigned int kernelDepthMul =
boost::numeric_cast<
unsigned int>(originalKernel.shape()[0]);
236 bool biasEnabled = bias.size() > 0;
239 BOOST_ASSERT(inputNum == 1);
240 BOOST_ASSERT(outputNum == 1);
243 BOOST_ASSERT(!biasEnabled || bias.size() == outputChannels);
253 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
256 if(armnn::IsQuantizedType<T>())
258 inputTensorInfo.SetQuantizationScale(qScale);
259 inputTensorInfo.SetQuantizationOffset(qOffset);
271 std::vector<T> inputImage;
272 inputImage.assign(originalInput.data(), originalInput.data() + 1*inputChannels*inputHeight*inputWidth);
273 std::vector<T> inputData;
274 inputData.insert(inputData.end(), inputImage.begin(), inputImage.end());
275 inputData.insert(inputData.end(), inputImage.begin(), inputImage.end());
281 std::vector<T> tmp(inputData.size());
282 armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), tmp.data(),
sizeof(T));
286 auto batchedInput = MakeTensor<T, 4>(inputTensorInfo, inputData);
288 std::vector<T> outputImage;
289 outputImage.assign(originalOutputExpected.data(),
290 originalOutputExpected.data() + outputChannels*outputHeight*outputWidth);
295 std::vector<T> biasV;
296 biasV.assign(bias.data(), bias.data() + outputChannels);
299 outputWidth, outputHeight);
303 std::vector<T> outputData;
304 outputData.insert(outputData.end(), outputImage.begin(), outputImage.end());
305 outputData.insert(outputData.end(), outputImage.begin(), outputImage.end());
310 std::vector<T> tmp(outputData.size());
314 ret.
outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputData);
316 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
317 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
324 boost::multi_array<T, 4> kernel = boost::multi_array<T, 4>(originalKernel);
336 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
337 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
340 data.
m_Bias = &biasTensor;
352 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
353 inputHandle->Allocate();
354 outputHandle->Allocate();
358 ExecuteWorkload(*workload, memoryManager);
370 const boost::multi_array<T, 4>& input,
371 const boost::multi_array<T, 4>& kernel,
372 const boost::multi_array<B, 1>& bias,
373 const boost::multi_array<T, 4>& outputExpected,
377 uint32_t padLeft = 1,
379 uint32_t padRight = 1,
380 uint32_t padBottom = 1,
381 uint32_t strideX = 1,
382 uint32_t strideY = 1)
396 unsigned int outputChannels =
boost::numeric_cast<
unsigned int>(outputExpected.shape()[3]);
400 bool biasEnabled = bias.size() > 0;
403 armnn::TensorInfo inputTensorInfo({inputNum, inputHeight, inputWidth, inputChannels}, ArmnnType);
404 armnn::TensorInfo outputTensorInfo({outputNum, outputHeight, outputWidth, outputChannels},
406 armnn::TensorInfo kernelDesc({kernelChanMul, kernelHeight, kernelWidth, kernelChannels}, ArmnnType);
407 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
410 std::vector<T> inputData;
411 inputData.assign(input.data(), input.data() + inputHeight*inputWidth*inputChannels);
412 auto batchedInput = MakeTensor<T, 4>(inputTensorInfo, inputData);
415 std::vector<T> outputData;
416 outputData.assign(outputExpected.data(), outputExpected.data() + outputHeight*outputWidth*outputChannels);
419 ret.
outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputData);
421 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
422 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
432 data.
m_Bias = &biasTensor;
443 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
444 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
446 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
447 inputHandle->Allocate();
448 outputHandle->Allocate();
452 ExecuteWorkload(*workload, memoryManager);
459 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
473 unsigned int batchSize = 1;
474 unsigned int inputChannels = 2;
475 unsigned int outputChannels = 3;
476 unsigned int inputSize = 5;
477 unsigned int kernelSize = 3;
478 unsigned int padSize = 2;
479 unsigned int stride = 1;
480 unsigned int outputSize = 7;
482 armnn::TensorInfo inputInfo({batchSize, inputChannels, inputSize, 1}, ArmnnType);
483 armnn::TensorInfo outputInfo({batchSize, outputChannels, outputSize, 1}, ArmnnType);
484 armnn::TensorInfo kernelInfo({outputChannels, inputChannels, kernelSize, 1}, ArmnnType);
488 if(armnn::IsQuantizedType<T>())
491 inputInfo.SetQuantizationOffset(qOffset);
492 outputInfo.SetQuantizationScale(qScale);
493 outputInfo.SetQuantizationOffset(qOffset);
494 kernelInfo.SetQuantizationScale(qScale);
495 kernelInfo.SetQuantizationOffset(qOffset);
496 biasInfo.SetQuantizationScale(inputInfo.GetQuantizationScale()*kernelInfo.GetQuantizationScale());
497 biasInfo.SetQuantizationOffset(0);
500 std::vector<T> inputData = QuantizedVector<T>(
502 5.0f, -2.0f, 2.5f, 0.0f, 1.0f,
503 -3.0f, 3.2f, 5.0f, 2.0f, 3.0f,
505 inputInfo.GetQuantizationScale(),
506 inputInfo.GetQuantizationOffset());
508 std::vector<T> kernelData = QuantizedVector<T>(
519 kernelInfo.GetQuantizationScale(),
520 kernelInfo.GetQuantizationOffset());
522 std::vector<B> biasData =
523 QuantizedVector<B>({ 1.0f, 0.0f, 0.0f }, biasInfo.GetQuantizationScale(), biasInfo.GetQuantizationOffset());
525 std::vector<T> outputData = QuantizedVector<T>(
527 4.5f, -10.8f, 5.0f + 6.4f - 7.5f, -2.0f + 10.0f -3.0f, 2.5f + 4.0f - 4.5f, 6.0f, 1.0f,
528 -0.6f, -0.6f + 0.64f, -0.6f + 0.64f + 1.0f, 0.64f + 1.0f + 0.4f, 1.0f + 0.4f + 0.6f, 0.4f + 0.6f, 0.6f,
529 2.5f, -1.0f + 3.0f, 1.25f - 3.2f + 2.5f, -1.0f - 5.0f, 1.25f + 0.5f - 2.0f, -3.0f, 0.5f
531 outputInfo.GetQuantizationScale(),
532 outputInfo.GetQuantizationOffset());
537 ApplyBias(outputData, outputInfo.GetQuantizationScale(), outputInfo.GetQuantizationOffset(),
538 biasData, biasInfo.GetQuantizationScale(), biasInfo.GetQuantizationOffset(),
542 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputInfo);
543 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputInfo);
553 AddInputToWorkload(data, info, inputInfo, inputHandle.get());
554 AddOutputToWorkload(data, info, outputInfo, outputHandle.get());
557 data.
m_Bias = &biasTensor;
566 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
567 inputHandle->Allocate();
568 outputHandle->Allocate();
572 ExecuteWorkload(*workload, memoryManager);
581 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
594 boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputDesc,
604 boost::multi_array<T, 4> kernel = MakeTensor<T, 4>(kernelDesc, {
613 const std::vector<float> outputData =
620 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, outputData);
622 return SimpleConvolution2dNhwcTestImpl<ArmnnType, ArmnnType>(
627 boost::multi_array<T, 1>(),
634 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
647 boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputDesc,
658 boost::multi_array<T, 4> kernel = MakeTensor<T, 4>(kernelDesc,
668 const std::vector<T> outputData =
675 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, outputData);
677 uint32_t padLeft = 1;
679 uint32_t padRight = 1;
680 uint32_t padBottom = 1;
681 uint32_t strideX = 2;
682 uint32_t strideY = 2;
684 return SimpleConvolution2dNhwcTestImpl<ArmnnType, ArmnnType>(
689 boost::multi_array<T, 1>(),
702 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
713 boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputDesc, QuantizedVector<T>(ConvInput3x8x16, qScale, qOffset));
717 boost::multi_array<T, 4> kernel = MakeTensor<T, 4>(kernelDesc, std::vector<T>(
760 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, std::vector<T>(
762 -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24,
763 -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25,
764 -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f,
765 -23.5f, -23.5f, -23.5f,
766 -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f,
767 -23.5f, -23.5f, -23.5f,
769 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
770 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
771 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
772 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
776 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
781 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
802 boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputDesc, QuantizedVector<T>(ConvInput3x8x16, qScale, qOffset));
806 boost::multi_array<T, 4> kernel = MakeTensor<T, 4>(kernelDesc, std::vector<T>(
837 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, std::vector<T>(
839 -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15,
840 -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16,
841 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
842 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
843 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
844 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
846 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
847 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
848 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
849 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
850 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
851 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
855 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
860 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
878 boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputDesc, std::vector<T>(
888 boost::multi_array<T, 4> kernel = MakeTensor<T, 4>(kernelDesc, std::vector<T>(
905 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, std::vector<T>(
908 -242, -594, -934, -372, 0, 0,
909 -495, -1190, -1850, -725, 0, 0,
910 -538, -1256, -1916, -748, 0, 0,
911 -273, -626, -946, -363, 0, 0,
918 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
923 GetBias2<ArmnnBType>(
false, qScale * qScale),
945 boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputDesc, std::vector<T>(
952 }, qScale, qOffset)));
956 boost::multi_array<T, 4> kernel = MakeTensor<T, 4>(kernelDesc, std::vector<T>(
967 std::vector<T> myVec(outputDesc.GetNumElements(), 0);
968 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, std::vector<T>(
970 -7140, -10580, -13940, -9300, -5230,
971 -9590, -14120, -18520, -12290, -6860,
972 -9980, -14560, -18960, -12560, -7000,
973 -7518, -10904, -14144, -9318, -5152,
974 -5032, -7256, -9376, -6142, -3368,
978 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
983 GetBias2<ArmnnBType>(
false, qScale * qScale),
994 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
998 const std::vector<float>& inputNoQuantizedValues,
1000 const std::vector<float>& kernelNoQuantizedValues,
1002 const std::vector<float>& outputExpectedNoQuantizedValues,
1007 uint32_t padLeft = 0,
1008 uint32_t padTop = 0,
1009 uint32_t padRight = 0,
1010 uint32_t padBottom = 0,
1011 uint32_t strideX = 1,
1012 uint32_t strideY = 1,
1013 bool biasEnabled =
false 1048 auto input = MakeTensor<T, 4>(inputTensorInfo,
1049 std::vector<T>(QuantizedVector<T>(inputNoQuantizedValues,
1050 inputTensorInfo.GetQuantizationScale(),
1051 inputTensorInfo.GetQuantizationOffset())));
1052 auto kernel = MakeTensor<T, 4>(kernelTensorInfo,
1053 std::vector<T>(QuantizedVector<T>(kernelNoQuantizedValues,
1054 kernelTensorInfo.GetQuantizationScale(),
1055 kernelTensorInfo.GetQuantizationOffset())));
1056 auto expectedOutput =
1057 MakeTensor<T, 4>(outputTensorInfo,
1058 std::vector<T>(QuantizedVector<T>(outputExpectedNoQuantizedValues,
1059 outputTensorInfo.GetQuantizationScale(),
1060 outputTensorInfo.GetQuantizationOffset())));
1062 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
1067 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
1082 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
1090 std::vector<float> inputNoQuantizedValues =
1092 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1093 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1094 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1095 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1096 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1097 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1098 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1099 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1105 std::vector<float> kernelNoQuantizedValues =
1115 std::vector<float> outputExpectedNoQuantizedValues =
1123 return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1126 inputNoQuantizedValues,
1128 kernelNoQuantizedValues,
1130 outputExpectedNoQuantizedValues,
1138 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
1146 std::vector<float> inputNoQuantizedValues =
1148 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1149 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1151 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1152 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1153 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1157 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1159 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1160 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1161 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1162 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1163 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1164 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1165 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1166 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1167 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1168 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1172 std::vector<float> kernelNoQuantizedValues =
1186 std::vector<float> outputExpectedNoQuantizedValues =
1194 return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1197 inputNoQuantizedValues,
1199 kernelNoQuantizedValues,
1201 outputExpectedNoQuantizedValues,
1209 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
1217 std::vector<float> inputNoQuantizedValues =
1219 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1220 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1221 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1222 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1223 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1224 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1225 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1226 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1227 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1228 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
1232 std::vector<float> kernelNoQuantizedValues =
1242 std::vector<float> outputExpectedNoQuantizedValues =
1249 uint32_t padLeft = 1;
1250 uint32_t padTop = 1;
1251 uint32_t padRight = 1;
1252 uint32_t padBottom = 1;
1254 return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1257 inputNoQuantizedValues,
1259 kernelNoQuantizedValues,
1261 outputExpectedNoQuantizedValues,
1276 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
1282 unsigned int inputHeight = 8;
1283 unsigned int inputWidth = 16;
1284 unsigned int inputChannels = 3;
1285 unsigned int inputNum = 5;
1287 unsigned int kernelHeight = 3;
1288 unsigned int kernelWidth = 3;
1290 unsigned int strideX = 2;
1291 unsigned int strideY = 3;
1292 unsigned int padX = 1;
1293 unsigned int padY = 1;
1295 unsigned int outputNum = inputNum;
1296 unsigned int outputChannels = 2;
1297 unsigned int outputHeight = (inputHeight + 2 * padY - kernelHeight + strideY) / strideY;
1298 unsigned int outputWidth = (inputWidth + 2 * padX - kernelWidth + strideX) / strideX;
1305 unsigned int inputShape[] = {inputNum, inputChannels, inputHeight, inputWidth};
1306 unsigned int outputShape[] = {outputNum, outputChannels, outputHeight, outputWidth};
1307 unsigned int kernelShape[] = {outputChannels, inputChannels, kernelHeight, kernelWidth};
1308 unsigned int biasShape[] = {outputChannels};
1317 auto input = MakeRandomTensor<T, 4>(inputTensorInfo, 124908);
1318 auto kernel = MakeRandomTensor<T, 4>(kernelDesc, 891234);
1319 auto bias = MakeRandomTensor<T, 1>(biasDesc, 1028);
1321 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
1322 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
1332 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1333 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1335 data.
m_Bias = &biasTensor;
1344 std::unique_ptr<armnn::ITensorHandle> outputHandleRef = refWorkloadFactory.
CreateTensorHandle(outputTensorInfo);
1345 std::unique_ptr<armnn::ITensorHandle> inputHandleRef = refWorkloadFactory.
CreateTensorHandle(inputTensorInfo);
1349 SetWorkloadInput(refData, refInfo, 0, inputTensorInfo, inputHandleRef.get());
1350 SetWorkloadOutput(refData, refInfo, 0, outputTensorInfo, outputHandleRef.get());
1352 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
1353 std::unique_ptr<armnn::IWorkload> workloadRef = refWorkloadFactory.
CreateConvolution2d(refData, refInfo);
1355 outputHandleRef->Allocate();
1356 inputHandleRef->Allocate();
1358 inputHandle->Allocate();
1359 outputHandle->Allocate();
1364 ExecuteWorkload(*workload, memoryManager);
1366 workloadRef->PostAllocationConfigure();
1367 workloadRef->Execute();
1384 const boost::multi_array<T, 4>& input,
1385 const boost::multi_array<T, 4>& kernel,
1386 const boost::multi_array<B, 1>& bias,
1387 const boost::multi_array<T, 4>& outputExpected,
1391 uint32_t padLeft = 0,
1392 uint32_t padTop = 0,
1393 uint32_t padRight = 0,
1394 uint32_t padBottom = 0,
1395 uint32_t strideX = 1,
1396 uint32_t strideY = 1)
1407 unsigned int outputChannels =
boost::numeric_cast<
unsigned int>(outputExpected.shape()[1]);
1412 bool biasEnabled = bias.size() > 0;
1413 BOOST_ASSERT(!biasEnabled || bias.size() == outputChannels);
1420 armnn::TensorInfo kernelDesc({kernelChanMul, kernelChannels, kernelHeight, kernelWidth}, ArmnnType);
1421 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
1424 if (armnn::IsQuantizedType<T>())
1426 inputTensorInfo.SetQuantizationScale(qScale);
1427 inputTensorInfo.SetQuantizationOffset(qOffset);
1430 kernelDesc.SetQuantizationScale(qScale);
1431 kernelDesc.SetQuantizationOffset(qOffset);
1432 biasDesc.SetQuantizationScale(qScale*qScale);
1433 biasDesc.SetQuantizationOffset(0);
1437 std::vector<T> inputData;
1438 inputData.assign(input.data(), input.data() + inputChannels*inputHeight*inputWidth);
1444 std::vector<T> tmp(inputData.size());
1445 armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), tmp.data(),
sizeof(T));
1449 auto batchedInput = MakeTensor<T, 4>(inputTensorInfo, inputData);
1452 std::vector<T> outputData;
1453 outputData.assign(outputExpected.data(), outputExpected.data() + outputChannels*outputHeight*outputWidth);
1456 std::vector<T> biasV;
1457 biasV.assign(bias.data(), bias.data() + outputChannels);
1459 biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
1460 outputWidth, outputHeight);
1468 std::vector<T> tmp(outputData.size());
1473 ret.outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputData);
1475 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
1476 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
1490 data.
m_Bias = &biasTensor;
1501 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1502 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1505 inputHandle->Allocate();
1506 outputHandle->Allocate();
1510 ExecuteWorkload(*workload, memoryManager);
1517 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
1528 unsigned int inputHeight = 3;
1529 unsigned int inputWidth = 3;
1530 unsigned int inputChannels = 2;
1531 unsigned int inputNum = 1;
1533 unsigned int kernelHeight = 3;
1534 unsigned int kernelWidth = 3;
1535 unsigned int kernelChannels = inputChannels;
1536 unsigned int kernelDepthMultiplier = 1;
1538 unsigned int outputHeight = 1;
1539 unsigned int outputWidth = 1;
1540 unsigned int outputChannels = kernelChannels;
1541 unsigned int outputNum = inputNum;
1547 armnn::TensorInfo kernelDesc({kernelDepthMultiplier, kernelChannels, kernelHeight, kernelWidth},
1552 if(armnn::IsQuantizedType<T>())
1558 kernelDesc.SetQuantizationScale(qScale);
1559 kernelDesc.SetQuantizationOffset(qOffset);
1560 biasDesc.SetQuantizationScale(qScale*qScale);
1561 biasDesc.SetQuantizationOffset(0);
1563 std::vector<T> inputData = std::vector<T>(
1564 QuantizedVector<T>({
1580 std::vector<T> tmp(inputData.size());
1584 auto input = MakeTensor<T, 4>(inputTensorInfo, inputData);
1586 std::vector<B> biasV(QuantizedVector<B>({ 0, 2 },
1587 biasDesc.GetQuantizationScale(),
1588 biasDesc.GetQuantizationOffset()));
1590 auto bias = MakeTensor<B, 1>(biasDesc, biasV);
1592 std::vector<T> kernelData = std::vector<T>(
1593 QuantizedVector<T>({
1602 kernelDesc.GetQuantizationScale(),
1603 kernelDesc.GetQuantizationOffset()));
1605 auto kernel = MakeTensor<T, 4>(kernelDesc, kernelData);
1608 std::vector<T> outputImage(
1609 QuantizedVector<T>({ 0.f, 0.f },
1618 biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
1619 outputWidth, outputHeight);
1625 std::vector<T> tmp(outputImage.size());
1630 ret.outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputImage);
1632 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
1633 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
1643 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1644 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1647 data.
m_Bias = &biasTensor;
1658 inputHandle->Allocate();
1659 outputHandle->Allocate();
1663 ExecuteWorkload(*workload, memoryManager);
1670 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
1681 unsigned int depthMultiplier = 2;
1683 unsigned int inputHeight = 8;
1684 unsigned int inputWidth = 16;
1685 unsigned int inputChannels = 2;
1686 unsigned int inputBatchSize = 1;
1688 unsigned int kernelHeight = 5;
1689 unsigned int kernelWidth = 3;
1691 unsigned int outputHeight = inputHeight - kernelHeight + 1 + 2;
1692 unsigned int outputWidth = (inputWidth - kernelWidth + 1)/2;
1693 unsigned int outputChannels = inputChannels * depthMultiplier;
1694 unsigned int outputBatchSize = inputBatchSize;
1697 inputBatchSize, inputChannels, inputHeight, inputWidth, layout, ArmnnType);
1699 outputBatchSize, outputChannels, outputHeight, outputWidth, layout, ArmnnType);
1700 armnn::TensorInfo kernelDesc({depthMultiplier, inputChannels, kernelHeight, kernelWidth},
1705 if(armnn::IsQuantizedType<T>())
1711 kernelDesc.SetQuantizationScale(qScale);
1712 kernelDesc.SetQuantizationOffset(qOffset);
1713 biasDesc.SetQuantizationScale(qScale*qScale);
1714 biasDesc.SetQuantizationOffset(0);
1718 std::vector<T> originalInputData = std::vector<T>(
1719 QuantizedVector<T>({
1720 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1721 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1722 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1723 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1724 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1725 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1726 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1727 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1728 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1729 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1730 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1731 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1732 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1733 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1734 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1735 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f
1740 std::vector<T> inputData = originalInputData;
1746 originalInputData.data(), inputData.data(),
sizeof(T));
1748 auto input = MakeTensor<T, 4>(inputTensorInfo, inputData);
1750 std::vector<B> biasV = QuantizedVector<B>({ 0, 2, 1, -1 },
1751 biasDesc.GetQuantizationScale(),
1752 biasDesc.GetQuantizationOffset());
1754 auto bias = MakeTensor<B, 1>(biasDesc, biasV);
1756 std::vector<T> kernelData = std::vector<T>(
1757 QuantizedVector<T>({
1782 kernelDesc.GetQuantizationScale(),
1783 kernelDesc.GetQuantizationOffset()));
1785 auto kernel = MakeTensor<T, 4>(kernelDesc, kernelData);
1788 std::vector<T> originalOutputImage = std::vector<T>(
1789 QuantizedVector<T>({
1790 3.5f, 3.5f, 3.5f, 3.5f, 3.5f, 3.5f, 3.5f,
1791 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f,
1792 5.0f, 5.0f, 5.0f, 5.0f, 5.0f, 5.0f, 5.0f,
1793 6.5f, 6.5f, 6.5f, 6.5f, 6.5f, 6.5f, 6.5f,
1794 6.5f, 6.5f, 6.5f, 6.5f, 6.5f, 6.5f, 6.5f,
1795 5.0f, 5.0f, 5.0f, 5.0f, 5.0f, 5.0f, 5.0f,
1797 -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f,
1798 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1799 -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f,
1800 -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f,
1801 -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f,
1802 -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f, -0.5f,
1804 8.0f, 8.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1805 10.0f, 10.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1806 10.0f, 10.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1807 10.0f, 10.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1808 10.0f, 10.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1809 8.0f, 8.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1811 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1812 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1813 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1814 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1815 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1816 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f
1828 biasDesc.GetQuantizationScale(),
1829 biasDesc.GetQuantizationOffset(),
1835 std::vector<T> outputImage = originalOutputImage;
1839 originalOutputImage.data(), outputImage.data(),
sizeof(T));
1842 ret.outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputImage);
1844 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
1845 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
1855 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1856 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1859 data.
m_Bias = &biasTensor;
1870 inputHandle->Allocate();
1871 outputHandle->Allocate();
1875 ExecuteWorkload(*workload, memoryManager);
1887 const boost::multi_array<T, 4>& originalInput,
1888 const boost::multi_array<T, 4>& originalKernel,
1889 const boost::multi_array<B, 1>& bias,
1890 const boost::multi_array<T, 4>& originalOutputExpected,
1894 uint32_t padLeft = 0,
1895 uint32_t padTop = 0,
1896 uint32_t padRight = 0,
1897 uint32_t padBottom = 0,
1898 uint32_t strideX = 1,
1899 uint32_t strideY = 1,
1900 uint32_t dilationX = 1,
1901 uint32_t dilationY = 1)
1908 unsigned int outputHeight =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[2]);
1909 unsigned int outputWidth =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[3]);
1910 unsigned int outputChannels =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[1]);
1911 unsigned int outputNum =
boost::numeric_cast<
unsigned int>(originalOutputExpected.shape()[0]);
1915 unsigned int kernelChannels =
boost::numeric_cast<
unsigned int>(originalKernel.shape()[1]);
1916 unsigned int kernelDepthMul =
boost::numeric_cast<
unsigned int>(originalKernel.shape()[0]);
1918 bool biasEnabled = bias.size() > 0;
1921 BOOST_ASSERT(inputNum == 1);
1922 BOOST_ASSERT(outputNum == 1);
1925 BOOST_ASSERT(!biasEnabled || bias.size() == outputChannels);
1935 armnn::TensorInfo kernelDesc({kernelDepthMul, kernelChannels, kernelHeight, kernelWidth}, ArmnnType);
1937 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
1940 if(armnn::IsQuantizedType<T>())
1942 inputTensorInfo.SetQuantizationScale(qScale);
1943 inputTensorInfo.SetQuantizationOffset(qOffset);
1946 kernelDesc.SetQuantizationScale(qScale);
1947 kernelDesc.SetQuantizationOffset(qOffset);
1948 biasDesc.SetQuantizationScale(qScale*qScale);
1949 biasDesc.SetQuantizationOffset(0);
1955 std::vector<T> input;
1956 input.assign(originalInput.data(), originalInput.data() + 1*inputChannels*inputHeight*inputWidth);
1957 std::vector<T> inputData;
1958 inputData.insert(inputData.end(), input.begin(), input.end());
1959 inputData.insert(inputData.end(), input.begin(), input.end());
1965 std::vector<T> tmp(inputData.size());
1966 armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), tmp.data(),
sizeof(T));
1970 auto batchedInput = MakeTensor<T, 4>(inputTensorInfo, inputData);
1972 std::vector<T> output;
1973 output.assign(originalOutputExpected.data(),
1974 originalOutputExpected.data() + outputChannels*outputHeight*outputWidth);
1979 std::vector<T> biasV;
1980 biasV.assign(bias.data(), bias.data() + outputChannels);
1982 biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
1983 outputWidth, outputHeight);
1987 std::vector<T> outputData;
1988 outputData.insert(outputData.end(), output.begin(), output.end());
1989 outputData.insert(outputData.end(), output.begin(), output.end());
1994 std::vector<T> tmp(outputData.size());
1998 ret.
outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputData);
2000 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
2001 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
2008 boost::multi_array<T, 4> kernel = boost::multi_array<T, 4>(originalKernel);
2016 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
2017 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
2020 data.
m_Bias = &biasTensor;
2033 inputHandle->Allocate();
2034 outputHandle->Allocate();
2038 ExecuteWorkload(*workload, memoryManager);
2057 auto input = MakeTensor<T, 4>(inputTensorInfo, std::vector<T>(
2058 QuantizedVector<T>({
2071 inputTensorInfo.GetQuantizationScale(),
2072 inputTensorInfo.GetQuantizationOffset())));
2076 auto kernel = MakeTensor<T, 4>(kernelTensorInfo, std::vector<T>(
2077 QuantizedVector<T>({
2088 kernelTensorInfo.GetQuantizationScale(),
2089 kernelTensorInfo.GetQuantizationOffset())));
2094 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputTensorInfo, std::vector<T>(
2095 QuantizedVector<T>({
2096 1062, 1580, 1850, 1530, 1117,
2097 2140, 3108, 3500, 2842, 2042,
2098 3580, 5068, 5460, 4342, 3062,
2099 3618, 5072, 5390, 4248, 2971,
2100 3074, 4282, 4510, 3533, 2457,
2102 1550, 2284, 2362, 1955, 1428,
2103 2910, 4206, 4342, 3528, 2536,
2104 3390, 4886, 5022, 4068, 2916,
2105 3566, 5056, 5182, 4133, 2922,
2106 3100, 4352, 4452, 3517, 2465
2108 outputTensorInfo.GetQuantizationScale(),
2109 outputTensorInfo.GetQuantizationOffset())));
2111 return DepthwiseConvolution2dAsymmetricTestImpl<ArmnnType, ArmnnBType>(
2116 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
2141 auto input = MakeTensor<T, 4>(inputTensorInfo, std::vector<T>(
2142 QuantizedVector<T>({
2155 inputTensorInfo.GetQuantizationScale(),
2156 inputTensorInfo.GetQuantizationOffset())));
2159 auto kernel = MakeTensor<T, 4>(kernelTensorInfo, std::vector<T>(
2160 QuantizedVector<T>({
2171 kernelTensorInfo.GetQuantizationScale(),
2172 kernelTensorInfo.GetQuantizationOffset())));
2175 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputTensorInfo, std::vector<T>(
2176 QuantizedVector<T>({
2177 1062, 1580, 1850, 1530, 1117,
2178 2140, 3108, 3500, 2842, 2042,
2179 3580, 5068, 5460, 4342, 3062,
2180 3618, 5072, 5390, 4248, 2971,
2181 3074, 4282, 4510, 3533, 2457,
2183 1550, 2284, 2362, 1955, 1428,
2184 2910, 4206, 4342, 3528, 2536,
2185 3390, 4886, 5022, 4068, 2916,
2186 3566, 5056, 5182, 4133, 2922,
2187 3100, 4352, 4452, 3517, 2465
2189 outputTensorInfo.GetQuantizationScale(),
2190 outputTensorInfo.GetQuantizationOffset())));
2192 return DepthwiseConvolution2dTestImpl<ArmnnType, ArmnnBType>(
2197 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
2222 auto input = MakeTensor<T, 4>(inputTensorInfo, std::vector<T>(
2223 QuantizedVector<T>({
2224 0, 0, 0, 0, 0, 0, 0, 0, 0,
2225 0, 0, 0, 0, 0, 0, 0, 0, 0,
2226 0, 0, 0, 0, 0, 0, 0, 0, 0,
2227 0, 0, 0, 1, 1, 1, 0, 0, 0,
2228 0, 0, 0, 1, 1, 1, 0, 0, 0,
2229 0, 0, 0, 1, 1, 1, 0, 0, 0,
2230 0, 0, 0, 0, 0, 0, 0, 0, 0,
2231 0, 0, 0, 0, 0, 0, 0, 0, 0,
2232 0, 0, 0, 0, 0, 0, 0, 0, 0
2234 inputTensorInfo.GetQuantizationScale(),
2235 inputTensorInfo.GetQuantizationOffset())));
2238 auto kernel = MakeTensor<T, 4>(kernelTensorInfo, std::vector<T>(
2239 QuantizedVector<T>({
2244 kernelTensorInfo.GetQuantizationScale(),
2245 kernelTensorInfo.GetQuantizationOffset())));
2247 uint32_t padLeft = 0;
2248 uint32_t padTop = 0;
2249 uint32_t padRight = 0;
2250 uint32_t padBottom = 0;
2251 uint32_t strideX = 1;
2252 uint32_t strideY = 1;
2253 uint32_t dilationX = 3;
2254 uint32_t dilationY = 3;
2258 boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputTensorInfo, std::vector<T>(
2259 QuantizedVector<T>({
2264 outputTensorInfo.GetQuantizationScale(),
2265 outputTensorInfo.GetQuantizationOffset())));
2267 return DepthwiseConvolution2dTestImpl<ArmnnType, ArmnnBType>(
2272 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
2287 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
2291 const std::vector<float>& inputNoQuantizedValues,
2293 const std::vector<float>& kernelNoQuantizedValues,
2295 const std::vector<float>& outputExpectedNoQuantizedValues,
2300 bool biasEnabled =
false)
2334 auto input = MakeTensor<T, 4>(inputTensorInfo,
2335 std::vector<T>(QuantizedVector<T>(inputNoQuantizedValues,
2336 inputTensorInfo.GetQuantizationScale(),
2337 inputTensorInfo.GetQuantizationOffset())));
2338 auto kernel = MakeTensor<T, 4>(kernelTensorInfo,
2339 std::vector<T>(QuantizedVector<T>(kernelNoQuantizedValues,
2340 kernelTensorInfo.GetQuantizationScale(),
2341 kernelTensorInfo.GetQuantizationOffset())));
2342 auto expectedOutput =
2343 MakeTensor<T, 4>(outputTensorInfo,
2344 std::vector<T>(QuantizedVector<T>(outputExpectedNoQuantizedValues,
2345 outputTensorInfo.GetQuantizationScale(),
2346 outputTensorInfo.GetQuantizationOffset())));
2348 uint32_t padLeft = 0;
2349 uint32_t padTop = 0;
2350 uint32_t padRight = 0;
2351 uint32_t padBottom = 0;
2352 uint32_t strideX = 1;
2353 uint32_t strideY = 1;
2355 return DepthwiseConvolution2dTestImpl<ArmnnType, ArmnnBType>(
2360 GetBias<ArmnnBType>(biasEnabled, qScale * qScale, outputTensorInfo, layout),
2375 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2383 std::vector<float> inputNoQuantizedValues =
2385 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2386 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2387 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2388 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2389 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2390 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2391 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2392 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2393 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2394 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2398 std::vector<float> kernelNoQuantizedValues =
2408 std::vector<float> outputExpectedNoQuantizedValues =
2416 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2419 inputNoQuantizedValues,
2421 kernelNoQuantizedValues,
2423 outputExpectedNoQuantizedValues,
2431 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2439 std::vector<float> inputNoQuantizedValues =
2441 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2442 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2443 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2444 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2445 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2446 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2447 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2448 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2449 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2450 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2452 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2453 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2454 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2455 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2456 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2457 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2458 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2459 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2460 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2461 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2465 std::vector<float> kernelNoQuantizedValues =
2479 std::vector<float> outputExpectedNoQuantizedValues =
2492 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2495 inputNoQuantizedValues,
2497 kernelNoQuantizedValues,
2499 outputExpectedNoQuantizedValues,
2507 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2515 std::vector<float> inputNoQuantizedValues =
2528 std::vector<float> kernelNoQuantizedValues =
2556 std::vector<float> outputExpectedNoQuantizedValues =
2584 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2587 inputNoQuantizedValues,
2589 kernelNoQuantizedValues,
2591 outputExpectedNoQuantizedValues,
2599 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2607 std::vector<float> inputNoQuantizedValues =
2620 std::vector<float> kernelNoQuantizedValues =
2637 std::vector<float> outputExpectedNoQuantizedValues =
2653 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2656 inputNoQuantizedValues,
2658 kernelNoQuantizedValues,
2660 outputExpectedNoQuantizedValues,
2668 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
2675 unsigned int inputHeight = 8;
2676 unsigned int inputWidth = 16;
2677 unsigned int inputChannels = 3;
2678 unsigned int inputNum = 5;
2680 unsigned int kernelHeight = 3;
2681 unsigned int kernelWidth = 3;
2682 unsigned int channelMultiplier = 1;
2684 unsigned int strideX = 2;
2685 unsigned int strideY = 3;
2686 unsigned int padX = 1;
2687 unsigned int padY = 1;
2689 unsigned int outputNum = inputNum;
2690 unsigned int outputChannels = inputChannels * channelMultiplier;
2691 unsigned int outputHeight = (inputHeight + 2 * padY - kernelHeight + strideY) / strideY;
2692 unsigned int outputWidth = (inputWidth + 2 * padX - kernelWidth + strideX) / strideX;
2700 std::vector<unsigned int> inputShape;
2701 std::vector<unsigned int> outputShape;
2702 std::vector<unsigned int> kernelShape{ channelMultiplier, inputChannels, kernelHeight, kernelWidth };
2703 std::vector<unsigned int> biasShape{ outputChannels };
2707 inputShape = { inputNum, inputChannels, inputHeight, inputWidth };
2708 outputShape = { outputNum, outputChannels, outputHeight, outputWidth };
2711 inputShape = { inputNum, inputHeight, inputWidth, inputChannels };
2712 outputShape = { outputNum, outputHeight, outputWidth, outputChannels };
2716 + std::to_string(static_cast<int>(layout.
GetDataLayout())) +
"]");
2719 float inputsQScale = armnn::IsQuantizedType<T>() ? 1.0f : 0;
2720 float outputQScale = armnn::IsQuantizedType<T>() ? 2.0f : 0;
2721 int32_t qOffset = 0;
2723 inputTensorInfo =
armnn::TensorInfo(4, inputShape.data(), ArmnnType, inputsQScale, qOffset);
2724 outputTensorInfo =
armnn::TensorInfo(4, outputShape.data(), ArmnnType, outputQScale, qOffset);
2725 kernelDesc =
armnn::TensorInfo(4, kernelShape.data(), ArmnnType, inputsQScale, qOffset);
2731 auto input = MakeRandomTensor<T, 4>(inputTensorInfo, 124908, 0.0f, 255.0f);
2732 auto kernel = MakeRandomTensor<T, 4>(kernelDesc, 891234, 0.0f, 255.0f);
2733 auto bias = MakeRandomTensor<typename FullyConnectedBiasTypeForInputType<T>::Type, 1>(
2734 biasDesc, 1028, 0.0f, 255.0f);
2736 std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputTensorInfo);
2737 std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputTensorInfo);
2747 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
2748 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
2750 data.
m_Bias = &biasTensor;
2760 std::unique_ptr<armnn::ITensorHandle> outputHandleRef = refWorkloadFactory.
CreateTensorHandle(outputTensorInfo);
2761 std::unique_ptr<armnn::ITensorHandle> inputHandleRef = refWorkloadFactory.
CreateTensorHandle(inputTensorInfo);
2765 SetWorkloadInput(refData, refInfo, 0, inputTensorInfo, inputHandleRef.get());
2766 SetWorkloadOutput(refData, refInfo, 0, outputTensorInfo, outputHandleRef.get());
2771 outputHandleRef->Allocate();
2772 inputHandleRef->Allocate();
2774 inputHandle->Allocate();
2775 outputHandle->Allocate();
2780 ExecuteWorkload(*workload, memoryManager);
2782 workloadRef->PostAllocationConfigure();
2783 workloadRef->Execute();
2795 Convolution2d3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2802 Convolution2d3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2803 armnn::IWorkloadFactory&,
2804 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2809 Convolution2d3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2810 armnn::IWorkloadFactory&,
2811 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2816 Convolution2d3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
2817 armnn::IWorkloadFactory&,
2818 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2822 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
2823 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2824 armnn::IWorkloadFactory&,
2825 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2830 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2831 armnn::IWorkloadFactory&,
2832 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2836 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
2837 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2838 armnn::IWorkloadFactory&,
2839 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2843 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
2844 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
2845 armnn::IWorkloadFactory&,
2846 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2850 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
2851 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2852 armnn::IWorkloadFactory &workloadFactory,
2853 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2857 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
2858 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2859 armnn::IWorkloadFactory &workloadFactory,
2860 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2864 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
2865 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2866 armnn::IWorkloadFactory &workloadFactory,
2867 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2871 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
2872 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
2873 armnn::IWorkloadFactory &workloadFactory,
2874 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2878 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
2879 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2880 armnn::IWorkloadFactory&,
2881 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2885 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
2886 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2887 armnn::IWorkloadFactory&,
2888 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2892 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
2893 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2894 armnn::IWorkloadFactory&,
2895 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2899 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
2900 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
2901 armnn::IWorkloadFactory&,
2902 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2906 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
2907 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2908 armnn::IWorkloadFactory&,
2909 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2913 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
2914 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2915 armnn::IWorkloadFactory&,
2916 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2920 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
2921 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2922 armnn::IWorkloadFactory&,
2923 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2927 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
2928 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
2929 armnn::IWorkloadFactory&,
2930 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
2934 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
2935 DepthwiseConvolution2dMult4Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2936 armnn::IWorkloadFactory &workloadFactory,
2937 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2941 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
2942 DepthwiseConvolution2dMult4Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2943 armnn::IWorkloadFactory &workloadFactory,
2944 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2948 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
2949 DepthwiseConvolution2dMult2Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
2950 armnn::IWorkloadFactory &workloadFactory,
2951 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2955 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
2956 DepthwiseConvolution2dMult2Test<armnn::DataType::Float32, armnn::DataType::Float32>(
2957 armnn::IWorkloadFactory &workloadFactory,
2958 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
2967 armnn::IWorkloadFactory& workloadFactory,
2968 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
2972 return SimpleConvolution2d3x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
2973 workloadFactory, memoryManager, 0.f, 0, biasEnabled, layout);
2977 armnn::IWorkloadFactory& workloadFactory,
2978 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
2982 return SimpleConvolution2d3x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2983 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
2987 armnn::IWorkloadFactory& workloadFactory,
2988 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
2992 return SimpleConvolution2d3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
2993 workloadFactory, memoryManager, 0.f, 0, biasEnabled, layout);
2997 armnn::IWorkloadFactory& workloadFactory,
2998 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3001 return SimpleConvolution2d3x3NhwcTestCommon<armnn::DataType::Float32>(
3011 armnn::IWorkloadFactory& workloadFactory,
3012 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3016 return SimpleConvolution2d3x3Stride2x2TestCommon<armnn::DataType::Float32>(
3026 armnn::IWorkloadFactory& workloadFactory,
3027 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3031 return SimpleConvolution2d3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3032 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3036 armnn::IWorkloadFactory& workloadFactory,
3037 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3041 return SimpleConvolution2d3x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3042 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3046 armnn::IWorkloadFactory& workloadFactory,
3047 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3051 return SimpleConvolution2d3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3052 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3056 armnn::IWorkloadFactory& workloadFactory,
3057 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3060 return SimpleConvolution2dAsymmetricPaddingTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3061 workloadFactory, memoryManager, layout, 0.0f, 0);
3065 armnn::IWorkloadFactory& workloadFactory,
3066 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3071 workloadFactory, memoryManager, layout, 0.0f, 0);
3075 armnn::IWorkloadFactory& workloadFactory,
3076 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3079 return Convolution1dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3080 workloadFactory, memoryManager, 0.0f, 0, biasEnabled);
3084 armnn::IWorkloadFactory& workloadFactory,
3085 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3088 return Convolution1dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3089 workloadFactory, memoryManager, 0.1f, 128, biasEnabled);
3093 armnn::IWorkloadFactory& workloadFactory,
3094 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3097 using namespace armnn;
3099 const DataType inputType = DataType::QAsymmU8;
3100 const DataType kernelType = DataType::QSymmS8;
3101 const DataType biasType = DataType::Signed32;
3103 TensorInfo inputInfo ({ 1, 3, 1, 2 }, inputType, 0.5f, 128);
3104 TensorInfo outputInfo({ 1, 3, 1, 3 }, inputType, 1.0f, 128);
3106 const std::vector<float> quantScales{ 0.5f, 0.75f, 1.0f };
3107 constexpr
unsigned int quantDimension = 0;
3109 TensorInfo kernelInfo({ 3, 1, 1, 2 }, kernelType, quantScales, quantDimension);
3111 const std::vector<float> biasQuantScales{ 0.25f, 0.375f, 0.5f };
3112 TensorInfo biasInfo({ 3 }, biasType, biasQuantScales, quantDimension);
3114 std::vector<uint8_t> inputData =
3116 138, 108, 138, 108, 138, 108
3119 std::vector<int8_t> kernelData =
3124 std::vector<int32_t> biasData =
3129 std::vector<uint8_t> expectedOutputData =
3131 121, 118, 115, 121, 118, 115, 121, 118, 115
3151 std::unique_ptr<ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputInfo);
3152 std::unique_ptr<ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputInfo);
3163 queueDescriptor.m_Weight = &weightTensor;
3164 queueDescriptor.m_Bias = &biasTensor;
3166 AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3167 AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3169 std::unique_ptr<IWorkload> workload = workloadFactory.
CreateConvolution2d(queueDescriptor, workloadInfo);
3170 inputHandle->Allocate();
3171 outputHandle->Allocate();
3175 ExecuteWorkload(*workload, memoryManager);
3179 ret.
outputExpected = MakeTensor<uint8_t, 4>(outputInfo, expectedOutputData);
3185 armnn::IWorkloadFactory& workloadFactory,
3186 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3187 armnn::IWorkloadFactory& refWorkloadFactory)
3189 return CompareConvolution2dTestImpl<armnn::DataType::Float32>(
3190 workloadFactory, memoryManager, refWorkloadFactory);
3194 armnn::IWorkloadFactory& workloadFactory,
3195 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3199 return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3200 workloadFactory, memoryManager, 0.0f, 0, biasEnabled, layout);
3204 armnn::IWorkloadFactory& workloadFactory,
3205 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3208 return DepthwiseConvolution2dNhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3209 workloadFactory, memoryManager, 0.0f, 0, biasEnabled);
3213 armnn::IWorkloadFactory& workloadFactory,
3214 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3218 return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3219 workloadFactory, memoryManager, 0.0f, 0, biasEnabled, layout);
3223 armnn::IWorkloadFactory& workloadFactory,
3224 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
3227 auto input = MakeTensor<float, 4>(inputTensorInfo, { 1.f, 2.f, 3.f, 4.f });
3229 std::vector<float> kernelData;
3230 std::vector<float> singleDepthKernel{ 1.f, -1.f, -1.f, 1.f };
3231 for (
unsigned int i = 0; i < 64; ++i)
3233 kernelData.insert(kernelData.end(), singleDepthKernel.begin(), singleDepthKernel.end());
3236 auto kernel = MakeTensor<float, 4>(kernelTensorInfo, kernelData);
3238 std::vector<float> expectedOutputData(64, 0.f);
3240 auto expectedOutput = MakeTensor<float, 4>(outputTensorInfo, expectedOutputData);
3242 return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3247 boost::multi_array<float, 1>(),
3255 armnn::IWorkloadFactory& workloadFactory,
3256 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3260 return DepthwiseConvolution2dAsymmetricTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3261 workloadFactory, memoryManager, 0.0f, 0, biasEnabled, layout);
3265 armnn::IWorkloadFactory& workloadFactory,
3266 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3270 return DepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3271 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3275 armnn::IWorkloadFactory& workloadFactory,
3276 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3280 return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3281 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3285 armnn::IWorkloadFactory& workloadFactory,
3286 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager)
3288 return SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3297 armnn::IWorkloadFactory& workloadFactory,
3298 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3302 return DepthwiseConvolution2dTestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3303 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3307 armnn::IWorkloadFactory& workloadFactory,
3308 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3312 return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3313 workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3317 armnn::IWorkloadFactory& workloadFactory,
3318 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3321 using namespace armnn;
3323 const DataType inputType = DataType::QAsymmU8;
3324 const DataType kernelType = DataType::QSymmS8;
3325 const DataType biasType = DataType::Signed32;
3327 TensorInfo inputInfo ({ 1, 3, 3, 2 }, inputType, 0.5f, 128);
3328 TensorInfo outputInfo({ 1, 2, 2, 4 }, inputType, 1.0f, 128);
3330 const std::vector<float> quantScales{ 1.0f, 0.5f, 1.0f, 0.5f };
3331 const unsigned int quantDimension = 0;
3332 TensorInfo kernelInfo({ 2, 2, 2, 2 }, kernelType, quantScales, quantDimension);
3334 const std::vector<float> biasQuantScales{ 0.5f, 0.25f, 0.5f, 0.25f };
3335 constexpr
unsigned int biasQuantDimension = 0;
3336 TensorInfo biasInfo({ 4 }, biasType, biasQuantScales, biasQuantDimension);
3338 std::vector<uint8_t> inputData =
3351 std::vector<int8_t> kernelData =
3359 std::vector<int32_t> biasData =
3364 std::vector<uint8_t> expectedOutputData =
3390 std::unique_ptr<ITensorHandle> inputHandle = workloadFactory.
CreateTensorHandle(inputInfo);
3391 std::unique_ptr<ITensorHandle> outputHandle = workloadFactory.
CreateTensorHandle(outputInfo);
3402 queueDescriptor.m_Weight = &weightTensor;
3403 queueDescriptor.m_Bias = &biasTensor;
3405 AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3406 AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3409 inputHandle->Allocate();
3410 outputHandle->Allocate();
3414 ExecuteWorkload(*workload, memoryManager);
3419 ret.
outputExpected = MakeTensor<uint8_t, 4>(outputInfo, expectedOutputData);
3425 armnn::IWorkloadFactory& workloadFactory,
3426 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3427 armnn::IWorkloadFactory& refWorkloadFactory,
3430 return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::Float32>(
3431 workloadFactory, memoryManager, refWorkloadFactory, layout);
3435 armnn::IWorkloadFactory& workloadFactory,
3436 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3437 armnn::IWorkloadFactory& refWorkloadFactory,
3440 return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8>(
3441 workloadFactory, memoryManager, refWorkloadFactory, layout);
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul64Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager)
uint32_t m_PadBottom
Padding bottom value in the height dimension.
bool m_BiasEnabled
Enable/disable bias.
LayerTestResult< T, 4 > SimpleConvolution2d3x3TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > CompareDepthwiseConvolution2dFloatTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::DataLayout layout)
const ConstCpuTensorHandle * m_Bias
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dDepthMul1Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > SimpleConvolution2dAsymmetricPaddingTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout, float qScale, int32_t qOffset)
bool m_BiasEnabled
Enable/disable bias.
LayerTestResult< float, 4 > SimpleConvolution2d3x5Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
const TensorShape & GetShape() const
uint32_t m_PadBottom
Padding bottom value in the height dimension.
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dPerAxisQuantTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
void ApplyBias(std::vector< T > &v, float vScale, int32_t vOffset, const std::vector< B > &bias, float bScale, int32_t bOffset, uint32_t w, uint32_t h)
LayerTestResult< float, 4 > Convolution1dTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::DataLayout layout)
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dUint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
const ConstCpuTensorHandle * m_Bias
A Convolution2dDescriptor for the Convolution2dLayer.
uint32_t m_PadLeft
Padding left value in the width dimension.
LayerTestResult< T, 4 > DepthwiseConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > DepthwiseConvolution2dDepthMul1TestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
boost::multi_array< T, n > outputExpected
LayerTestResult< T, 4 > CompareDepthwiseConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnnUtils::DataLayoutIndexed &layout)
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x3Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3DilationTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const std::vector< float > &inputNoQuantizedValues, armnn::TensorInfo &inputTensorInfo, const std::vector< float > &kernelNoQuantizedValues, armnn::TensorInfo &kernelTensorInfo, const std::vector< float > &outputExpectedNoQuantizedValues, armnn::TensorInfo &outputTensorInfo, uint32_t dilationX, uint32_t dilationY, armnn::DataLayout layout=armnn::DataLayout::NCHW, bool biasEnabled=false)
LayerTestResult< T, 4 > SimpleConvolution2dNhwcTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const boost::multi_array< T, 4 > &input, const boost::multi_array< T, 4 > &kernel, const boost::multi_array< B, 1 > &bias, const boost::multi_array< T, 4 > &outputExpected, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t padLeft=1, uint32_t padTop=1, uint32_t padRight=1, uint32_t padBottom=1, uint32_t strideX=1, uint32_t strideY=1)
LayerTestResult< T, 4 > SimpleConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const boost::multi_array< T, 4 > &originalInput, const boost::multi_array< T, 4 > &originalKernel, const boost::multi_array< B, 1 > &bias, const boost::multi_array< T, 4 > &originalOutputExpected, float qScale, int32_t qOffset, const armnn::DataLayout layout=armnn::DataLayout::NCHW, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t strideX=1, uint32_t strideY=1, uint32_t dilationX=1, uint32_t dilationY=1)
typename ResolveTypeImpl< DT >::Type ResolveType
uint32_t m_PadRight
Padding right value in the width dimension.
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x3QSymm16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
Copyright (c) 2020 ARM Limited.
LayerTestResult< T, 4 > Convolution1dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled)
void IgnoreUnused(Ts &&...)
uint32_t m_DilationY
Dilation along y axis.
LayerDescriptor m_Parameters
uint32_t m_DilationY
Dilation factor value for height dimension.
const ConstCpuTensorHandle * m_Weight
LayerTestResult< float, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager)
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthNhwcTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
LayerTestResult< T, 4 > Convolution2d3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_PadTop
Padding top value in the height dimension.
LayerTestResult< uint8_t, 4 > Convolution2dPerAxisQuantTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
LayerTestResult< T, 4 > Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
LayerTestResult< T, 4 > CompareConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory)
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_DilationX
Dilation factor value for width dimension.
uint32_t m_PadTop
Padding top value in the height dimension.
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x5QSymm16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
std::shared_ptr< IMemoryManager > IMemoryManagerSharedPtr
int32_t GetQuantizationOffset() const
float GetQuantizationScale() const
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
const ConstCpuTensorHandle * m_Weight
LayerTestResult< T, 4 > DepthwiseConvolution2dAsymmetricTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const boost::multi_array< T, 4 > &input, const boost::multi_array< T, 4 > &kernel, const boost::multi_array< B, 1 > &bias, const boost::multi_array< T, 4 > &outputExpected, float qScale, int32_t qOffset, const armnn::DataLayout layout, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t strideX=1, uint32_t strideY=1)
LayerTestResult< T, 4 > DepthwiseConvolution2d2x3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > DepthwiseConvolution2dMult2Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
boost::multi_array< T, 1 > GetBias2(bool biasEnabled, float qScale)
void SetQuantizationScale(float scale)
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dDepthMul1Int16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
LayerTestResult< float, 4 > SimpleConvolution2d3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
armnn::DataLayout GetDataLayout() const
LayerTestResult< T, 4 > DepthwiseConvolution2dNhwcTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled)
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
boost::multi_array< T, 1 > GetBias4(bool biasEnabled, float qScale)
LayerTestResult< T, 4 > Convolution2d2x3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > CompareConvolution2dTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory)
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo, const bool IsMemoryManaged=true) const =0
DataType GetBiasDataType(DataType inputDataType)
LayerTestResult< float, 4 > DepthwiseConvolution2dAsymmetricTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
boost::multi_array< T, n > output
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::DataLayout layout)
LayerTestResult< T, 4 > Convolution2d3x3DilationTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const std::vector< float > &inputNoQuantizedValues, armnn::TensorInfo &inputTensorInfo, const std::vector< float > &kernelNoQuantizedValues, armnn::TensorInfo &kernelTensorInfo, const std::vector< float > &outputExpectedNoQuantizedValues, armnn::TensorInfo &outputTensorInfo, uint32_t dilationX, uint32_t dilationY, armnn::DataLayout layout=armnn::DataLayout::NCHW, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t strideX=1, uint32_t strideY=1, bool biasEnabled=false)
uint32_t m_DilationX
Dilation along x axis.
boost::multi_array< T, 1 > GetBias8(bool biasEnabled, float qScale)
LayerTestResult< float, 4 > SimpleConvolution2d3x3NhwcTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
LayerTestResult< T, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout, float qScale, int32_t qOffset)
LayerTestResult< T, 4 > SimpleConvolution2d3x3Stride2x2TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout &dataLayout)
boost::multi_array< T, 1 > GetBias(bool biasEnabled, float qScale, armnn::TensorInfo outputInfo, armnn::DataLayout layout)
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
Contains information about inputs and outputs to a layer.
LayerTestResult< float, 4 > DepthwiseConvolution2dTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > SimpleConvolution2d3x5TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
float SelectiveDequantize(T value, float scale, int32_t offset)
void SetQuantizationOffset(int32_t offset)
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< uint8_t, 4 > Convolution1dUint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
LayerTestResult< T, 4 > DepthwiseConvolution2dAsymmetricTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< uint8_t, 4 > CompareDepthwiseConvolution2dUint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::DataLayout layout)
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x5Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > SimpleConvolution2d3x3NhwcTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, float qScale, int32_t qOffset, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dInt16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
virtual std::unique_ptr< IWorkload > CreateDepthwiseConvolution2d(const DepthwiseConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
unsigned int GetChannelsIndex() const
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul1Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > DepthwiseConvolution2dMult4Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > SimpleConvolution2d3x3Stride2x2Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
uint32_t m_PadLeft
Padding left value in the width dimension.
virtual std::unique_ptr< IWorkload > CreateConvolution2d(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
uint32_t m_PadRight
Padding right value in the width dimension.
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)