27 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
32 return std::vector<T>();
39 switch (outputChannels)
43 return QuantizedVector<T>({2}, qScale, 0);
48 return QuantizedVector<T>({0, 2}, qScale, 0);
55 template<
typename T,
typename B>
57 float vScale, int32_t vOffset,
58 float bScale, int32_t bOffset)
60 ARMNN_ASSERT_MSG((armnn::IsQuantizedType<T>() && vScale != 0.0f) || (!armnn::IsQuantizedType<T>()),
61 "Invalid type and parameter combination.");
62 ARMNN_ASSERT_MSG((armnn::IsQuantizedType<B>() && bScale != 0.0f) || (!armnn::IsQuantizedType<B>()),
63 "Invalid type and parameter combination.");
65 for (uint32_t i = 0; i < bias.size(); ++i)
67 for (
size_t j = i; j < v.size(); j+=bias.size())
74 outRef = SelectiveQuantize<T>(dOutput + dBias, vScale, vOffset);
80 template<armnn::DataType ArmnnType>
116 template <
typename T>
119 std::vector<float> data;
120 for (int32_t i = 0; i < size; ++i)
122 data.push_back(static_cast<float>(i));
125 return QuantizedVector<T>(data, qScale, qOffset);
129 template <
typename T>
132 std::vector<float> data;
133 for (int32_t i = 0; i < size; ++i)
135 float value =
static_cast<float>(i);
136 data.push_back(value/divisor);
139 return QuantizedVector<T>(data, qScale, qOffset);;
154 const std::vector<T>& input,
155 const std::vector<T>& kernel,
156 const std::vector<B>& bias,
157 const std::vector<T>& outputExpected,
164 uint32_t strideX = 1,
165 uint32_t strideY = 1,
166 uint32_t strideZ = 1,
167 uint32_t dilationX = 1,
168 uint32_t dilationY = 1,
169 uint32_t dilationZ = 1,
170 uint32_t padLeft = 0,
172 uint32_t padRight = 0,
173 uint32_t padBottom = 0,
174 uint32_t padFront = 0,
175 uint32_t padBack = 0)
196 bool biasEnabled = bias.size() > 0;
199 ARMNN_ASSERT(!biasEnabled || bias.size() == outputChannels);
202 armnn::TensorInfo inputTensorInfo({inputNum, inputDepth, inputHeight, inputWidth, inputChannels}, ArmnnType);
203 armnn::TensorInfo outputTensorInfo({outputNum, outputDepth, outputHeight, outputWidth, outputChannels}, ArmnnType);
204 armnn::TensorInfo kernelDesc({kernelDepth, kernelHeight, kernelWidth, kernelInChannels, kernelOutChannels},
206 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
209 if(armnn::IsQuantizedType<T>())
211 inputTensorInfo.SetQuantizationScale(qScale);
212 inputTensorInfo.SetQuantizationOffset(qOffset);
213 outputTensorInfo.SetQuantizationScale(qScale);
214 outputTensorInfo.SetQuantizationOffset(qOffset);
215 kernelDesc.SetQuantizationScale(qScale);
216 kernelDesc.SetQuantizationOffset(qOffset);
217 biasDesc.SetQuantizationScale(qScale*qScale);
218 biasDesc.SetQuantizationOffset(0);
222 std::vector<T> inputData;
223 inputData.assign(input.data(), input.data() + inputNum*inputDepth*inputHeight*inputWidth*inputChannels);
226 std::vector<T> outputData;
227 outputData.assign(outputExpected.data(), outputExpected.data() +
228 outputNum*outputDepth*outputHeight*outputWidth*outputChannels);
233 outputTensorInfo.GetQuantizationScale(), outputTensorInfo.GetQuantizationOffset(),
234 biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset());
244 std::vector<T> actualOutput(outputTensorInfo.GetNumElements());
246 std::unique_ptr<armnn::ITensorHandle> input0Handle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
247 std::unique_ptr<armnn::ITensorHandle> input1Handle = tensorHandleFactory.
CreateTensorHandle(kernelDesc);
248 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
267 AddInputToWorkload(data, info, inputTensorInfo, input0Handle.get());
268 AddInputToWorkload(data, info, kernelDesc, input1Handle.get());
269 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
271 std::unique_ptr<armnn::ITensorHandle> input2Handle =
nullptr;
275 AddInputToWorkload(data, info, biasDesc, input2Handle.get());
281 input0Handle->Allocate();
282 input1Handle->Allocate();
283 outputHandle->Allocate();
289 input2Handle->Allocate();
293 ExecuteWorkload(*workload, memoryManager);
299 outputHandle->GetShape(),
300 outputTensorInfo.GetShape());
315 SetScaleOffset<ArmnnType>(qScale, qOffset);
318 std::vector<T> input = CreateQuantizedData<T>(125, qScale, qOffset);
321 std::vector<T> kernel = QuantizedVector<T>(
338 std::vector<T> outputData = QuantizedVector<T>(
354 return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
360 GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
362 inputDesc.GetShape(),
363 kernelDesc.GetShape(),
364 outputDesc.GetShape(),
383 SetScaleOffset<ArmnnType>(qScale, qOffset);
386 std::vector<T> input = CreateQuantizedData<T>(300, qScale, qOffset);
389 std::vector<T> kernel = QuantizedVector<T>(
412 std::vector<T> outputData = QuantizedVector<T>(
422 return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
428 GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
430 inputDesc.GetShape(),
431 kernelDesc.GetShape(),
432 outputDesc.GetShape(),
454 SetScaleOffset<ArmnnType>(qScale, qOffset);
457 std::vector<T> input = CreateQuantizedData<T>(250, qScale, qOffset);
460 std::vector<T> kernel = QuantizedVector<T>(
462 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1, 1, 1, -1, -1,
463 1, 1, -1, 1, -1, 1, -1, 1, -1, -1, -1, 1, -1, 1, -1, 1,
470 std::vector<T> outputData = QuantizedVector<T>(
486 return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
492 GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
494 inputDesc.GetShape(),
495 kernelDesc.GetShape(),
496 outputDesc.GetShape(),
521 SetScaleOffset<ArmnnType>(qScale, qOffset);
524 std::vector<T> input = CreateQuantizedData<T>(125, qScale, qOffset);
527 std::vector<T> kernel = QuantizedVector<T>(
544 std::vector<T> outputData = QuantizedVector<T>(
546 112, 171, 177, 183, 124,
547 183, 279, 288, 297, 201,
548 213, 324, 333, 342, 231,
549 243, 369, 378, 387, 261,
550 172, 261, 267, 273, 184,
552 224, 342, 354, 366, 248,
553 366, 558, 576, 594, 402,
554 426, 648, 666, 684, 462,
555 486, 738, 756, 774, 522,
556 344, 522, 534, 546, 368,
558 424, 642, 654, 666, 448,
559 666, 1008, 1026, 1044, 702,
560 726, 1098, 1116, 1134, 762,
561 786, 1188, 1206, 1224, 822,
562 544, 822, 834, 846, 568,
563 624, 942, 954, 966, 648,
565 966, 1458, 1476, 1494, 1002,
566 1026, 1548, 1566, 1584, 1062,
567 1086, 1638, 1656, 1674, 1122,
568 744, 1122, 1134, 1146, 768,
569 312, 471, 477, 483, 324,
570 483, 729, 738, 747, 501,
571 513, 774, 783, 792, 531,
572 543, 819, 828, 837, 561,
573 372, 561, 567, 573, 384
577 return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
583 GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
585 inputDesc.GetShape(),
586 kernelDesc.GetShape(),
587 outputDesc.GetShape(),
617 std::vector<float> input = CreateSmallQuantizedData<float>(600, 100.0f, qScale, qOffset);
620 std::vector<float> kernel = CreateSmallQuantizedData<float>(108, 100.0f, qScale, qOffset);
626 std::vector<float> outputData =
628 12.0312f, 12.2268f, 17.7512f, 18.0494f,
629 18.176f, 18.4814f, 5.6912f, 5.7938f,
630 19.1664f, 19.5078f, 28.119f, 28.6383f,
631 28.6914f, 29.2215f, 8.9094f, 9.0873f,
633 23.1264f, 23.5398f, 33.843f, 34.4703f,
634 34.4154f, 35.0535f, 10.6734f, 10.8873f,
635 6.2712f, 6.417f, 9.0718f, 9.2929f,
636 9.2194f, 9.4441f, 2.7862f, 2.8615f
639 return SimpleConvolution3dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
645 GetBiasData<armnn::DataType::Float32>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
647 inputDesc.GetShape(),
648 kernelDesc.GetShape(),
649 outputDesc.GetShape(),
679 std::vector<float> input = CreateSmallQuantizedData<float>(300, 100.0f, qScale, qOffset);
682 std::vector<float> kernel =
684 0.125977f, 0.150391f, 0.101562f,
685 0.0585938f, 0.0864258f, 0.043457f,
686 0.034668f, 0.0322266f, 0.0385742f,
688 0.125977f, 0.150391f, -0.101562f,
689 -0.0585938f,-0.0864258f,-0.043457f,
690 -0.0104630f, 0.0154114f, 0.0013768f,
692 0.0344238f, 0.035644f, 0.0495605f,
693 0.0683594f, 0.099121f, -0.0461426f,
694 -0.0996094f,-0.126953f, -0.043457f,
698 std::vector<float> outputData =
700 -0.08156067f, -0.06891209f, -0.05589598f, -0.04310101f,
701 0.04584253f, 0.05855697f, 0.07129729f, 0.08325434f,
702 0.17304349f, 0.18521416f, 0.19818866f, 0.21096253f,
703 0.29965734f, 0.312698f, 0.32547557f, 0.33818722f
706 return SimpleConvolution3dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
712 GetBiasData<armnn::DataType::Float32>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
714 inputDesc.GetShape(),
715 kernelDesc.GetShape(),
716 outputDesc.GetShape(),
733 using namespace half_float::literal;
739 const std::vector<armnn::Half> input =
761 std::vector<armnn::Half> kernel =
763 -1._h, -1._h, -1._h, -1._h, -1._h, -1._h, -1._h, -1._h,
764 -1._h, -1._h, -1._h, 1._h, 1._h, 1._h, -1._h, -1._h,
765 1._h, 1._h, -1._h, 1._h, -1._h, 1._h, -1._h, 1._h,
766 -1._h, -1._h, -1._h, 1._h, -1._h, 1._h, -1._h, 1._h,
770 std::vector<armnn::Half> outputData =
779 return SimpleConvolution3dTestImpl<armnn::DataType::Float16, armnn::DataType::Float16>(
785 GetBiasData<armnn::DataType::Float16>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
787 inputDesc.GetShape(),
788 kernelDesc.GetShape(),
789 outputDesc.GetShape(),
803 using namespace half_float::literal;
809 const std::vector<armnn::Half> input =
811 0.0367984_h, 0.0380895_h, 0.0420157_h, 0.0675631_h,
812 0.0938920_h, 0.0476106_h, 0.1035490_h, 0.1260370_h,
813 0.0461647_h, 0.0883828_h, 0.1159540_h, 0.0498519_h,
814 0.0104630_h, 0.0154114_h, 0.00137681_h, 0.0344238_h,
816 0.0356445_h, 0.0495605_h, 0.0683594_h, 0.0991211_h,
817 0.0461426_h, 0.0996094_h, 0.1269530_h, 0.0393066_h,
818 0.103516_h, 0.032544_h, 0.124334_h, 0.0564566_h,
819 0.0123544_h, 0.0461647_h, 0.0883828_h, 0.1159540_h,
823 std::vector<armnn::Half> kernel =
825 -0.126184_h, -0.150468_h,
826 -0.101412_h, -0.0586369_h,
828 -0.0435089_h, 0.0347555_h,
829 0.0323111_h, 0.0385381_h
833 std::vector<armnn::Half> outputData =
835 -0.01718917_h, -0.01370182_h, -0.02727737_h,
837 -0.02282543_h, -0.03144084_h, -0.04468598_h,
839 -0.02228982_h, -0.02244923_h, -0.02042268_h
842 return SimpleConvolution3dTestImpl<armnn::DataType::Float16, armnn::DataType::Float16>(
848 GetBiasData<armnn::DataType::Float16>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
850 inputDesc.GetShape(),
851 kernelDesc.GetShape(),
852 outputDesc.GetShape(),
866 return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
867 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
877 return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
878 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
888 return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
889 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
899 return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
900 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
911 return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
912 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
922 return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
923 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
933 return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
934 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
944 return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
945 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
955 return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
956 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
966 return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
967 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
977 return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
978 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
988 return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
989 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
999 return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
1000 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1010 return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
1011 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1021 return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
1022 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1032 return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
1033 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1044 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1055 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1066 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1077 workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
LayerTestResult< float, 5 > Convolution3d2x2x2Strides3x5x5Float32Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< int16_t, 5 > SimpleConvolution3d3x3x3Int16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
const TensorShape & GetShape() const
LayerTestResult< float, 5 > Convolution3dStrideDilationPadding3x3x3TestCommonFloat32(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
uint32_t m_PadBack
Padding back value in the depth dimension.
void PermuteTensorNdhwcToNcdhw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
std::vector< T > GetBiasData(bool biasEnabled, float qScale, armnn::TensorInfo outputInfo, armnn::DataLayout layout)
LayerTestResult< int8_t, 5 > SimpleConvolution3d3x3x3Int8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< float, 5 > Convolution3dPaddingSame3x3x3Float32Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
typename ResolveTypeImpl< DT >::Type ResolveType
uint32_t m_PadBottom
Padding bottom value in the height dimension.
bool m_BiasEnabled
Enable/disable bias.
LayerTestResult< armnn::Half, 5 > Convolution3d2x2x2SmallFloat16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< T, 5 > Convolution3d2x2x2Strides3x5x5TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerDescriptor m_Parameters
uint32_t m_DilationX
Dilation along x axis.
LayerTestResult< int16_t, 5 > Convolution3dPaddingSame3x3x3Int16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
LayerTestResult< T, 5 > SimpleConvolution3d3x3x3TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< float, 5 > Convolution3dStrideDilationPadding3x3x3Float32Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< T, 5 > SimpleConvolution3dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< T > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t strideX=1, uint32_t strideY=1, uint32_t strideZ=1, uint32_t dilationX=1, uint32_t dilationY=1, uint32_t dilationZ=1, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t padFront=0, uint32_t padBack=0)
LayerTestResult< uint8_t, 5 > Convolution3d2x2x2Dilation2x2x2Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< float, 5 > Convolution3d2x2x2Stride3x3x3SmallFloat32Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< armnn::Half, 5 > Convolution3d2x3x3Float16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
#define ARMNN_ASSERT_MSG(COND, MSG)
std::shared_ptr< IMemoryManager > IMemoryManagerSharedPtr
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
LayerTestResult< uint8_t, 5 > Convolution3dPaddingSame3x3x3Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< int8_t, 5 > Convolution3d2x2x2Strides3x5x5Int8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
void CopyDataFromITensorHandle(void *mem, const armnn::ITensorHandle *tensorHandle)
void ApplyBiasToData(std::vector< T > &v, const std::vector< B > &bias, float vScale, int32_t vOffset, float bScale, int32_t bOffset)
#define ARMNN_ASSERT(COND)
uint32_t m_PadFront
Padding front value in the depth dimension.
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_PadRight
Padding right value in the width dimension.
LayerTestResult< float, 5 > SimpleConvolution3d3x3x3Float32Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< uint8_t, 5 > SimpleConvolution3d3x3x3Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
DataLayout m_DataLayout
The data layout to be used (NDHWC, NCDHW).
std::vector< T > CreateSmallQuantizedData(int32_t size, float divisor, float qScale, int32_t qOffset)
void SetScaleOffset(float &qScale, int32_t &qOffset)
LayerTestResult< float, 5 > Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< armnn::Half, 5 > Convolution3d2x3x3TestCommonFloat16(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
uint32_t m_PadTop
Padding top value in the height dimension.
LayerTestResult< int8_t, 5 > Convolution3dPaddingSame3x3x3Int8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< armnn::Half, 5 > Convolution3d2x2x2SmallTestCommonFloat16(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< int16_t, 5 > Convolution3d2x2x2Strides3x5x5Int16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< uint8_t, 5 > Convolution3d2x2x2Strides3x5x5Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
LayerTestResult< int8_t, 5 > Convolution3d2x2x2Dilation2x2x2Int8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< T, 5 > Convolution3d2x2x2Dilation2x2x2TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
Contains information about TensorInfos of a layer.
float SelectiveDequantize(T value, float scale, int32_t offset)
LayerTestResult< T, 5 > Convolution3dPaddingSame3x3x3TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< int16_t, 5 > Convolution3d2x2x2Dilation2x2x2Int16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
virtual std::unique_ptr< IWorkload > CreateWorkload(LayerType type, const QueueDescriptor &descriptor, const WorkloadInfo &info) const
std::vector< T > CreateQuantizedData(int32_t size, float qScale, int32_t qOffset)
unsigned int GetChannelsIndex() const
uint32_t m_DilationZ
Dilation along z axis.
LayerTestResult< float, 5 > Convolution3d2x2x2Dilation2x2x2Float32Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
uint32_t m_DilationY
Dilation along y axis.