From 2d213a759e68f753ef4696e02a8535f7edfe421d Mon Sep 17 00:00:00 2001 From: Matthew Sloyan Date: Thu, 30 Jun 2022 17:13:04 +0100 Subject: IVGCVSW-6620 Update the async api to use ExecutionData * ExecutionData holds a void* which can be assigned to data required for execution in a backend. WorkingMemDescriptors are used in the Ref backend which hold TensorHandles for inputs and outputs. * Updated ExecuteAsync functions to take ExecutionData. * Added CreateExecutionData and UpdateExectutionData to IBackendInternal. * Streamlined experimental IWorkingMemHandle API by removing map related function and unused m_workingMemDescriptorMap from WorkingMemHandle. Signed-off-by: Matthew Sloyan Change-Id: I54b0aab12872011743a141eb42dae200227769af --- src/backends/reference/workloads/RefActivationWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefActivationWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefArgMinMaxWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefArgMinMaxWorkload.hpp | 4 ++-- .../reference/workloads/RefBatchNormalizationWorkload.cpp | 7 ++++--- .../reference/workloads/RefBatchNormalizationWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefBatchToSpaceNdWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefBatchToSpaceNdWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefCastWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefCastWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefChannelShuffleWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefChannelShuffleWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefComparisonWorkload.cpp | 9 +++++---- src/backends/reference/workloads/RefComparisonWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefConcatWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefConcatWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefConstantWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefConstantWorkload.hpp | 4 ++-- .../reference/workloads/RefConvertBf16ToFp32Workload.cpp | 7 ++++--- .../reference/workloads/RefConvertBf16ToFp32Workload.hpp | 4 ++-- .../reference/workloads/RefConvertFp16ToFp32Workload.cpp | 7 ++++--- .../reference/workloads/RefConvertFp16ToFp32Workload.hpp | 4 ++-- .../reference/workloads/RefConvertFp32ToBf16Workload.cpp | 7 ++++--- .../reference/workloads/RefConvertFp32ToBf16Workload.hpp | 4 ++-- .../reference/workloads/RefConvertFp32ToFp16Workload.cpp | 7 ++++--- .../reference/workloads/RefConvertFp32ToFp16Workload.hpp | 4 ++-- src/backends/reference/workloads/RefConvolution2dWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefConvolution2dWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefConvolution3dWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefConvolution3dWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefDebugWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefDebugWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefDepthToSpaceWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefDepthToSpaceWorkload.hpp | 4 ++-- .../reference/workloads/RefDepthwiseConvolution2dWorkload.cpp | 7 ++++--- .../reference/workloads/RefDepthwiseConvolution2dWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefDequantizeWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefDequantizeWorkload.hpp | 4 ++-- .../reference/workloads/RefDetectionPostProcessWorkload.cpp | 7 ++++--- .../reference/workloads/RefDetectionPostProcessWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefElementwiseUnaryWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefElementwiseUnaryWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefElementwiseWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefElementwiseWorkload.hpp | 4 ++-- .../reference/workloads/RefFakeQuantizationFloat32Workload.cpp | 7 ++++--- .../reference/workloads/RefFakeQuantizationFloat32Workload.hpp | 4 ++-- src/backends/reference/workloads/RefFillWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefFillWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefFloorWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefFloorWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefFullyConnectedWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefFullyConnectedWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefGatherNdWorkload.cpp | 5 +++-- src/backends/reference/workloads/RefGatherNdWorkload.hpp | 2 +- src/backends/reference/workloads/RefGatherWorkload.cpp | 5 +++-- src/backends/reference/workloads/RefGatherWorkload.hpp | 4 ++-- .../reference/workloads/RefInstanceNormalizationWorkload.cpp | 7 ++++--- .../reference/workloads/RefInstanceNormalizationWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefL2NormalizationWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefL2NormalizationWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefLogSoftmaxWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefLogSoftmaxWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefLogicalBinaryWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefLogicalBinaryWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefLogicalUnaryWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefLstmWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefLstmWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefMeanWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefMeanWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefNormalizationWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefNormalizationWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefPadWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefPadWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefPermuteWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefPermuteWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefPooling2dWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefPooling2dWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefPooling3dWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefPooling3dWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefPreluWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefPreluWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefQLstmWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefQLstmWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefQuantizeWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefQuantizeWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefRankWorkload.hpp | 7 ++++--- src/backends/reference/workloads/RefReduceWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefReduceWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefReshapeWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefReshapeWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefResizeWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefResizeWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefShapeWorkload.hpp | 7 ++++--- src/backends/reference/workloads/RefSliceWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefSliceWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefSoftmaxWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefSoftmaxWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefSpaceToDepthWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefSpaceToDepthWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefSplitterWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefSplitterWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefStackWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefStackWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefStridedSliceWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefStridedSliceWorkload.hpp | 4 ++-- .../reference/workloads/RefTransposeConvolution2dWorkload.cpp | 7 ++++--- .../reference/workloads/RefTransposeConvolution2dWorkload.hpp | 4 ++-- src/backends/reference/workloads/RefTransposeWorkload.cpp | 7 ++++--- src/backends/reference/workloads/RefTransposeWorkload.hpp | 4 ++-- .../workloads/RefUnidirectionalSequenceLstmWorkload.cpp | 7 ++++--- .../workloads/RefUnidirectionalSequenceLstmWorkload.hpp | 4 ++-- 114 files changed, 342 insertions(+), 284 deletions(-) (limited to 'src/backends/reference/workloads') diff --git a/src/backends/reference/workloads/RefActivationWorkload.cpp b/src/backends/reference/workloads/RefActivationWorkload.cpp index 77958673e9..bdc637aa5e 100644 --- a/src/backends/reference/workloads/RefActivationWorkload.cpp +++ b/src/backends/reference/workloads/RefActivationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,9 +20,10 @@ void RefActivationWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefActivationWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefActivationWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefActivationWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefActivationWorkload.hpp b/src/backends/reference/workloads/RefActivationWorkload.hpp index 8dc2d52d9b..f09c928732 100644 --- a/src/backends/reference/workloads/RefActivationWorkload.hpp +++ b/src/backends/reference/workloads/RefActivationWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefActivationWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp b/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp index d724273287..910ea73644 100644 --- a/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp +++ b/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -24,9 +24,10 @@ void RefArgMinMaxWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefArgMinMaxWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefArgMinMaxWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefArgMinMaxWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefArgMinMaxWorkload.hpp b/src/backends/reference/workloads/RefArgMinMaxWorkload.hpp index 97c4b45d60..000513b495 100644 --- a/src/backends/reference/workloads/RefArgMinMaxWorkload.hpp +++ b/src/backends/reference/workloads/RefArgMinMaxWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefBatchNormalizationWorkload.cpp b/src/backends/reference/workloads/RefBatchNormalizationWorkload.cpp index a6bd986f1d..ed99c63b64 100644 --- a/src/backends/reference/workloads/RefBatchNormalizationWorkload.cpp +++ b/src/backends/reference/workloads/RefBatchNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -27,9 +27,10 @@ void RefBatchNormalizationWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefBatchNormalizationWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefBatchNormalizationWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefBatchNormalizationWorkload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefBatchNormalizationWorkload.hpp b/src/backends/reference/workloads/RefBatchNormalizationWorkload.hpp index 60dd2a927c..88f0e3443a 100644 --- a/src/backends/reference/workloads/RefBatchNormalizationWorkload.hpp +++ b/src/backends/reference/workloads/RefBatchNormalizationWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: explicit RefBatchNormalizationWorkload(const BatchNormalizationQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.cpp b/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.cpp index 441d2ba2cf..72c7a7687e 100644 --- a/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.cpp +++ b/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,9 +16,10 @@ void RefBatchToSpaceNdWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefBatchToSpaceNdWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefBatchToSpaceNdWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefBatchToSpaceNdWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.hpp b/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.hpp index d7ee6fc81c..ac6aad3eb2 100644 --- a/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.hpp +++ b/src/backends/reference/workloads/RefBatchToSpaceNdWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefCastWorkload.cpp b/src/backends/reference/workloads/RefCastWorkload.cpp index 8f2a7259f1..5dce5d9a86 100644 --- a/src/backends/reference/workloads/RefCastWorkload.cpp +++ b/src/backends/reference/workloads/RefCastWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,9 +31,10 @@ void RefCastWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefCastWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefCastWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefCastWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefCastWorkload.hpp b/src/backends/reference/workloads/RefCastWorkload.hpp index 6f7e56a6b6..39963c6c0e 100644 --- a/src/backends/reference/workloads/RefCastWorkload.hpp +++ b/src/backends/reference/workloads/RefCastWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,7 +18,7 @@ class RefCastWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefChannelShuffleWorkload.cpp b/src/backends/reference/workloads/RefChannelShuffleWorkload.cpp index 9f8514d009..8d317ba333 100644 --- a/src/backends/reference/workloads/RefChannelShuffleWorkload.cpp +++ b/src/backends/reference/workloads/RefChannelShuffleWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefChannelShuffleWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefChannelShuffleWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefChannelShuffleWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } // Reference implementation for channel shuffle taken from diff --git a/src/backends/reference/workloads/RefChannelShuffleWorkload.hpp b/src/backends/reference/workloads/RefChannelShuffleWorkload.hpp index b459b87592..c70361aa26 100644 --- a/src/backends/reference/workloads/RefChannelShuffleWorkload.hpp +++ b/src/backends/reference/workloads/RefChannelShuffleWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefChannelShuffleWorkload : public RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefComparisonWorkload.cpp b/src/backends/reference/workloads/RefComparisonWorkload.cpp index 433e3e8ad8..0ce83a99f3 100644 --- a/src/backends/reference/workloads/RefComparisonWorkload.cpp +++ b/src/backends/reference/workloads/RefComparisonWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -47,11 +47,12 @@ void RefComparisonWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefComparisonWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefComparisonWorkload::ExecuteAsync(ExecutionData& executionData) { - PostAllocationConfigure(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + PostAllocationConfigure(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefComparisonWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefComparisonWorkload.hpp b/src/backends/reference/workloads/RefComparisonWorkload.hpp index 93cfd1f2b1..325509ec8b 100644 --- a/src/backends/reference/workloads/RefComparisonWorkload.hpp +++ b/src/backends/reference/workloads/RefComparisonWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,7 +21,7 @@ public: RefComparisonWorkload(const ComparisonQueueDescriptor& descriptor, const WorkloadInfo& info); void PostAllocationConfigure() override; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void PostAllocationConfigure(std::vector inputs, std::vector outputs); diff --git a/src/backends/reference/workloads/RefConcatWorkload.cpp b/src/backends/reference/workloads/RefConcatWorkload.cpp index c04c05354e..5aa8f037e5 100644 --- a/src/backends/reference/workloads/RefConcatWorkload.cpp +++ b/src/backends/reference/workloads/RefConcatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,9 +17,10 @@ void RefConcatWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConcatWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefConcatWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConcatWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefConcatWorkload.hpp b/src/backends/reference/workloads/RefConcatWorkload.hpp index 11d6d016ed..5175438675 100644 --- a/src/backends/reference/workloads/RefConcatWorkload.hpp +++ b/src/backends/reference/workloads/RefConcatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefConcatWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefConstantWorkload.cpp b/src/backends/reference/workloads/RefConstantWorkload.cpp index 571dbb219a..937e5178bb 100644 --- a/src/backends/reference/workloads/RefConstantWorkload.cpp +++ b/src/backends/reference/workloads/RefConstantWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -25,9 +25,10 @@ void RefConstantWorkload::Execute() const Execute(m_Data.m_Outputs); } -void RefConstantWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefConstantWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Outputs); } void RefConstantWorkload::Execute(std::vector outputs) const diff --git a/src/backends/reference/workloads/RefConstantWorkload.hpp b/src/backends/reference/workloads/RefConstantWorkload.hpp index 181d79d320..e2f701a33b 100644 --- a/src/backends/reference/workloads/RefConstantWorkload.hpp +++ b/src/backends/reference/workloads/RefConstantWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ public: RefConstantWorkload(const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp b/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp index 70e377d19b..2fe2eafb9b 100644 --- a/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp +++ b/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefConvertBf16ToFp32Workload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConvertBf16ToFp32Workload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefConvertBf16ToFp32Workload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConvertBf16ToFp32Workload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.hpp b/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.hpp index 8b5c6d56c2..24dcb0f682 100644 --- a/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.hpp +++ b/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefConvertBf16ToFp32Workload : public BFloat16ToFloat32Workload::BFloat16ToFloat32Workload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.cpp b/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.cpp index 347132d1f6..fa811e1a32 100644 --- a/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.cpp +++ b/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefConvertFp16ToFp32Workload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConvertFp16ToFp32Workload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefConvertFp16ToFp32Workload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConvertFp16ToFp32Workload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.hpp b/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.hpp index feb442ef5a..b850866ce3 100644 --- a/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.hpp +++ b/src/backends/reference/workloads/RefConvertFp16ToFp32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefConvertFp16ToFp32Workload : public Float16ToFloat32Workload::Float16ToFloat32Workload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp b/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp index 7fe302a5ad..71ee95b2aa 100644 --- a/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp +++ b/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefConvertFp32ToBf16Workload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConvertFp32ToBf16Workload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefConvertFp32ToBf16Workload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConvertFp32ToBf16Workload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.hpp b/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.hpp index cd3cfa4cf3..c1e57ec37e 100644 --- a/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.hpp +++ b/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefConvertFp32ToBf16Workload : public Float32ToBFloat16Workload::Float32ToBFloat16Workload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.cpp b/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.cpp index be13458d89..4992e9c07a 100644 --- a/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.cpp +++ b/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,9 +19,10 @@ void RefConvertFp32ToFp16Workload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConvertFp32ToFp16Workload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefConvertFp32ToFp16Workload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConvertFp32ToFp16Workload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.hpp b/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.hpp index fe137ed62f..7950c6becc 100644 --- a/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.hpp +++ b/src/backends/reference/workloads/RefConvertFp32ToFp16Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefConvertFp32ToFp16Workload : public Float32ToFloat16Workload::Float32ToFloat16Workload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefConvolution2dWorkload.cpp b/src/backends/reference/workloads/RefConvolution2dWorkload.cpp index 3ddbdcebca..355d5262df 100644 --- a/src/backends/reference/workloads/RefConvolution2dWorkload.cpp +++ b/src/backends/reference/workloads/RefConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -35,9 +35,10 @@ void RefConvolution2dWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConvolution2dWorkload::ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) +void RefConvolution2dWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConvolution2dWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefConvolution2dWorkload.hpp b/src/backends/reference/workloads/RefConvolution2dWorkload.hpp index f0d703786d..61c1eb6c0a 100644 --- a/src/backends/reference/workloads/RefConvolution2dWorkload.hpp +++ b/src/backends/reference/workloads/RefConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefConvolution3dWorkload.cpp b/src/backends/reference/workloads/RefConvolution3dWorkload.cpp index f6a0ee285b..3ac7cd7286 100644 --- a/src/backends/reference/workloads/RefConvolution3dWorkload.cpp +++ b/src/backends/reference/workloads/RefConvolution3dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -37,9 +37,10 @@ void RefConvolution3dWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefConvolution3dWorkload::ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) +void RefConvolution3dWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefConvolution3dWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefConvolution3dWorkload.hpp b/src/backends/reference/workloads/RefConvolution3dWorkload.hpp index b53f3a5f33..82236b9013 100644 --- a/src/backends/reference/workloads/RefConvolution3dWorkload.hpp +++ b/src/backends/reference/workloads/RefConvolution3dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefDebugWorkload.cpp b/src/backends/reference/workloads/RefDebugWorkload.cpp index b0e19c5851..48b519f809 100644 --- a/src/backends/reference/workloads/RefDebugWorkload.cpp +++ b/src/backends/reference/workloads/RefDebugWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,9 +21,10 @@ void RefDebugWorkload::Execute() const } template -void RefDebugWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefDebugWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs); } template diff --git a/src/backends/reference/workloads/RefDebugWorkload.hpp b/src/backends/reference/workloads/RefDebugWorkload.hpp index a1579599f4..91bc322048 100644 --- a/src/backends/reference/workloads/RefDebugWorkload.hpp +++ b/src/backends/reference/workloads/RefDebugWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -30,7 +30,7 @@ public: using TypedWorkload::TypedWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; void RegisterDebugCallback(const DebugCallbackFunction& func) override; diff --git a/src/backends/reference/workloads/RefDepthToSpaceWorkload.cpp b/src/backends/reference/workloads/RefDepthToSpaceWorkload.cpp index 22e35f0ec5..cb1137847b 100644 --- a/src/backends/reference/workloads/RefDepthToSpaceWorkload.cpp +++ b/src/backends/reference/workloads/RefDepthToSpaceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,9 +16,10 @@ void RefDepthToSpaceWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefDepthToSpaceWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefDepthToSpaceWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefDepthToSpaceWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefDepthToSpaceWorkload.hpp b/src/backends/reference/workloads/RefDepthToSpaceWorkload.hpp index bd179d3b9c..e19d07dace 100644 --- a/src/backends/reference/workloads/RefDepthToSpaceWorkload.hpp +++ b/src/backends/reference/workloads/RefDepthToSpaceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -15,7 +15,7 @@ class RefDepthToSpaceWorkload : public RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.cpp b/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.cpp index fd11ad1e03..c0677c9bf1 100644 --- a/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.cpp +++ b/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -41,9 +41,10 @@ void RefDepthwiseConvolution2dWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefDepthwiseConvolution2dWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefDepthwiseConvolution2dWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefDepthwiseConvolution2dWorkload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.hpp b/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.hpp index 30ee6d8ace..f138000433 100644 --- a/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.hpp +++ b/src/backends/reference/workloads/RefDepthwiseConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "RefBaseWorkload.hpp" @@ -17,7 +17,7 @@ public: explicit RefDepthwiseConvolution2dWorkload(const DepthwiseConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefDequantizeWorkload.cpp b/src/backends/reference/workloads/RefDequantizeWorkload.cpp index f9d80073b0..aa5ff6224a 100644 --- a/src/backends/reference/workloads/RefDequantizeWorkload.cpp +++ b/src/backends/reference/workloads/RefDequantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,9 +17,10 @@ void RefDequantizeWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefDequantizeWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefDequantizeWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefDequantizeWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefDequantizeWorkload.hpp b/src/backends/reference/workloads/RefDequantizeWorkload.hpp index 8fa8951677..97cd996d7e 100644 --- a/src/backends/reference/workloads/RefDequantizeWorkload.hpp +++ b/src/backends/reference/workloads/RefDequantizeWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefDetectionPostProcessWorkload.cpp b/src/backends/reference/workloads/RefDetectionPostProcessWorkload.cpp index 5f01db3280..ba7933b177 100644 --- a/src/backends/reference/workloads/RefDetectionPostProcessWorkload.cpp +++ b/src/backends/reference/workloads/RefDetectionPostProcessWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,9 +23,10 @@ void RefDetectionPostProcessWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefDetectionPostProcessWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefDetectionPostProcessWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefDetectionPostProcessWorkload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefDetectionPostProcessWorkload.hpp b/src/backends/reference/workloads/RefDetectionPostProcessWorkload.hpp index 53b2971063..87faa31ed4 100644 --- a/src/backends/reference/workloads/RefDetectionPostProcessWorkload.hpp +++ b/src/backends/reference/workloads/RefDetectionPostProcessWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: explicit RefDetectionPostProcessWorkload(const DetectionPostProcessQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefElementwiseUnaryWorkload.cpp b/src/backends/reference/workloads/RefElementwiseUnaryWorkload.cpp index 3ea51b9f69..4bd5a51a52 100644 --- a/src/backends/reference/workloads/RefElementwiseUnaryWorkload.cpp +++ b/src/backends/reference/workloads/RefElementwiseUnaryWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -35,10 +35,11 @@ void RefElementwiseUnaryWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefElementwiseUnaryWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefElementwiseUnaryWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefElementwiseUnaryWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefElementwiseUnaryWorkload.hpp b/src/backends/reference/workloads/RefElementwiseUnaryWorkload.hpp index 91229b3c58..471c6ed9a7 100644 --- a/src/backends/reference/workloads/RefElementwiseUnaryWorkload.hpp +++ b/src/backends/reference/workloads/RefElementwiseUnaryWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ public: RefElementwiseUnaryWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefElementwiseWorkload.cpp b/src/backends/reference/workloads/RefElementwiseWorkload.cpp index d14ce075b0..344ca344e3 100644 --- a/src/backends/reference/workloads/RefElementwiseWorkload.cpp +++ b/src/backends/reference/workloads/RefElementwiseWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,9 +33,10 @@ void RefElementwiseWorkload::Execute() c template void RefElementwiseWorkload::ExecuteAsync( - WorkingMemDescriptor &workingMemDescriptor) + ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } template diff --git a/src/backends/reference/workloads/RefElementwiseWorkload.hpp b/src/backends/reference/workloads/RefElementwiseWorkload.hpp index 579e5def34..458b524c64 100644 --- a/src/backends/reference/workloads/RefElementwiseWorkload.hpp +++ b/src/backends/reference/workloads/RefElementwiseWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,7 +23,7 @@ class RefElementwiseWorkload : public RefBaseWorkload public: RefElementwiseWorkload(const ParentDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: using InType = typename ElementwiseBinaryFunction::InType; diff --git a/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.cpp b/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.cpp index b30811b8ed..828204fe07 100644 --- a/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.cpp +++ b/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,9 +31,10 @@ void RefFakeQuantizationFloat32Workload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefFakeQuantizationFloat32Workload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefFakeQuantizationFloat32Workload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefFakeQuantizationFloat32Workload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.hpp b/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.hpp index 85dc6af326..9683c87126 100644 --- a/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.hpp +++ b/src/backends/reference/workloads/RefFakeQuantizationFloat32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefFakeQuantizationFloat32Workload : public Float32Workload::Float32Workload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefFillWorkload.cpp b/src/backends/reference/workloads/RefFillWorkload.cpp index ea1ca87caf..a0f0c6b30e 100644 --- a/src/backends/reference/workloads/RefFillWorkload.cpp +++ b/src/backends/reference/workloads/RefFillWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,9 +19,10 @@ void RefFillWorkload::Execute() const Execute(m_Data.m_Outputs); } -void RefFillWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefFillWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Outputs); } void RefFillWorkload::Execute(std::vector outputs) const diff --git a/src/backends/reference/workloads/RefFillWorkload.hpp b/src/backends/reference/workloads/RefFillWorkload.hpp index d1e00581cd..5b0dcf7ac8 100644 --- a/src/backends/reference/workloads/RefFillWorkload.hpp +++ b/src/backends/reference/workloads/RefFillWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefFillWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefFloorWorkload.cpp b/src/backends/reference/workloads/RefFloorWorkload.cpp index e7bd50ddea..d02e529d04 100644 --- a/src/backends/reference/workloads/RefFloorWorkload.cpp +++ b/src/backends/reference/workloads/RefFloorWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefFloorWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefFloorWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefFloorWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefFloorWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefFloorWorkload.hpp b/src/backends/reference/workloads/RefFloorWorkload.hpp index 6237ff0c61..5f8298d8c6 100644 --- a/src/backends/reference/workloads/RefFloorWorkload.hpp +++ b/src/backends/reference/workloads/RefFloorWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefFloorWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefFullyConnectedWorkload.cpp b/src/backends/reference/workloads/RefFullyConnectedWorkload.cpp index 087fc9da68..734d7f3503 100644 --- a/src/backends/reference/workloads/RefFullyConnectedWorkload.cpp +++ b/src/backends/reference/workloads/RefFullyConnectedWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,9 +39,10 @@ void RefFullyConnectedWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefFullyConnectedWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefFullyConnectedWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefFullyConnectedWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefFullyConnectedWorkload.hpp b/src/backends/reference/workloads/RefFullyConnectedWorkload.hpp index 3bdfb861d0..7f9438cbb5 100644 --- a/src/backends/reference/workloads/RefFullyConnectedWorkload.hpp +++ b/src/backends/reference/workloads/RefFullyConnectedWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,7 +22,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefGatherNdWorkload.cpp b/src/backends/reference/workloads/RefGatherNdWorkload.cpp index 4c6b559943..9a9478c3dc 100644 --- a/src/backends/reference/workloads/RefGatherNdWorkload.cpp +++ b/src/backends/reference/workloads/RefGatherNdWorkload.cpp @@ -18,9 +18,10 @@ void RefGatherNdWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefGatherNdWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefGatherNdWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefGatherNdWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefGatherNdWorkload.hpp b/src/backends/reference/workloads/RefGatherNdWorkload.hpp index a0d91586cc..0be02bd915 100644 --- a/src/backends/reference/workloads/RefGatherNdWorkload.hpp +++ b/src/backends/reference/workloads/RefGatherNdWorkload.hpp @@ -15,7 +15,7 @@ class RefGatherNdWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefGatherWorkload.cpp b/src/backends/reference/workloads/RefGatherWorkload.cpp index 8ad36e43b4..55a4c0961d 100644 --- a/src/backends/reference/workloads/RefGatherWorkload.cpp +++ b/src/backends/reference/workloads/RefGatherWorkload.cpp @@ -18,9 +18,10 @@ void RefGatherWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefGatherWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefGatherWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefGatherWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefGatherWorkload.hpp b/src/backends/reference/workloads/RefGatherWorkload.hpp index ec880a5109..ff38a1d811 100644 --- a/src/backends/reference/workloads/RefGatherWorkload.hpp +++ b/src/backends/reference/workloads/RefGatherWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,7 +21,7 @@ class RefGatherWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefInstanceNormalizationWorkload.cpp b/src/backends/reference/workloads/RefInstanceNormalizationWorkload.cpp index c103a6b9d3..dd4fbf3ccd 100644 --- a/src/backends/reference/workloads/RefInstanceNormalizationWorkload.cpp +++ b/src/backends/reference/workloads/RefInstanceNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,9 +23,10 @@ void RefInstanceNormalizationWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefInstanceNormalizationWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefInstanceNormalizationWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefInstanceNormalizationWorkload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefInstanceNormalizationWorkload.hpp b/src/backends/reference/workloads/RefInstanceNormalizationWorkload.hpp index a4b2dd39cb..3ae037541a 100644 --- a/src/backends/reference/workloads/RefInstanceNormalizationWorkload.hpp +++ b/src/backends/reference/workloads/RefInstanceNormalizationWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: explicit RefInstanceNormalizationWorkload(const InstanceNormalizationQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefL2NormalizationWorkload.cpp b/src/backends/reference/workloads/RefL2NormalizationWorkload.cpp index f6fcff3cc5..bce8f245f5 100644 --- a/src/backends/reference/workloads/RefL2NormalizationWorkload.cpp +++ b/src/backends/reference/workloads/RefL2NormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,9 +29,10 @@ void RefL2NormalizationWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefL2NormalizationWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefL2NormalizationWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefL2NormalizationWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefL2NormalizationWorkload.hpp b/src/backends/reference/workloads/RefL2NormalizationWorkload.hpp index c64e2ea0fd..4a56a04a80 100644 --- a/src/backends/reference/workloads/RefL2NormalizationWorkload.hpp +++ b/src/backends/reference/workloads/RefL2NormalizationWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,7 +18,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefLogSoftmaxWorkload.cpp b/src/backends/reference/workloads/RefLogSoftmaxWorkload.cpp index ebe1b1ecfe..a21eb459a7 100644 --- a/src/backends/reference/workloads/RefLogSoftmaxWorkload.cpp +++ b/src/backends/reference/workloads/RefLogSoftmaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,9 +22,10 @@ void RefLogSoftmaxWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefLogSoftmaxWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefLogSoftmaxWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefLogSoftmaxWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefLogSoftmaxWorkload.hpp b/src/backends/reference/workloads/RefLogSoftmaxWorkload.hpp index 91ad5f6c36..098a9ee311 100644 --- a/src/backends/reference/workloads/RefLogSoftmaxWorkload.hpp +++ b/src/backends/reference/workloads/RefLogSoftmaxWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefLogSoftmaxWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefLogicalBinaryWorkload.cpp b/src/backends/reference/workloads/RefLogicalBinaryWorkload.cpp index f0cb846acf..b132061008 100644 --- a/src/backends/reference/workloads/RefLogicalBinaryWorkload.cpp +++ b/src/backends/reference/workloads/RefLogicalBinaryWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -27,9 +27,10 @@ void RefLogicalBinaryWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefLogicalBinaryWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefLogicalBinaryWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefLogicalBinaryWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefLogicalBinaryWorkload.hpp b/src/backends/reference/workloads/RefLogicalBinaryWorkload.hpp index 797d937d80..498f80adbe 100644 --- a/src/backends/reference/workloads/RefLogicalBinaryWorkload.hpp +++ b/src/backends/reference/workloads/RefLogicalBinaryWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ public: RefLogicalBinaryWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefLogicalUnaryWorkload.cpp b/src/backends/reference/workloads/RefLogicalUnaryWorkload.cpp index ec0aa0e454..a84af442ab 100644 --- a/src/backends/reference/workloads/RefLogicalUnaryWorkload.cpp +++ b/src/backends/reference/workloads/RefLogicalUnaryWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -27,9 +27,10 @@ void RefLogicalUnaryWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefLogicalUnaryWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefLogicalUnaryWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefLogicalUnaryWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp b/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp index ebd5826cc5..e90135952c 100644 --- a/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp +++ b/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ public: RefLogicalUnaryWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefLstmWorkload.cpp b/src/backends/reference/workloads/RefLstmWorkload.cpp index 8609811253..3879051a5b 100644 --- a/src/backends/reference/workloads/RefLstmWorkload.cpp +++ b/src/backends/reference/workloads/RefLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -44,9 +44,10 @@ void RefLstmWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefLstmWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefLstmWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefLstmWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefLstmWorkload.hpp b/src/backends/reference/workloads/RefLstmWorkload.hpp index 57526c9ba2..ad94e26159 100644 --- a/src/backends/reference/workloads/RefLstmWorkload.hpp +++ b/src/backends/reference/workloads/RefLstmWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,7 +19,7 @@ public: explicit RefLstmWorkload(const LstmQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefMeanWorkload.cpp b/src/backends/reference/workloads/RefMeanWorkload.cpp index 23abaf8ff4..5d73a43a80 100644 --- a/src/backends/reference/workloads/RefMeanWorkload.cpp +++ b/src/backends/reference/workloads/RefMeanWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,9 +23,10 @@ void RefMeanWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefMeanWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefMeanWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefMeanWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefMeanWorkload.hpp b/src/backends/reference/workloads/RefMeanWorkload.hpp index c4c6a1261c..6c09f4bb76 100644 --- a/src/backends/reference/workloads/RefMeanWorkload.hpp +++ b/src/backends/reference/workloads/RefMeanWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,7 +19,7 @@ class RefMeanWorkload : public RefBaseWorkload public: explicit RefMeanWorkload (const MeanQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefNormalizationWorkload.cpp b/src/backends/reference/workloads/RefNormalizationWorkload.cpp index 613868de57..40c9a6f449 100644 --- a/src/backends/reference/workloads/RefNormalizationWorkload.cpp +++ b/src/backends/reference/workloads/RefNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -166,9 +166,10 @@ void RefNormalizationWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefNormalizationWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefNormalizationWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefNormalizationWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefNormalizationWorkload.hpp b/src/backends/reference/workloads/RefNormalizationWorkload.hpp index 5218e1e43a..f06563cb36 100644 --- a/src/backends/reference/workloads/RefNormalizationWorkload.hpp +++ b/src/backends/reference/workloads/RefNormalizationWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,7 +18,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefPadWorkload.cpp b/src/backends/reference/workloads/RefPadWorkload.cpp index fd0728c8cd..9bc4efa919 100644 --- a/src/backends/reference/workloads/RefPadWorkload.cpp +++ b/src/backends/reference/workloads/RefPadWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefPadWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefPadWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefPadWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefPadWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefPadWorkload.hpp b/src/backends/reference/workloads/RefPadWorkload.hpp index c5871059cc..539ac4a4ad 100644 --- a/src/backends/reference/workloads/RefPadWorkload.hpp +++ b/src/backends/reference/workloads/RefPadWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefPadWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefPermuteWorkload.cpp b/src/backends/reference/workloads/RefPermuteWorkload.cpp index f6af208e8a..e0e3b4fbd8 100644 --- a/src/backends/reference/workloads/RefPermuteWorkload.cpp +++ b/src/backends/reference/workloads/RefPermuteWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,9 +20,10 @@ void RefPermuteWorkload::Execute() const } template -void RefPermuteWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefPermuteWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } template diff --git a/src/backends/reference/workloads/RefPermuteWorkload.hpp b/src/backends/reference/workloads/RefPermuteWorkload.hpp index d1e44520a1..c6b8e3b12d 100644 --- a/src/backends/reference/workloads/RefPermuteWorkload.hpp +++ b/src/backends/reference/workloads/RefPermuteWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -25,7 +25,7 @@ public: using TypedWorkload::m_Data; using TypedWorkload::TypedWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefPooling2dWorkload.cpp b/src/backends/reference/workloads/RefPooling2dWorkload.cpp index d337278fe1..9dc9a3568a 100644 --- a/src/backends/reference/workloads/RefPooling2dWorkload.cpp +++ b/src/backends/reference/workloads/RefPooling2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefPooling2dWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefPooling2dWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefPooling2dWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefPooling2dWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefPooling2dWorkload.hpp b/src/backends/reference/workloads/RefPooling2dWorkload.hpp index a073e3921b..8da8e87277 100644 --- a/src/backends/reference/workloads/RefPooling2dWorkload.hpp +++ b/src/backends/reference/workloads/RefPooling2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,7 +19,7 @@ public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefPooling3dWorkload.cpp b/src/backends/reference/workloads/RefPooling3dWorkload.cpp index d1e00aa5f7..5f1eda2dab 100644 --- a/src/backends/reference/workloads/RefPooling3dWorkload.cpp +++ b/src/backends/reference/workloads/RefPooling3dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefPooling3dWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefPooling3dWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefPooling3dWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefPooling3dWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefPooling3dWorkload.hpp b/src/backends/reference/workloads/RefPooling3dWorkload.hpp index 92bc4766cf..6aa32ae75f 100644 --- a/src/backends/reference/workloads/RefPooling3dWorkload.hpp +++ b/src/backends/reference/workloads/RefPooling3dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,7 +19,7 @@ public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefPreluWorkload.cpp b/src/backends/reference/workloads/RefPreluWorkload.cpp index 94eeea1884..efe7a4c239 100644 --- a/src/backends/reference/workloads/RefPreluWorkload.cpp +++ b/src/backends/reference/workloads/RefPreluWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,9 +23,10 @@ void RefPreluWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefPreluWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefPreluWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefPreluWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefPreluWorkload.hpp b/src/backends/reference/workloads/RefPreluWorkload.hpp index 51ba2c15a7..b309dcf6d4 100644 --- a/src/backends/reference/workloads/RefPreluWorkload.hpp +++ b/src/backends/reference/workloads/RefPreluWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: explicit RefPreluWorkload(const PreluQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefQLstmWorkload.cpp b/src/backends/reference/workloads/RefQLstmWorkload.cpp index 74f5f1ef4c..398faa9074 100644 --- a/src/backends/reference/workloads/RefQLstmWorkload.cpp +++ b/src/backends/reference/workloads/RefQLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -48,9 +48,10 @@ void RefQLstmWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefQLstmWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefQLstmWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefQLstmWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefQLstmWorkload.hpp b/src/backends/reference/workloads/RefQLstmWorkload.hpp index 0e64a38ac9..2c56d9c30a 100644 --- a/src/backends/reference/workloads/RefQLstmWorkload.hpp +++ b/src/backends/reference/workloads/RefQLstmWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,7 +19,7 @@ public: explicit RefQLstmWorkload(const QLstmQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefQuantizeWorkload.cpp b/src/backends/reference/workloads/RefQuantizeWorkload.cpp index 10ef0e5e15..e54ab456cd 100644 --- a/src/backends/reference/workloads/RefQuantizeWorkload.cpp +++ b/src/backends/reference/workloads/RefQuantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,9 +39,10 @@ void RefQuantizeWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefQuantizeWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefQuantizeWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefQuantizeWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefQuantizeWorkload.hpp b/src/backends/reference/workloads/RefQuantizeWorkload.hpp index e38241067d..1aba32c425 100644 --- a/src/backends/reference/workloads/RefQuantizeWorkload.hpp +++ b/src/backends/reference/workloads/RefQuantizeWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ class RefQuantizeWorkload : public RefBaseWorkload public: RefQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, const WorkloadInfo &info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefRankWorkload.hpp b/src/backends/reference/workloads/RefRankWorkload.hpp index 000828f9e4..48109529f0 100644 --- a/src/backends/reference/workloads/RefRankWorkload.hpp +++ b/src/backends/reference/workloads/RefRankWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,9 +22,10 @@ public: Execute(m_Data.m_Inputs, m_Data.m_Outputs); } - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override + void ExecuteAsync(ExecutionData& executionData) override { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } private: diff --git a/src/backends/reference/workloads/RefReduceWorkload.cpp b/src/backends/reference/workloads/RefReduceWorkload.cpp index 62881daaf7..e7d05cadd0 100644 --- a/src/backends/reference/workloads/RefReduceWorkload.cpp +++ b/src/backends/reference/workloads/RefReduceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Samsung Electronics Co Ltd and Contributors. All rights reserved. +// Copyright © 2022 Samsung Electronics Co Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,9 +23,10 @@ void RefReduceWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefReduceWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefReduceWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefReduceWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefReduceWorkload.hpp b/src/backends/reference/workloads/RefReduceWorkload.hpp index d759bc2ef1..261193272f 100644 --- a/src/backends/reference/workloads/RefReduceWorkload.hpp +++ b/src/backends/reference/workloads/RefReduceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Samsung Electronics Co Ltd and Contributors. All rights reserved. +// Copyright © 2022 Samsung Electronics Co Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,7 +18,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefReshapeWorkload.cpp b/src/backends/reference/workloads/RefReshapeWorkload.cpp index 960d591fec..a93645e2ea 100644 --- a/src/backends/reference/workloads/RefReshapeWorkload.cpp +++ b/src/backends/reference/workloads/RefReshapeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,9 +17,10 @@ void RefReshapeWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefReshapeWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefReshapeWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefReshapeWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefReshapeWorkload.hpp b/src/backends/reference/workloads/RefReshapeWorkload.hpp index 7596685336..94fb3a11ab 100644 --- a/src/backends/reference/workloads/RefReshapeWorkload.hpp +++ b/src/backends/reference/workloads/RefReshapeWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefReshapeWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefResizeWorkload.cpp b/src/backends/reference/workloads/RefResizeWorkload.cpp index d7a82b8f34..39a2a29878 100644 --- a/src/backends/reference/workloads/RefResizeWorkload.cpp +++ b/src/backends/reference/workloads/RefResizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,9 +22,10 @@ void RefResizeWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefResizeWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefResizeWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefResizeWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefResizeWorkload.hpp b/src/backends/reference/workloads/RefResizeWorkload.hpp index f7747193ec..27ae48c918 100644 --- a/src/backends/reference/workloads/RefResizeWorkload.hpp +++ b/src/backends/reference/workloads/RefResizeWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefResizeWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefShapeWorkload.hpp b/src/backends/reference/workloads/RefShapeWorkload.hpp index b7ed761e0c..bc4d50ac92 100644 --- a/src/backends/reference/workloads/RefShapeWorkload.hpp +++ b/src/backends/reference/workloads/RefShapeWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,9 +21,10 @@ public: { Execute(m_Data.m_Inputs, m_Data.m_Outputs); } - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override + void ExecuteAsync(ExecutionData& executionData) override { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } private: diff --git a/src/backends/reference/workloads/RefSliceWorkload.cpp b/src/backends/reference/workloads/RefSliceWorkload.cpp index f94a83ee2c..60c3950c32 100644 --- a/src/backends/reference/workloads/RefSliceWorkload.cpp +++ b/src/backends/reference/workloads/RefSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,9 +18,10 @@ void RefSliceWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefSliceWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefSliceWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefSliceWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefSliceWorkload.hpp b/src/backends/reference/workloads/RefSliceWorkload.hpp index b9dca86c4e..8b99bc4bc0 100644 --- a/src/backends/reference/workloads/RefSliceWorkload.hpp +++ b/src/backends/reference/workloads/RefSliceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefSoftmaxWorkload.cpp b/src/backends/reference/workloads/RefSoftmaxWorkload.cpp index 9733cbc859..f2579ce388 100644 --- a/src/backends/reference/workloads/RefSoftmaxWorkload.cpp +++ b/src/backends/reference/workloads/RefSoftmaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,9 +22,10 @@ void RefSoftmaxWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefSoftmaxWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefSoftmaxWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefSoftmaxWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefSoftmaxWorkload.hpp b/src/backends/reference/workloads/RefSoftmaxWorkload.hpp index cac102a2bb..89d2c9ee9a 100644 --- a/src/backends/reference/workloads/RefSoftmaxWorkload.hpp +++ b/src/backends/reference/workloads/RefSoftmaxWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ class RefSoftmaxWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp index e35632db5b..6aa422afdc 100644 --- a/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp +++ b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,9 +17,10 @@ void RefSpaceToBatchNdWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefSpaceToBatchNdWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefSpaceToBatchNdWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefSpaceToBatchNdWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp index eb2d93fb86..f2c87682db 100644 --- a/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp +++ b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once @@ -16,7 +16,7 @@ class RefSpaceToBatchNdWorkload : public RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefSpaceToDepthWorkload.cpp b/src/backends/reference/workloads/RefSpaceToDepthWorkload.cpp index 88faf7a790..e8dd052e94 100644 --- a/src/backends/reference/workloads/RefSpaceToDepthWorkload.cpp +++ b/src/backends/reference/workloads/RefSpaceToDepthWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,9 +17,10 @@ void RefSpaceToDepthWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefSpaceToDepthWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefSpaceToDepthWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefSpaceToDepthWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefSpaceToDepthWorkload.hpp b/src/backends/reference/workloads/RefSpaceToDepthWorkload.hpp index 17f8d2f61e..79e888d6ed 100644 --- a/src/backends/reference/workloads/RefSpaceToDepthWorkload.hpp +++ b/src/backends/reference/workloads/RefSpaceToDepthWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once @@ -16,7 +16,7 @@ class RefSpaceToDepthWorkload : public RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefSplitterWorkload.cpp b/src/backends/reference/workloads/RefSplitterWorkload.cpp index 076aefe517..93b393b243 100644 --- a/src/backends/reference/workloads/RefSplitterWorkload.cpp +++ b/src/backends/reference/workloads/RefSplitterWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,9 +16,10 @@ void RefSplitterWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefSplitterWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefSplitterWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefSplitterWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefSplitterWorkload.hpp b/src/backends/reference/workloads/RefSplitterWorkload.hpp index 0b72bb9fdc..0beaaf9c72 100644 --- a/src/backends/reference/workloads/RefSplitterWorkload.hpp +++ b/src/backends/reference/workloads/RefSplitterWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,7 +18,7 @@ class RefSplitterWorkload : public RefBaseWorkload public: using RefBaseWorkload::RefBaseWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefStackWorkload.cpp b/src/backends/reference/workloads/RefStackWorkload.cpp index f57e6e0f1e..e35c2d52c6 100644 --- a/src/backends/reference/workloads/RefStackWorkload.cpp +++ b/src/backends/reference/workloads/RefStackWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,9 +23,10 @@ void RefStackWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefStackWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefStackWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefStackWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefStackWorkload.hpp b/src/backends/reference/workloads/RefStackWorkload.hpp index 19f4a7be67..d413c7d91f 100644 --- a/src/backends/reference/workloads/RefStackWorkload.hpp +++ b/src/backends/reference/workloads/RefStackWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ public: explicit RefStackWorkload(const StackQueueDescriptor& descriptor, const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefStridedSliceWorkload.cpp b/src/backends/reference/workloads/RefStridedSliceWorkload.cpp index 41fe4c3a1c..f5ca0c18d7 100644 --- a/src/backends/reference/workloads/RefStridedSliceWorkload.cpp +++ b/src/backends/reference/workloads/RefStridedSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,9 +20,10 @@ void RefStridedSliceWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefStridedSliceWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefStridedSliceWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefStridedSliceWorkload::Execute(std::vector inputs, std::vector outputs) const diff --git a/src/backends/reference/workloads/RefStridedSliceWorkload.hpp b/src/backends/reference/workloads/RefStridedSliceWorkload.hpp index ea443cf80d..f8a8f8d0e9 100644 --- a/src/backends/reference/workloads/RefStridedSliceWorkload.hpp +++ b/src/backends/reference/workloads/RefStridedSliceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -15,7 +15,7 @@ class RefStridedSliceWorkload : public RefBaseWorkload inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp b/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp index 64a2d4c7b2..1269b3ff04 100644 --- a/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp +++ b/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -38,9 +38,10 @@ void RefTransposeConvolution2dWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefTransposeConvolution2dWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefTransposeConvolution2dWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefTransposeConvolution2dWorkload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.hpp b/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.hpp index 6bcee9a838..1d66698b93 100644 --- a/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.hpp +++ b/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,7 +22,7 @@ public: ~RefTransposeConvolution2dWorkload() = default; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; diff --git a/src/backends/reference/workloads/RefTransposeWorkload.cpp b/src/backends/reference/workloads/RefTransposeWorkload.cpp index 828badd042..6c94e7d2c8 100644 --- a/src/backends/reference/workloads/RefTransposeWorkload.cpp +++ b/src/backends/reference/workloads/RefTransposeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,9 +20,10 @@ void RefTransposeWorkload::Execute() const } template -void RefTransposeWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) +void RefTransposeWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } template diff --git a/src/backends/reference/workloads/RefTransposeWorkload.hpp b/src/backends/reference/workloads/RefTransposeWorkload.hpp index b8c3649745..db4f683699 100644 --- a/src/backends/reference/workloads/RefTransposeWorkload.hpp +++ b/src/backends/reference/workloads/RefTransposeWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -25,7 +25,7 @@ public: using TypedWorkload::m_Data; using TypedWorkload::TypedWorkload; void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: void Execute(std::vector inputs, std::vector outputs) const; }; diff --git a/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.cpp b/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.cpp index c4345d4978..23022d076c 100644 --- a/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.cpp +++ b/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -48,9 +48,10 @@ void RefUnidirectionalSequenceLstmWorkload::Execute() const Execute(m_Data.m_Inputs, m_Data.m_Outputs); } -void RefUnidirectionalSequenceLstmWorkload::ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) +void RefUnidirectionalSequenceLstmWorkload::ExecuteAsync(ExecutionData& executionData) { - Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + WorkingMemDescriptor* workingMemDescriptor = static_cast(executionData.m_Data); + Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); } void RefUnidirectionalSequenceLstmWorkload::Execute(std::vector inputs, diff --git a/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.hpp b/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.hpp index 7a91cee642..ad2b862efd 100644 --- a/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.hpp +++ b/src/backends/reference/workloads/RefUnidirectionalSequenceLstmWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,7 +23,7 @@ public: const WorkloadInfo& info); void Execute() const override; - void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; + void ExecuteAsync(ExecutionData& executionData) override; private: -- cgit v1.2.1