From 7b885b3cce70154596b1994b013ea91527117c26 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tam=C3=A1s=20Ny=C3=ADri?= <tamas.nyiri@arm.com>
Date: Tue, 26 Oct 2021 14:47:57 +0100
Subject: IVGCVSW-6509 Front End + Reference Workload implementation

Subtask of story: IVGCVSW-6164 Add a Pooling3d FrontEnd and Ref Implementation

* Add front end
* Add reference workload
* Add corresponding unit tests

Change-Id: Icce4146dd0a06a1da46a2def00a82d343e171750
Signed-off-by: Tamas Nyiri <tamas.nyiri@arm.com>
---
 .../reference/workloads/RefPooling3dWorkload.hpp   | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 src/backends/reference/workloads/RefPooling3dWorkload.hpp

(limited to 'src/backends/reference/workloads/RefPooling3dWorkload.hpp')

diff --git a/src/backends/reference/workloads/RefPooling3dWorkload.hpp b/src/backends/reference/workloads/RefPooling3dWorkload.hpp
new file mode 100644
index 0000000000..1188af23ca
--- /dev/null
+++ b/src/backends/reference/workloads/RefPooling3dWorkload.hpp
@@ -0,0 +1,26 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <backendsCommon/WorkloadData.hpp>
+
+#include "Decoders.hpp"
+#include "Encoders.hpp"
+
+namespace armnn
+{
+class RefPooling3dWorkload : public BaseWorkload<Pooling3dQueueDescriptor>
+{
+public:
+    using BaseWorkload<Pooling3dQueueDescriptor>::BaseWorkload;
+
+    void Execute() const override;
+    void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor)  override;
+private:
+    void Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const;
+};
+} //namespace armnn
-- 
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