From aba90cd608eb65ab459cd71a6724511a1507763b Mon Sep 17 00:00:00 2001 From: James Conroy Date: Fri, 6 Nov 2020 16:28:18 +0000 Subject: IVGCVSW-5091 Add Logical ops frontend and ref impl * Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy Change-Id: Id343b01174053a166de1b98b6175e04a5065f720 --- .../workloads/RefLogicalUnaryWorkload.hpp | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp (limited to 'src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp') diff --git a/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp b/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp new file mode 100644 index 0000000000..0d8b35495c --- /dev/null +++ b/src/backends/reference/workloads/RefLogicalUnaryWorkload.hpp @@ -0,0 +1,33 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include "BaseIterator.hpp" + +#include +#include + +namespace armnn +{ + +class RefLogicalUnaryWorkload : public BaseWorkload +{ +public: + using BaseWorkload::m_Data; + + RefLogicalUnaryWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); + void PostAllocationConfigure() override; + virtual void Execute() const override; + +private: + using InType = bool; + using OutType = bool; + + std::unique_ptr> m_Input; + std::unique_ptr> m_Output; +}; + +} // namespace armnn -- cgit v1.2.1